From 43904dc3b8a4bf86209d4a3b48098b00e11c173a Mon Sep 17 00:00:00 2001 From: Stephen Glancy Date: Thu, 15 Mar 2018 14:55:07 -0500 Subject: Adds dynamic voltage blank files for HB Change-Id: I9b2c4bd3092f7a44995df38db43c2049fccf481a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55963 Tested-by: Jenkins Server Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Tested-by: FSP CI Jenkins Reviewed-by: Christian R. Geddes --- .../procedures/hwp/memory/mss_dynamic_vid_utils.C | 24 ++++++++++++++++++++++ .../procedures/hwp/memory/mss_dynamic_vid_utils.H | 24 ++++++++++++++++++++++ .../hwp/memory/p9c_mss_volt_vddr_offset.C | 24 ++++++++++++++++++++++ .../hwp/memory/p9c_mss_volt_vddr_offset.H | 24 ++++++++++++++++++++++ 4 files changed, 96 insertions(+) create mode 100644 src/import/chips/centaur/procedures/hwp/memory/mss_dynamic_vid_utils.C create mode 100644 src/import/chips/centaur/procedures/hwp/memory/mss_dynamic_vid_utils.H create mode 100644 src/import/chips/centaur/procedures/hwp/memory/p9c_mss_volt_vddr_offset.C create mode 100644 src/import/chips/centaur/procedures/hwp/memory/p9c_mss_volt_vddr_offset.H (limited to 'src/import/chips') diff --git a/src/import/chips/centaur/procedures/hwp/memory/mss_dynamic_vid_utils.C b/src/import/chips/centaur/procedures/hwp/memory/mss_dynamic_vid_utils.C new file mode 100644 index 000000000..0fa861563 --- /dev/null +++ b/src/import/chips/centaur/procedures/hwp/memory/mss_dynamic_vid_utils.C @@ -0,0 +1,24 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/import/chips/centaur/procedures/hwp/memory/mss_dynamic_vid_utils.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2018 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ diff --git a/src/import/chips/centaur/procedures/hwp/memory/mss_dynamic_vid_utils.H b/src/import/chips/centaur/procedures/hwp/memory/mss_dynamic_vid_utils.H new file mode 100644 index 000000000..e65ecaa09 --- /dev/null +++ b/src/import/chips/centaur/procedures/hwp/memory/mss_dynamic_vid_utils.H @@ -0,0 +1,24 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/import/chips/centaur/procedures/hwp/memory/mss_dynamic_vid_utils.H $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2018 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ diff --git a/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_volt_vddr_offset.C b/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_volt_vddr_offset.C new file mode 100644 index 000000000..4be0b8f18 --- /dev/null +++ b/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_volt_vddr_offset.C @@ -0,0 +1,24 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/import/chips/centaur/procedures/hwp/memory/p9c_mss_volt_vddr_offset.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2018 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ diff --git a/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_volt_vddr_offset.H b/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_volt_vddr_offset.H new file mode 100644 index 000000000..e6b9ba9b5 --- /dev/null +++ b/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_volt_vddr_offset.H @@ -0,0 +1,24 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/import/chips/centaur/procedures/hwp/memory/p9c_mss_volt_vddr_offset.H $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2018 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ -- cgit v1.2.1