From c0e8d172a0cdf22321d574c7b27743e116c35138 Mon Sep 17 00:00:00 2001 From: Andre Marin Date: Fri, 1 Feb 2019 11:03:11 -0600 Subject: Add empty pos, c_str files to split dimm specialization Change-Id: I6bfc97b335613ed5dfc3ca4a0a7d03fbee282bac Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71211 Tested-by: FSP CI Jenkins Tested-by: Jenkins Server Tested-by: Hostboot CI Reviewed-by: Louis Stermole Reviewed-by: STEPHEN GLANCY Dev-Ready: ANDRE A. MARIN Reviewed-by: Jennifer A. Stofer Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71445 Tested-by: Jenkins OP Build CI Reviewed-by: Daniel M. Crowell --- .../procedures/hwp/memory/lib/utils/axone_c_str.C | 24 ++++++++++++++++++++++ .../procedures/hwp/memory/lib/utils/axone_pos.C | 24 ++++++++++++++++++++++ 2 files changed, 48 insertions(+) create mode 100644 src/import/chips/p9a/procedures/hwp/memory/lib/utils/axone_c_str.C create mode 100644 src/import/chips/p9a/procedures/hwp/memory/lib/utils/axone_pos.C (limited to 'src/import/chips/p9a') diff --git a/src/import/chips/p9a/procedures/hwp/memory/lib/utils/axone_c_str.C b/src/import/chips/p9a/procedures/hwp/memory/lib/utils/axone_c_str.C new file mode 100644 index 000000000..03365adc3 --- /dev/null +++ b/src/import/chips/p9a/procedures/hwp/memory/lib/utils/axone_c_str.C @@ -0,0 +1,24 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/import/chips/p9a/procedures/hwp/memory/lib/utils/axone_c_str.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2019 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ diff --git a/src/import/chips/p9a/procedures/hwp/memory/lib/utils/axone_pos.C b/src/import/chips/p9a/procedures/hwp/memory/lib/utils/axone_pos.C new file mode 100644 index 000000000..34047780f --- /dev/null +++ b/src/import/chips/p9a/procedures/hwp/memory/lib/utils/axone_pos.C @@ -0,0 +1,24 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/import/chips/p9a/procedures/hwp/memory/lib/utils/axone_pos.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2019 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ -- cgit v1.2.1