From 6b29b3829fc9ff676662c4e520c13ded41d070fd Mon Sep 17 00:00:00 2001 From: Louis Stermole Date: Mon, 16 Dec 2019 10:16:07 -0500 Subject: Change p9a_mss_freq to work on PROC_CHIP target Previously p9a_mss_freq ran on the MEM_PORT target, even though the freq domain is at the PROC_CHIP level. This change will allow DDIMMs to be binned to the same freq across the domain. Also removes a lot of FAPI_INF messages to reduce UT log size. Change-Id: I7d4e2ee8897fdd62c0672d96cc1731c7a14643dd Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/88736 Tested-by: FSP CI Jenkins Tested-by: Jenkins Server Tested-by: HWSV CI Reviewed-by: STEPHEN GLANCY Tested-by: Hostboot CI Dev-Ready: Louis Stermole Reviewed-by: Mark Pizzutillo Reviewed-by: Jennifer A Stofer Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/89672 Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Reviewed-by: Daniel M Crowell --- .../hwp/memory/lib/freq/axone_freq_traits.H | 7 +- .../hwp/memory/lib/freq/axone_mss_freq.C | 87 ++++++++++++---------- .../procedures/hwp/memory/lib/freq/axone_sync.C | 4 +- 3 files changed, 53 insertions(+), 45 deletions(-) (limited to 'src/import/chips/p9a/procedures/hwp/memory/lib/freq') diff --git a/src/import/chips/p9a/procedures/hwp/memory/lib/freq/axone_freq_traits.H b/src/import/chips/p9a/procedures/hwp/memory/lib/freq/axone_freq_traits.H index 1b4f96d0c..3c21636fc 100644 --- a/src/import/chips/p9a/procedures/hwp/memory/lib/freq/axone_freq_traits.H +++ b/src/import/chips/p9a/procedures/hwp/memory/lib/freq/axone_freq_traits.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2019 */ +/* Contributors Listed Below - COPYRIGHT 2019,2020 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -56,14 +56,15 @@ class frequency_traits ////////////////////////////////////////////////////////////// static constexpr fapi2::TargetType PORT_TARGET_TYPE = fapi2::TARGET_TYPE_MEM_PORT; static constexpr fapi2::TargetType FREQ_TARGET_TYPE = fapi2::TARGET_TYPE_MEM_PORT; + static constexpr fapi2::TargetType FREQ_DOMAIN_TARGET_TYPE = fapi2::TARGET_TYPE_PROC_CHIP; static constexpr fapi2::TargetType VPD_TARGET_TYPE = fapi2::TARGET_TYPE_OCMB_CHIP; ////////////////////////////////////////////////////////////// // Traits values ////////////////////////////////////////////////////////////// static const std::vector SUPPORTED_FREQS; - // MEM_PORT is our frequency domain. So 1 port per domain - static constexpr uint64_t PORTS_PER_FREQ_DOMAIN = 1; + // PROC_CHIP is our frequency domain + static constexpr uint64_t PORTS_PER_FREQ_DOMAIN = 16; // Max DIMM's per port static constexpr uint64_t MAX_DIMM_PER_PORT = 2; // Maxium number of primary ranks on a DIMM diff --git a/src/import/chips/p9a/procedures/hwp/memory/lib/freq/axone_mss_freq.C b/src/import/chips/p9a/procedures/hwp/memory/lib/freq/axone_mss_freq.C index 1a66aa77a..db6556af3 100644 --- a/src/import/chips/p9a/procedures/hwp/memory/lib/freq/axone_mss_freq.C +++ b/src/import/chips/p9a/procedures/hwp/memory/lib/freq/axone_mss_freq.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2019 */ +/* Contributors Listed Below - COPYRIGHT 2019,2020 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -104,10 +104,13 @@ fapi_try_exit: /// template<> fapi2::ReturnCode set_freq( - const fapi2::Target& i_target, + const fapi2::Target& i_target, const uint64_t i_freq) { - FAPI_TRY( mss::attr::set_freq(i_target, i_freq) ); + for (const auto& l_port : mss::find_targets(i_target)) + { + FAPI_TRY( mss::attr::set_freq(l_port, i_freq) ); + } fapi_try_exit: return fapi2::current_err; @@ -191,7 +194,7 @@ fapi_try_exit: /// template<> fapi2::ReturnCode callout_bad_freq_calculated( - const fapi2::Target& i_target, + const fapi2::Target& i_target, const uint64_t i_final_freq) { using TT = mss::frequency_traits; @@ -265,8 +268,6 @@ fapi2::ReturnCode check_freq_support_vpd( const fapi2::Ta FAPI_TRY(convert_ddr_freq_to_omi_freq(i_target, i_proposed_freq, l_omi_freq)); l_vpd_info.iv_omi_freq_mhz = l_omi_freq; - FAPI_INF("Setting VPD info OMI frequency: %d Gbps, for DDR frequency %d MT/s", - l_vpd_info.iv_omi_freq_mhz, i_proposed_freq); // DDIMM SPD can contain different SI settings for each master rank. // To determine which frequencies are supported, we have to check for each valid @@ -287,12 +288,10 @@ fapi2::ReturnCode check_freq_support_vpd( const fapi2::Ta } l_vpd_info.iv_rank = l_rank.get_dimm_rank(); - FAPI_INF("%s. VPD info - checking rank: %d", - mss::c_str(i_target), l_rank.get_dimm_rank()); // Check if this VPD configuration is supported FAPI_TRY(is_vpd_config_supported(l_vpd_target, i_proposed_freq, l_vpd_info, o_supported), - "%s failed to determine if %u freq is supported", mss::c_str(i_target), i_proposed_freq); + "%s failed to determine if %u freq is supported on rank %d", mss::c_str(i_target), i_proposed_freq, l_vpd_info.iv_rank); // If we fail any of the ranks, then this VPD configuration is not supported if(o_supported == false) @@ -307,29 +306,34 @@ fapi_try_exit: } /// -/// @brief Update supported frequency scoreboard according to processor limits - specialization for Axone and MEM_PORT +/// @brief Update supported frequency scoreboard according to processor limits - specialization for Axone and PROC_CHIP /// @param[in] i_target processor frequency domain /// @param[in,out] io_scoreboard scoreboard of port targets supporting each frequency /// @return FAPI2_RC_SUCCESS iff ok /// template<> fapi2::ReturnCode limit_freq_by_processor( - const fapi2::Target& i_target, + const fapi2::Target& i_target, freq_scoreboard& io_scoreboard) { - std::vector l_converted_omi_freqs; - // OCMB always needs to be in sync between OMI and DDR, by the given ratio // so we convert the supported OMI freqs and remove every other DDR freq // from the scoreboard - for (const auto l_omi_freq : AXONE_OMI_FREQS) + for (const auto& l_port : mss::find_targets(i_target)) { - uint64_t l_ddr_freq = 0; - FAPI_TRY(convert_omi_freq_to_ddr_freq(i_target, l_omi_freq, l_ddr_freq)); - l_converted_omi_freqs.push_back(l_ddr_freq); - } + const auto l_port_pos = mss::relative_pos(l_port); - FAPI_TRY(io_scoreboard.remove_freqs_not_on_list(0, l_converted_omi_freqs)); + std::vector l_converted_omi_freqs; + + for (const auto l_omi_freq : AXONE_OMI_FREQS) + { + uint64_t l_ddr_freq = 0; + FAPI_TRY(convert_omi_freq_to_ddr_freq(l_port, l_omi_freq, l_ddr_freq)); + l_converted_omi_freqs.push_back(l_ddr_freq); + } + + FAPI_TRY(io_scoreboard.remove_freqs_not_on_list(l_port_pos, l_converted_omi_freqs)); + } fapi_try_exit: return fapi2::current_err; @@ -353,12 +357,12 @@ fapi2::ReturnCode num_master_ranks_per_dimm( /// @brief Calls out the target if no DIMM frequencies are supported - specialization for Axone and MEM_PORT /// @param[in] i_target target on which to operate /// @param[in] i_supported_freq true if any FREQ's are supported -/// @param[in,out] i_num_ports number of configured ports (always 1 for Axone) +/// @param[in,out] i_num_ports number of configured ports /// @return FAPI2_RC_SUCCESS iff ok /// template<> fapi2::ReturnCode callout_no_common_freq( - const fapi2::Target& i_target, + const fapi2::Target& i_target, const bool i_supported_freq, const uint64_t i_num_ports) { @@ -387,7 +391,7 @@ fapi_try_exit: /// template<> fapi2::ReturnCode callout_max_freq_empty_set( - const fapi2::Target& i_target, + const fapi2::Target& i_target, const std::vector>& i_vpd_supported_freqs) { @@ -402,21 +406,26 @@ fapi2::ReturnCode callout_max_freq_empty_set( uint32_t l_max_mrw_freqs[NUM_MAX_FREQS] = {0}; FAPI_TRY( mss::attr::get_max_allowed_dimm_freq(l_max_mrw_freqs) ); - FAPI_ASSERT(false, - fapi2::P9A_MSS_MRW_FREQ_MAX_FREQ_EMPTY_SET() - .set_MSS_VPD_FREQ_0(l_port_vpd_max_freq[0]) - .set_MSS_VPD_FREQ_1(l_port_vpd_max_freq[1]) - .set_MSS_VPD_FREQ_2(l_port_vpd_max_freq[2]) - .set_MSS_MAX_FREQ_0(l_max_mrw_freqs[0]) - .set_MSS_MAX_FREQ_1(l_max_mrw_freqs[1]) - .set_MSS_MAX_FREQ_2(l_max_mrw_freqs[2]) - .set_MSS_MAX_FREQ_3(l_max_mrw_freqs[3]) - .set_MSS_MAX_FREQ_4(l_max_mrw_freqs[4]) - .set_OMI_FREQ_0(fapi2::ENUM_ATTR_MSS_OCMB_EXP_BOOT_CONFIG_SERDES_FREQUENCY_SERDES_21_33GBPS) - .set_OMI_FREQ_1(fapi2::ENUM_ATTR_MSS_OCMB_EXP_BOOT_CONFIG_SERDES_FREQUENCY_SERDES_23_46GBPS) - .set_OMI_FREQ_2(fapi2::ENUM_ATTR_MSS_OCMB_EXP_BOOT_CONFIG_SERDES_FREQUENCY_SERDES_25_60GBPS) - .set_PORT_TARGET(i_target), - "%s didn't find a supported frequency for the port", mss::c_str(i_target)); + for (const auto& l_port : mss::find_targets(i_target)) + { + FAPI_ASSERT_NOEXIT(false, + fapi2::P9A_MSS_MRW_FREQ_MAX_FREQ_EMPTY_SET() + .set_MSS_VPD_FREQ_0(l_port_vpd_max_freq[0]) + .set_MSS_VPD_FREQ_1(l_port_vpd_max_freq[1]) + .set_MSS_VPD_FREQ_2(l_port_vpd_max_freq[2]) + .set_MSS_MAX_FREQ_0(l_max_mrw_freqs[0]) + .set_MSS_MAX_FREQ_1(l_max_mrw_freqs[1]) + .set_MSS_MAX_FREQ_2(l_max_mrw_freqs[2]) + .set_MSS_MAX_FREQ_3(l_max_mrw_freqs[3]) + .set_MSS_MAX_FREQ_4(l_max_mrw_freqs[4]) + .set_OMI_FREQ_0(fapi2::ENUM_ATTR_MSS_OCMB_EXP_BOOT_CONFIG_SERDES_FREQUENCY_SERDES_21_33GBPS) + .set_OMI_FREQ_1(fapi2::ENUM_ATTR_MSS_OCMB_EXP_BOOT_CONFIG_SERDES_FREQUENCY_SERDES_23_46GBPS) + .set_OMI_FREQ_2(fapi2::ENUM_ATTR_MSS_OCMB_EXP_BOOT_CONFIG_SERDES_FREQUENCY_SERDES_25_60GBPS) + .set_TARGET(l_port), + "%s didn't find a supported frequency for any ports in this domain", mss::c_str(l_port)); + } + + return fapi2::RC_P9A_MSS_MRW_FREQ_MAX_FREQ_EMPTY_SET; fapi_try_exit: return fapi2::current_err; @@ -425,14 +434,14 @@ namespace check { /// -/// @brief Checks the final frequency for the system type - Axone and MEM_PORT specialization +/// @brief Checks the final frequency for the system type - Axone and PROC_CHIP specialization /// @param[in] i_target the target on which to operate /// @return FAPI2_RC_SUCCESS iff okay /// @note This function was needed in Nimbus to enforce a frequency limit due to a hardware limitation /// and is not needed here. /// template<> -fapi2::ReturnCode final_freq(const fapi2::Target& i_target) +fapi2::ReturnCode final_freq(const fapi2::Target& i_target) { return fapi2::FAPI2_RC_SUCCESS; } diff --git a/src/import/chips/p9a/procedures/hwp/memory/lib/freq/axone_sync.C b/src/import/chips/p9a/procedures/hwp/memory/lib/freq/axone_sync.C index 97f95c7b8..1e3aea1a5 100644 --- a/src/import/chips/p9a/procedures/hwp/memory/lib/freq/axone_sync.C +++ b/src/import/chips/p9a/procedures/hwp/memory/lib/freq/axone_sync.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2019 */ +/* Contributors Listed Below - COPYRIGHT 2019,2020 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -186,8 +186,6 @@ fapi2::ReturnCode select_omi_freq(const std::map< fapi2::Target