From a87142ef61562fe484f8000d803ccae4603bbb91 Mon Sep 17 00:00:00 2001 From: Andre Marin Date: Tue, 5 Sep 2017 11:04:23 -0500 Subject: Remove logic to disable memory clocks in STR if in PD_AND_STR_CLK_STOP mode Do not disable memory clocks when in STR if power control mode PD_AND_STR_CLK_STOP (ie. treat it the same as PD_AND_STR). Removing EC Chip level check since there isn't a current plan for a RIT fix. Change-Id: Ib3728158bd9de46262bd1c21310382ba62a27528 Original-Change-Id: I298561c39a2419ed7f92e90c9eeaf8924fc412bc CQ:HW416315 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45653 Tested-by: FSP CI Jenkins Reviewed-by: Michael D. Pardeik Tested-by: Jenkins Server Reviewed-by: JACOB L. HARVEY Tested-by: Hostboot CI Reviewed-by: STEPHEN GLANCY Reviewed-by: Louis Stermole Reviewed-by: Matt K. Light Reviewed-by: Daniel M. Crowell Reviewed-by: Jennifer A. Stofer Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/82434 Reviewed-by: Daniel M Crowell Tested-by: Daniel M Crowell --- src/import/chips/p9/procedures/hwp/memory/lib/mc/mc.C | 7 ------- 1 file changed, 7 deletions(-) (limited to 'src/import/chips/p9') diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mc/mc.C b/src/import/chips/p9/procedures/hwp/memory/lib/mc/mc.C index be4663b4d..86915080f 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/mc/mc.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/mc/mc.C @@ -160,13 +160,6 @@ fapi2::ReturnCode set_str_reg(const fapi2::Target& i_tar break; } - // MCA_MBASTR0Q_CFG_DIS_CLK_IN_STR: Set to 1 for PD_AND_STR_CLK_STOP, otherwise clear the bit - // Only for DD2.0 and above, will not work for DD1.* HW - if( !chip_ec_feature_mss_dis_clk_in_str(i_target) ) - { - l_data.writeBit(l_str_enable == PD_AND_STR_CLK_STOP); - } - l_data.insertFromRight(ENTER_STR_TIME); FAPI_TRY(mss::putScom(i_target, MCA_MBASTR0Q, l_data), "Error in set_str_reg" ); -- cgit v1.2.1