From 97fc5523bba37078bca09dec8ddecc6724f914aa Mon Sep 17 00:00:00 2001 From: Stephen Glancy Date: Fri, 24 Jan 2020 16:35:25 -0500 Subject: Adds MCBIST functional verification tests Change-Id: I122de19702ea9a7e30534d752925c1498012bf2f Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/90791 Tested-by: FSP CI Jenkins Reviewed-by: Louis Stermole Tested-by: Jenkins Server Dev-Ready: STEPHEN GLANCY Tested-by: Hostboot CI Reviewed-by: Mark Pizzutillo Reviewed-by: ANDRE A MARIN Reviewed-by: Jennifer A Stofer Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/90815 Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Reviewed-by: Daniel M Crowell --- src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist_traits.H | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'src/import/chips/p9') diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist_traits.H b/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist_traits.H index c57ededbe..7d9d3ab2c 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist_traits.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist_traits.H @@ -300,6 +300,10 @@ class mcbistTraits enum { + // The start/end address config registers have common lengths and bits, just including 1 below + MCB_ADDR_CONFIG = MCBIST_MCBEA0Q_CFG_END_ADDR_0, + MCB_ADDR_CONFIG_LEN = MCBIST_MCBEA0Q_CFG_END_ADDR_0_LEN, + // Subtest control bits. These are the same in all '16 bit subtest' field COMPL_1ST_CMD = MCBIST_MCBMR0Q_MCBIST_CFG_TEST00_COMPL_1ST_CMD, COMPL_2ND_CMD = MCBIST_MCBMR0Q_MCBIST_CFG_TEST00_COMPL_2ND_CMD, @@ -557,6 +561,7 @@ class mcbistTraits MCB_WAT_DEBUG_ATTN = MCBIST_MCBISTFIRQ_WAT_DEBUG_ATTN, MCB_PROGRAM_COMPLETE_MASK = MCB_PROGRAM_COMPLETE, MCB_WAT_DEBUG_ATTN_MASK = MCB_WAT_DEBUG_ATTN, + MCB_DATA_ERROR = MCBIST_MCBISTFIRQ_MCBIST_DATA_ERROR, //XLT address valid offset XLT0_SLOT1_D_VALID = MCS_PORT13_MCP0XLT0_SLOT1_VALID, -- cgit v1.2.1