From 128fb5c2139a0d9ae4d5a23a95ff864392a59b5f Mon Sep 17 00:00:00 2001 From: Brian Silver Date: Wed, 2 Nov 2016 08:40:07 -0500 Subject: Change mss training to fail on any disabled bits Change-Id: Iec485a39af9e41edd9ba1356d17cb04fa3fc556f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32111 Tested-by: Jenkins Server Reviewed-by: Louis Stermole Reviewed-by: STEPHEN GLANCY Tested-by: Hostboot CI Dev-Ready: Brian R. Silver Reviewed-by: ANDRE A. MARIN Reviewed-by: Jennifer A. Stofer Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32117 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell --- src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'src/import/chips/p9') diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C b/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C index f6e8b01e8..4d848fcff 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C @@ -526,8 +526,8 @@ fapi2::ReturnCode process_initial_cal_errors( const fapi2::Target