From f0d08f1119803683879a6c1ac8eab7238b3e8d8d Mon Sep 17 00:00:00 2001 From: Joe McGill Date: Wed, 18 Oct 2017 13:41:51 -0500 Subject: Chip address extension workaround for HW423589 (option2), part1 chip_ec_attributes.xml nest_attributes.xml p9_sbe_attributes.xml add ATTR_CHIP_EC_FEATURE_EXTENDED_ADDRESSING_MODE, defines set of chips which physically support the feature add ATTR_CHIP_EC_FEATURE_HW423589_OPTION2, defines set of chips which need extended address workaround for MCD issue (applied only to Nimbus EC 21) add ATTR_MAX_INTERLEAVE_GROUP_SIZE, to restrict maximum size of memory groups formed. Written by p9_mss_eff_grouping. For HW423589_OPTION2, this will default to 512GB add ATTR_FABRIC_ADDR_EXTENSION_[GROUP|CHIP]_ID, to hold extended address configuration. Written by p9_sbe_fabricinit (SBE) and p9_mss_eff_grouping (HB). For HW423589_OPTION2, this will default to 0b0000_111, consuming all chip ID bits for extended addressing. p9_fbc_utils.C p9_fbc_utils.H extend p9_fbc_utils_get_chip_base_address to support address extension, now outputs set of ranges in each msel based on ATTR_FABRIC_ADDR_EXTENSION[GROUP|CHIP]_ID maintain original function for PPE platform which requires knowledge of non-aliased base addresses only, for code size p9_mss_eff_grouping.C p9_mss_eff_grouping_errors.xml set ATTR_FABRIC_ADDR_EXTENSION[GROUP|CHIP]_ID for HB platform restrict size of groups formed for HW423589_OPTION2 p9_sbe_fabricinit.C set ATTR_FABRIC_ADDR_EXTENSION[GROUP|CHIP]_ID for SBE platform configure FBC/NMMU extended addressing registers p9_setup_bars.C p9_setup_bars_defs.H p9_setup_bars_errors.xml add general purpose support for extended address mode for HW423589_OPTION2, configure static MCD setup p9_hcode_image_defines.H p9_hcode_image_build.C customize SGPE image with address extension configuration to apply p9.cxa.scom.initfile p9.int.scom.initfile p9.l2.scom.initfile p9.l3.scom.initfile p9.ncu.scom.initfile p9.nx.scom.initfile p9.trace.scan.initfile p9.vas.scom.initfile p9_hcd_cache_scominit.C p9_hcd_cache_scominit.c p9_pcie_config.C set unit address extension configuration on supported chips p9_rng_init_phase2.C p9_sbe_scominit.C p9c_set_inband_addr.C p9_sbe_load_bootloader.C p9_sbe_mcs_setup.C adapt to alterations in p9_fbc_utils_get_chip_base_address Change-Id: I6731cc5ec940cd19441faf6367be0908fbae7cbe Original-Change-Id: I614d566c073f1169f04f647057e6e85889f1c237 CQ: HW423589 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48576 Reviewed-by: Joseph J. McGill Tested-by: Jenkins Server Tested-by: HWSV CI Tested-by: Hostboot CI Tested-by: FSP CI Jenkins Reviewed-by: Gregory S. Still Tested-by: PPE CI Reviewed-by: Jennifer A. Stofer Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55598 CI-Ready: Daniel M. Crowell Reviewed-by: Daniel M. Crowell Tested-by: Daniel M. Crowell --- .../xml/attribute_info/chip_ec_attributes.xml | 42 ++++++++++++++++++++++ 1 file changed, 42 insertions(+) (limited to 'src/import/chips/p9/procedures') diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index 6d99ce645..80c6a061c 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -5738,4 +5738,46 @@ + + ATTR_CHIP_EC_FEATURE_EXTENDED_ADDRESSING_MODE> + TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP + + Defines chip HW support for extended addressing mode + + + + ENUM_ATTR_NAME_NIMBUS + + 0x20 + GREATER_THAN_OR_EQUAL + + + + ENUM_ATTR_NAME_CUMULUS + + 0x10 + GREATER_THAN_OR_EQUAL + + + + + + + ATTR_CHIP_EC_FEATURE_HW423589_OPTION2> + TARGET_TYPE_PROC_CHIP + + Enable extended addressing mode to workaround MCD + coherency issue HW423589 + + + + ENUM_ATTR_NAME_NIMBUS + + 0x21 + EQUAL + + + + + -- cgit v1.2.1