From 3b3a4658df40f12cd2f1715afd5803ea319f8b49 Mon Sep 17 00:00:00 2001 From: Brian Silver Date: Tue, 2 Aug 2016 11:49:38 -0500 Subject: Add support for phy ac boost Change-Id: I05b7826d8d4831d67b45a9d26302f1345797ca0f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27826 Tested-by: Jenkins Server Reviewed-by: STEPHEN GLANCY Tested-by: Hostboot CI Reviewed-by: Louis Stermole Reviewed-by: JACOB L. HARVEY Reviewed-by: Jennifer A. Stofer Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27827 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell --- .../xml/attribute_info/memory_mr_attributes.xml | 94 +++++++++++----------- .../xml/attribute_info/memory_mt_attributes.xml | 48 +++++------ 2 files changed, 71 insertions(+), 71 deletions(-) (limited to 'src/import/chips/p9/procedures/xml/attribute_info') diff --git a/src/import/chips/p9/procedures/xml/attribute_info/memory_mr_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/memory_mr_attributes.xml index 93234ea92..db6be426b 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/memory_mr_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/memory_mr_attributes.xml @@ -35,7 +35,7 @@ num 0 1 - mss_vpd_mr_0_version_layout + vpd_mr_0_version_layout @@ -50,7 +50,7 @@ num 1 1 - mss_vpd_mr_1_version_data + vpd_mr_1_version_data @@ -65,7 +65,7 @@ hash 2 4 - mss_vpd_mr_2_signature_hash + vpd_mr_2_signature_hash @@ -80,7 +80,7 @@ tick 6 2 - mss_vpd_mr_mc_phase_rot_addr_a00 + vpd_mr_mc_phase_rot_addr_a00 2 @@ -96,7 +96,7 @@ tick 8 2 - mss_vpd_mr_mc_phase_rot_addr_a01 + vpd_mr_mc_phase_rot_addr_a01 2 @@ -112,7 +112,7 @@ tick 10 2 - mss_vpd_mr_mc_phase_rot_addr_a02 + vpd_mr_mc_phase_rot_addr_a02 2 @@ -128,7 +128,7 @@ tick 12 2 - mss_vpd_mr_mc_phase_rot_addr_a03 + vpd_mr_mc_phase_rot_addr_a03 2 @@ -144,7 +144,7 @@ tick 14 2 - mss_vpd_mr_mc_phase_rot_addr_a04 + vpd_mr_mc_phase_rot_addr_a04 2 @@ -160,7 +160,7 @@ tick 16 2 - mss_vpd_mr_mc_phase_rot_addr_a05 + vpd_mr_mc_phase_rot_addr_a05 2 @@ -176,7 +176,7 @@ tick 18 2 - mss_vpd_mr_mc_phase_rot_addr_a06 + vpd_mr_mc_phase_rot_addr_a06 2 @@ -192,7 +192,7 @@ tick 20 2 - mss_vpd_mr_mc_phase_rot_addr_a07 + vpd_mr_mc_phase_rot_addr_a07 2 @@ -208,7 +208,7 @@ tick 22 2 - mss_vpd_mr_mc_phase_rot_addr_a08 + vpd_mr_mc_phase_rot_addr_a08 2 @@ -224,7 +224,7 @@ tick 24 2 - mss_vpd_mr_mc_phase_rot_addr_a09 + vpd_mr_mc_phase_rot_addr_a09 2 @@ -240,7 +240,7 @@ tick 26 2 - mss_vpd_mr_mc_phase_rot_addr_a10 + vpd_mr_mc_phase_rot_addr_a10 2 @@ -256,7 +256,7 @@ tick 28 2 - mss_vpd_mr_mc_phase_rot_addr_a11 + vpd_mr_mc_phase_rot_addr_a11 2 @@ -272,7 +272,7 @@ tick 30 2 - mss_vpd_mr_mc_phase_rot_addr_a12 + vpd_mr_mc_phase_rot_addr_a12 2 @@ -288,7 +288,7 @@ tick 32 2 - mss_vpd_mr_mc_phase_rot_addr_a13 + vpd_mr_mc_phase_rot_addr_a13 2 @@ -304,7 +304,7 @@ tick 34 2 - mss_vpd_mr_mc_phase_rot_addr_a17 + vpd_mr_mc_phase_rot_addr_a17 2 @@ -320,7 +320,7 @@ tick 36 2 - mss_vpd_mr_mc_phase_rot_addr_ba0 + vpd_mr_mc_phase_rot_addr_ba0 2 @@ -336,7 +336,7 @@ tick 38 2 - mss_vpd_mr_mc_phase_rot_addr_ba1 + vpd_mr_mc_phase_rot_addr_ba1 2 @@ -352,7 +352,7 @@ tick 40 2 - mss_vpd_mr_mc_phase_rot_addr_bg0 + vpd_mr_mc_phase_rot_addr_bg0 2 @@ -368,7 +368,7 @@ tick 42 2 - mss_vpd_mr_mc_phase_rot_addr_bg1 + vpd_mr_mc_phase_rot_addr_bg1 2 @@ -384,7 +384,7 @@ tick 44 2 - mss_vpd_mr_mc_phase_rot_addr_c0 + vpd_mr_mc_phase_rot_addr_c0 2 @@ -400,7 +400,7 @@ tick 46 2 - mss_vpd_mr_mc_phase_rot_addr_c1 + vpd_mr_mc_phase_rot_addr_c1 2 @@ -416,7 +416,7 @@ tick 48 2 - mss_vpd_mr_mc_phase_rot_addr_c2 + vpd_mr_mc_phase_rot_addr_c2 2 @@ -432,7 +432,7 @@ tick 50 2 - mss_vpd_mr_mc_phase_rot_d0_clk0 + vpd_mr_mc_phase_rot_d0_clk0 2 @@ -448,7 +448,7 @@ tick 52 2 - mss_vpd_mr_mc_phase_rot_d0_clk1 + vpd_mr_mc_phase_rot_d0_clk1 2 @@ -464,7 +464,7 @@ tick 54 2 - mss_vpd_mr_mc_phase_rot_d1_clk0 + vpd_mr_mc_phase_rot_d1_clk0 2 @@ -480,7 +480,7 @@ tick 56 2 - mss_vpd_mr_mc_phase_rot_d1_clk1 + vpd_mr_mc_phase_rot_d1_clk1 2 @@ -496,7 +496,7 @@ tick 58 2 - mss_vpd_mr_mc_phase_rot_cmd_actn + vpd_mr_mc_phase_rot_cmd_actn 2 @@ -512,7 +512,7 @@ tick 60 2 - mss_vpd_mr_mc_phase_rot_cmd_addr_casn_a15 + vpd_mr_mc_phase_rot_cmd_addr_casn_a15 2 @@ -528,7 +528,7 @@ tick 62 2 - mss_vpd_mr_mc_phase_rot_cmd_addr_rasn_a16 + vpd_mr_mc_phase_rot_cmd_addr_rasn_a16 2 @@ -544,7 +544,7 @@ tick 64 2 - mss_vpd_mr_mc_phase_rot_cmd_addr_wen_a14 + vpd_mr_mc_phase_rot_cmd_addr_wen_a14 2 @@ -560,7 +560,7 @@ tick 66 2 - mss_vpd_mr_mc_phase_rot_cmd_par + vpd_mr_mc_phase_rot_cmd_par 2 @@ -576,7 +576,7 @@ tick 68 2 - mss_vpd_mr_mc_phase_rot_cntl_d0_cke0 + vpd_mr_mc_phase_rot_cntl_d0_cke0 2 @@ -592,7 +592,7 @@ tick 70 2 - mss_vpd_mr_mc_phase_rot_cntl_d0_cke1 + vpd_mr_mc_phase_rot_cntl_d0_cke1 2 @@ -608,7 +608,7 @@ tick 72 2 - mss_vpd_mr_mc_phase_rot_cntl_d1_cke0 + vpd_mr_mc_phase_rot_cntl_d1_cke0 2 @@ -624,7 +624,7 @@ tick 74 2 - mss_vpd_mr_mc_phase_rot_cntl_d1_cke1 + vpd_mr_mc_phase_rot_cntl_d1_cke1 2 @@ -640,7 +640,7 @@ tick 76 2 - mss_vpd_mr_mc_phase_rot_cntl_d0_csn0 + vpd_mr_mc_phase_rot_cntl_d0_csn0 2 @@ -656,7 +656,7 @@ tick 78 2 - mss_vpd_mr_mc_phase_rot_cntl_d0_csn1 + vpd_mr_mc_phase_rot_cntl_d0_csn1 2 @@ -672,7 +672,7 @@ tick 80 2 - mss_vpd_mr_mc_phase_rot_cntl_d1_csn0 + vpd_mr_mc_phase_rot_cntl_d1_csn0 2 @@ -688,7 +688,7 @@ tick 82 2 - mss_vpd_mr_mc_phase_rot_cntl_d1_csn1 + vpd_mr_mc_phase_rot_cntl_d1_csn1 2 @@ -704,7 +704,7 @@ tick 84 2 - mss_vpd_mr_mc_phase_rot_cntl_d0_odt0 + vpd_mr_mc_phase_rot_cntl_d0_odt0 2 @@ -720,7 +720,7 @@ tick 86 2 - mss_vpd_mr_mc_phase_rot_cntl_d0_odt1 + vpd_mr_mc_phase_rot_cntl_d0_odt1 2 @@ -736,7 +736,7 @@ tick 88 2 - mss_vpd_mr_mc_phase_rot_cntl_d1_odt0 + vpd_mr_mc_phase_rot_cntl_d1_odt0 2 @@ -752,7 +752,7 @@ tick 90 2 - mss_vpd_mr_mc_phase_rot_cntl_d1_odt1 + vpd_mr_mc_phase_rot_cntl_d1_odt1 2 @@ -768,7 +768,7 @@ num 92 2 - mss_vpd_mr_mc_2n_mode_autoset + vpd_mr_mc_2n_mode_autoset 2 diff --git a/src/import/chips/p9/procedures/xml/attribute_info/memory_mt_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/memory_mt_attributes.xml index 18adcab59..01a1e791c 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/memory_mt_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/memory_mt_attributes.xml @@ -35,7 +35,7 @@ num 0 1 - mss_vpd_mt_0_version_layout + vpd_mt_0_version_layout @@ -50,7 +50,7 @@ num 1 1 - mss_vpd_mt_1_version_data + vpd_mt_1_version_data @@ -65,7 +65,7 @@ 2 4 - mss_vpd_mt_2_signature_hash + vpd_mt_2_signature_hash @@ -81,7 +81,7 @@ ohm 6 4 - mss_vpd_mt_dimm_rcd_ibt + vpd_mt_dimm_rcd_ibt 2 2 @@ -98,7 +98,7 @@ ohm 10 8 - mss_vpd_mt_dram_drv_imp_dq_dqs + vpd_mt_dram_drv_imp_dq_dqs 2 2 2 @@ -115,7 +115,7 @@ ohm 18 8 - mss_vpd_mt_dram_rtt_nom + vpd_mt_dram_rtt_nom 2 2 2 @@ -132,7 +132,7 @@ ohm 26 8 - mss_vpd_mt_dram_rtt_park + vpd_mt_dram_rtt_park 2 2 2 @@ -149,7 +149,7 @@ ohm 34 8 - mss_vpd_mt_dram_rtt_wr + vpd_mt_dram_rtt_wr 2 2 2 @@ -175,7 +175,7 @@ 42 8 - mss_vpd_mt_mc_dq_acboost_rd_up + vpd_mt_mc_dq_acboost_rd_up 2 @@ -201,7 +201,7 @@ 50 8 - mss_vpd_mt_mc_dq_acboost_wr_down + vpd_mt_mc_dq_acboost_wr_down 2 @@ -227,7 +227,7 @@ 58 8 - mss_vpd_mt_mc_dq_acboost_wr_up + vpd_mt_mc_dq_acboost_wr_up 2 @@ -251,7 +251,7 @@ 66 16 - mss_vpd_mt_mc_dq_ctle_cap + vpd_mt_mc_dq_ctle_cap 2 @@ -275,7 +275,7 @@ 82 16 - mss_vpd_mt_mc_dq_ctle_res + vpd_mt_mc_dq_ctle_res 2 @@ -292,7 +292,7 @@ ohm 98 2 - mss_vpd_mt_mc_drv_imp_addr + vpd_mt_mc_drv_imp_addr 2 @@ -309,7 +309,7 @@ ohm 100 2 - mss_vpd_mt_mc_drv_imp_clk + vpd_mt_mc_drv_imp_clk 2 @@ -326,7 +326,7 @@ ohm 102 2 - mss_vpd_mt_mc_drv_imp_cntl + vpd_mt_mc_drv_imp_cntl 2 @@ -343,7 +343,7 @@ ohm 104 2 - mss_vpd_mt_mc_drv_imp_dq_dqs + vpd_mt_mc_drv_imp_dq_dqs 2 @@ -360,7 +360,7 @@ ohm 106 2 - mss_vpd_mt_mc_drv_imp_spcke + vpd_mt_mc_drv_imp_spcke 2 @@ -377,7 +377,7 @@ ohm 108 2 - mss_vpd_mt_mc_rcv_imp_dq_dqs + vpd_mt_mc_rcv_imp_dq_dqs 2 @@ -393,7 +393,7 @@ 110 8 - mss_vpd_mt_odt_rd + vpd_mt_odt_rd 2 2 2 @@ -409,7 +409,7 @@ 118 8 - mss_vpd_mt_odt_wr + vpd_mt_odt_wr 2 2 2 @@ -425,7 +425,7 @@ 126 2 - mss_vpd_mt_vref_dram_wr + vpd_mt_vref_dram_wr 2 @@ -442,7 +442,7 @@ percent of Vdd 128 8 - mss_vpd_mt_vref_mc_rd + vpd_mt_vref_mc_rd 2 @@ -458,7 +458,7 @@ num 136 4 - mss_vpd_mt_windage_rd_ctr + vpd_mt_windage_rd_ctr 2 -- cgit v1.2.1