From 39e3956aba9ee7b7edf53aadcdec8f506429369b Mon Sep 17 00:00:00 2001 From: Prem Shanker Jha Date: Fri, 21 Oct 2016 02:07:16 -0500 Subject: PM: Image layout change for CME/SGPE Region of P9 HOMER. - implements compact image layout for CME - implements compact image layout for SGPE - enhances ring debug infrastructure - implements size check for consolidated CME/SGPE SRAM Image. - Reversal of magic byte used to represent FUSED and NON FUSED core. - enhances putring to support scan ring overrides. - added gptr and time rings - updated in SGPE debug pointer location and boot loader constants. - Fixed ex instance ring issue (need to skip conversion of scan region type for ex instance ring) - memset for CME, SGPE override offset init and sanity check in ring code. Change-Id: Ifb6157dd73a24e0158e6a5f39844d897fba6af56 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32544 Tested-by: Jenkins Server Tested-by: Hostboot CI Reviewed-by: AMIT KUMAR Reviewed-by: CHRISTOPHER M. RIEDL Reviewed-by: Gregory S. Still Reviewed-by: Jennifer A. Stofer Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32567 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell --- .../p9/procedures/utils/stopreg/p9_stop_api.C | 7 + .../p9/procedures/utils/stopreg/p9_stop_api.H | 3 +- .../utils/stopreg/p9_stop_section_defines.H | 88 +++++----- .../p9/procedures/utils/stopreg/p9_stop_util.C | 195 +++++++++++---------- 4 files changed, 151 insertions(+), 142 deletions(-) (limited to 'src/import/chips/p9/procedures/utils/stopreg') diff --git a/src/import/chips/p9/procedures/utils/stopreg/p9_stop_api.C b/src/import/chips/p9/procedures/utils/stopreg/p9_stop_api.C index 1e000e921..66fd00afc 100755 --- a/src/import/chips/p9/procedures/utils/stopreg/p9_stop_api.C +++ b/src/import/chips/p9/procedures/utils/stopreg/p9_stop_api.C @@ -487,6 +487,13 @@ StopReturnCode_t p9_stop_save_cpureg( void* const i_pImage, l_rc = getCoreAndThread( i_pImage, i_pir, &coreId, &threadId ); + if( l_rc ) + { + MY_ERR("Failed to determine Core Id and Thread Id from PIR 0x%016llx", + i_pir); + break; + } + MY_INF( " PIR 0x%016llx coreId %d threadid %d " " registerId %d", i_pir, coreId, threadId, i_regId ); diff --git a/src/import/chips/p9/procedures/utils/stopreg/p9_stop_api.H b/src/import/chips/p9/procedures/utils/stopreg/p9_stop_api.H index 3901ae81a..a10d10e07 100755 --- a/src/import/chips/p9/procedures/utils/stopreg/p9_stop_api.H +++ b/src/import/chips/p9/procedures/utils/stopreg/p9_stop_api.H @@ -78,7 +78,8 @@ typedef enum STOP_SAVE_SCOM_INVALID_ADDRESS = 10, STOP_SAVE_SCOM_INVALID_CHIPLET = 11, STOP_SAVE_SCOM_ENTRY_UPDATE_FAILED = 12, - STOP_SAVE_FAIL = 13, // for internal failure within firmware. + STOP_SAVE_INVALID_FUSED_CORE_STATUS = 13, + STOP_SAVE_FAIL = 14, // for internal failure within firmware. } StopReturnCode_t; /** diff --git a/src/import/chips/p9/procedures/utils/stopreg/p9_stop_section_defines.H b/src/import/chips/p9/procedures/utils/stopreg/p9_stop_section_defines.H index ed34d7544..d660e5fb7 100755 --- a/src/import/chips/p9/procedures/utils/stopreg/p9_stop_section_defines.H +++ b/src/import/chips/p9/procedures/utils/stopreg/p9_stop_section_defines.H @@ -44,57 +44,57 @@ namespace stopImageSection //basic constants enum { - ONE_KB = 1024, - ONE_MB = ONE_KB * ONE_KB, - TWO_MB = 2 * ONE_MB, - MAX_CORE_SCOM_ENTRIES = 15, - MAX_EQ_SCOM_ENTRIES = 15, - MAX_L2_SCOM_ENTRIES = 16, - MAX_L3_SCOM_ENTRIES = 16, - MAX_CORE_ID_SUPPORTED = 23, - MAX_THREAD_ID_SUPPORTED = 3, - MAX_CACHE_SECTN_SIZE_PER_CHIPLET = - MAX_EQ_SCOM_ENTRIES + MAX_L2_SCOM_ENTRIES + MAX_L3_SCOM_ENTRIES, +ONE_KB = 1024, +ONE_MB = ONE_KB * ONE_KB, +TWO_MB = 2 * ONE_MB, +MAX_CORE_SCOM_ENTRIES = 15, +MAX_EQ_SCOM_ENTRIES = 15, +MAX_L2_SCOM_ENTRIES = 16, +MAX_L3_SCOM_ENTRIES = 16, +MAX_CORE_ID_SUPPORTED = 23, +MAX_THREAD_ID_SUPPORTED = 3, +MAX_CACHE_SECTN_SIZE_PER_CHIPLET = + MAX_EQ_SCOM_ENTRIES + MAX_L2_SCOM_ENTRIES + MAX_L3_SCOM_ENTRIES, - // start offset for SPR register restore, core scom or cache scom register - // restore regions in homer image. - CORE_SCOM_SECTN_START = ( TWO_MB + ( 256 * ONE_KB )), //offset from start of chip HOMER - CACHE_SCOM_SECTN_START = ( ONE_MB + ( 128 * ONE_KB )), // start of cache section +// start offset for SPR register restore, core scom or cache scom register +// restore regions in homer image. +CORE_SCOM_SECTN_START = ( TWO_MB + ( 256 * ONE_KB )), //offset from start of chip HOMER +CACHE_SCOM_SECTN_START = ( ONE_MB + ( 128 * ONE_KB )), // start of cache section - //constants in HOMER's header area. - REGULAR_MODE = 0xAA, - FUSE_MODE = 0xBB, - HOMER_MAGIC_WORD = 0x484F4D4552312E30ll, - CACHE_CHIPLET_ID_MIN = 0x10, - CACHE_CHIPLET_ID_MAX = 0x15, - CORE_CHIPLET_ID_MIN = 0x20, - CORE_CHIPLET_ID_MAX = 0x37, - MAX_SPR_RESTORE_INST = 0x08, - SIZE_PER_SPR_RESTORE_INST = ((4 * sizeof(uint8_t)) / sizeof(uint32_t)), +//constants in HOMER's header area. +FUSED_MODE = 0xBB, +NONFUSED_MODE = 0xAA, +CPMR_MAGIC_WORD = 0x43504d525f312e30, +CACHE_CHIPLET_ID_MIN = 0x10, +CACHE_CHIPLET_ID_MAX = 0x15, +CORE_CHIPLET_ID_MIN = 0x20, +CORE_CHIPLET_ID_MAX = 0x37, +MAX_SPR_RESTORE_INST = 0x08, +SIZE_PER_SPR_RESTORE_INST = ((4 * sizeof(uint8_t)) / sizeof(uint32_t)), }; // all section sizes below are in bytes enum { - SCOM_ENTRY_SIZE = 16, - INTERRUPT_HANDLER_SIZE = 8 * ONE_KB, - THREAD_LAUNCHER_SIZE = 256, - THREAD_RESTORE_SECTN = 192, - THREAD_COMPLETION = 64, - THREAD_AREA_SIZE = ONE_KB, - THREAD_SECTN_SIZE = THREAD_RESTORE_SECTN + THREAD_COMPLETION, - CORE_SPR_SECTN_SIZE = ONE_KB, - L2_AREA = (SCOM_ENTRY_SIZE * MAX_L2_SCOM_ENTRIES), - L3_AREA = (SCOM_ENTRY_SIZE * MAX_L2_SCOM_ENTRIES ), - EQ_AREA = SCOM_ENTRY_SIZE * MAX_EQ_SCOM_ENTRIES, - MAX_SIZE_PER_CORE = 8 * ONE_KB, - SPR_RESTORE_PER_CHIP = ( MAX_SIZE_PER_CORE * - ( MAX_CORE_ID_SUPPORTED + 1)) + - ( INTERRUPT_HANDLER_SIZE + THREAD_LAUNCHER_SIZE), - SCOM_SIZE_PER_CORE = ( MAX_CORE_SCOM_ENTRIES + 1 ) * SCOM_ENTRY_SIZE, - SCOM_SIZE_PER_CHIP = SCOM_SIZE_PER_CORE * ( MAX_CORE_ID_SUPPORTED + 1), - SCOM_SIZE_PER_CACHE_CHIPLET = L2_AREA + L3_AREA + EQ_AREA - + SCOM_ENTRY_SIZE, +SCOM_ENTRY_SIZE = 16, +INTERRUPT_HANDLER_SIZE = 8 * ONE_KB, +THREAD_LAUNCHER_SIZE = 256, +THREAD_RESTORE_SECTN = 192, +THREAD_COMPLETION = 64, +THREAD_AREA_SIZE = ONE_KB, +THREAD_SECTN_SIZE = THREAD_RESTORE_SECTN + THREAD_COMPLETION, +CORE_SPR_SECTN_SIZE = ONE_KB, +L2_AREA = (SCOM_ENTRY_SIZE * MAX_L2_SCOM_ENTRIES), +L3_AREA = (SCOM_ENTRY_SIZE * MAX_L2_SCOM_ENTRIES ), +EQ_AREA = SCOM_ENTRY_SIZE * MAX_EQ_SCOM_ENTRIES, +MAX_SIZE_PER_CORE = 8 * ONE_KB, +SPR_RESTORE_PER_CHIP = ( MAX_SIZE_PER_CORE * + ( MAX_CORE_ID_SUPPORTED + 1)) + + ( INTERRUPT_HANDLER_SIZE + THREAD_LAUNCHER_SIZE), +SCOM_SIZE_PER_CORE = ( MAX_CORE_SCOM_ENTRIES + 1 ) * SCOM_ENTRY_SIZE, +SCOM_SIZE_PER_CHIP = SCOM_SIZE_PER_CORE * ( MAX_CORE_ID_SUPPORTED + 1), +SCOM_SIZE_PER_CACHE_CHIPLET = L2_AREA + L3_AREA + EQ_AREA + + SCOM_ENTRY_SIZE, //size in byte ends }; diff --git a/src/import/chips/p9/procedures/utils/stopreg/p9_stop_util.C b/src/import/chips/p9/procedures/utils/stopreg/p9_stop_util.C index 0b89c164f..fa13eee64 100755 --- a/src/import/chips/p9/procedures/utils/stopreg/p9_stop_util.C +++ b/src/import/chips/p9/procedures/utils/stopreg/p9_stop_util.C @@ -45,53 +45,53 @@ namespace stopImageSection /** * @brief Returns proc chip's fuse mode status. * @param i_pImage points to start of chip's HOMER image. - * @param o_fuseMode points to fuse mode information. + * @param o_fusedMode points to fuse mode information. * @return STOP_SAVE_SUCCESS if functions succeeds, error code otherwise. */ -StopReturnCode_t isFusedMode( void* const i_pImage, bool* o_fuseMode ) +StopReturnCode_t isFusedMode( void* const i_pImage, bool* o_fusedMode ) { - *o_fuseMode = false; - StopReturnCode_t l_rc = STOP_SAVE_SUCCESS; +*o_fusedMode = false; +StopReturnCode_t l_rc = STOP_SAVE_SUCCESS; - do +do +{ + if( !i_pImage ) { - if( !i_pImage ) - { - MY_ERR( "invalid pointer to HOMER image"); - l_rc = STOP_SAVE_ARG_INVALID_IMG; - break; - } + MY_ERR( "invalid pointer to HOMER image"); + l_rc = STOP_SAVE_ARG_INVALID_IMG; + break; + } - HomerSection_t* pHomerDesc = ( HomerSection_t* ) i_pImage; - HomerImgDesc_t* pHomer = (HomerImgDesc_t*)( pHomerDesc->interrruptHandler ); - - if( SWIZZLE_8_BYTE(HOMER_MAGIC_WORD) != pHomer->homerMagicNumber ) - { - MY_ERR("corrupt or invalid HOMER image location 0x%016llx", - pHomer->homerMagicNumber ); - break; - } + HomerSection_t* pHomerDesc = ( HomerSection_t* ) i_pImage; + HomerImgDesc_t* pHomer = (HomerImgDesc_t*)( pHomerDesc->interrruptHandler ); + if( SWIZZLE_8_BYTE(CPMR_MAGIC_WORD) != pHomer->cpmrMagicWord ) + { + MY_ERR("corrupt or invalid HOMER image location 0x%016llx", + SWIZZLE_8_BYTE(pHomer->cpmrMagicWord) ); + l_rc = STOP_SAVE_ARG_INVALID_IMG; + break; + } - if( (uint8_t) FUSE_MODE == pHomer->fuseModeStatus ) - { - *o_fuseMode = true; - break; - } + if( (uint8_t) FUSED_MODE == pHomer->fusedModeStatus ) + { + *o_fusedMode = true; + break; + } - if( (uint8_t) REGULAR_MODE == pHomer->fuseModeStatus ) - { - break; - } + if( (uint8_t) NONFUSED_MODE == pHomer->fusedModeStatus ) + { + break; + } - MY_ERR("Unexpected value 0x%08x for fuse mode. Bad or corrupt " - "HOMER location", pHomer->fuseModeStatus ); - l_rc = STOP_SAVE_FAIL; + MY_ERR("Unexpected value 0x%08x for fused mode. Bad or corrupt " + "HOMER location", pHomer->fuseModeStatus ); + l_rc = STOP_SAVE_INVALID_FUSED_CORE_STATUS ; - } - while(0); +} +while(0); - return l_rc; +return l_rc; } //---------------------------------------------------------------------- @@ -99,80 +99,81 @@ StopReturnCode_t isFusedMode( void* const i_pImage, bool* o_fuseMode ) StopReturnCode_t getCoreAndThread( void* const i_pImage, const uint64_t i_pir, uint32_t* o_pCoreId, uint32_t* o_pThreadId ) { - StopReturnCode_t l_rc = STOP_SAVE_SUCCESS; +StopReturnCode_t l_rc = STOP_SAVE_SUCCESS; - do +do +{ + // for SPR restore using 'Virtual Thread' and 'Physical Core' number + // In Fused Mode: + // bit b28 and b31 of PIR give physical core and b29 and b30 gives + // virtual thread id. + // In Non Fused Mode + // bit 28 and b29 of PIR give both logical and physical core number + // whereas b30 and b31 gives logical and virtual thread id. + bool fusedMode = false; + uint8_t coreThreadInfo = (uint8_t)i_pir; + *o_pCoreId = 0; + *o_pThreadId = 0; + l_rc = isFusedMode( i_pImage, &fusedMode ); + + if( l_rc ) { - // for SPR restore using 'Virtual Thread' and 'Physical Core' number - // In Fuse Mode: - // bit b28 and b31 of PIR give physical core and b29 and b30 gives - // virtual thread id. - // In Non Fuse Mode - // bit 28 and b29 of PIR give both logical and physical core number - // whereas b30 and b31 gives logical and virtual thread id. - bool fuseMode = false; - uint8_t coreThreadInfo = (uint8_t)i_pir; - *o_pCoreId = 0; - *o_pThreadId = 0; - l_rc = isFusedMode( i_pImage, &fuseMode ); - - if( l_rc ) + MY_ERR(" Checking Fused mode. Read failed 0x%08x", l_rc ); + break; + } + + if( fusedMode ) + { + if( coreThreadInfo & FUSED_CORE_BIT1 ) + { + *o_pThreadId = 2; + } + + if( coreThreadInfo & FUSED_CORE_BIT2 ) + { + *o_pThreadId += 1; + } + + if( coreThreadInfo & FUSED_CORE_BIT0 ) + { + *o_pCoreId = 2; + } + + if( coreThreadInfo & FUSED_CORE_BIT3 ) + { + *o_pCoreId += 1; + } + } + else + { + if( coreThreadInfo & FUSED_CORE_BIT0 ) { - MY_ERR(" Checking Fuse mode. Read failed 0x%08x", l_rc ); - break; + *o_pCoreId = 2; } - if( fuseMode ) + if ( coreThreadInfo & FUSED_CORE_BIT1 ) { - if( coreThreadInfo & FUSE_BIT1 ) - { - *o_pThreadId = 2; - } - - if( coreThreadInfo & FUSE_BIT2 ) - { - *o_pThreadId += 1; - } - - if( coreThreadInfo & FUSE_BIT0 ) - { - *o_pCoreId = 2; - } - - if( coreThreadInfo & FUSE_BIT3 ) - { - *o_pCoreId += 1; - } + *o_pCoreId += 1; } - else + + if( coreThreadInfo & FUSED_CORE_BIT2 ) { - if( coreThreadInfo & FUSE_BIT0 ) - { - *o_pCoreId = 2; - } - - if ( coreThreadInfo & FUSE_BIT1 ) - { - *o_pCoreId += 1; - } - - if( coreThreadInfo & FUSE_BIT2 ) - { - *o_pThreadId = 2; - } - - if( coreThreadInfo & FUSE_BIT3 ) - { - *o_pThreadId += 1; - } + *o_pThreadId = 2; } - //quad field is not affected by fuse mode - *o_pCoreId += 4 * (( coreThreadInfo & 0x70 ) >> 4 ); + if( coreThreadInfo & FUSED_CORE_BIT3 ) + { + *o_pThreadId += 1; + } } - while(0); - return l_rc; + MY_INF("Core Type %s", fusedMode ? "Fused" : "Un-Fused" ); + //quad field is not affected by fuse mode + *o_pCoreId += 4 * (( coreThreadInfo & 0x70 ) >> 4 ); +} +while(0); + +return l_rc; } #ifdef __cplusplus -- cgit v1.2.1