From f43da019dd692145c0f761a537041e5caf451828 Mon Sep 17 00:00:00 2001 From: Sumit Kumar Date: Tue, 31 Jan 2017 04:50:15 -0600 Subject: Centaur ring support - ring_apply and ring data - Introduces Centaur ring ID header files and ring_apply support to generate a separate Centaur ring image file. - Introduces common ring ID header file consumed by both P9 and Centaur and all user codes, e.g. putRing, ipl_build, xip_tool, etc. - Introduces a namespace approach for complete separation of P9 and Centaur ring data and to facilitate execution time selection of either P9 and Centaur ring data. - Added Centaur image .rings generation function to p9_ring_apply. - This commit does NOT support Centaur in the TOR API nor in xip_tool. See commit 38018 for that support. - Modified hw_image.mk file to support Centaur XIP image generation. - Updated ring_apply to also support .overrides ring gen for Centaur. Change-Id: I12a27b194dc14d906fea7bc273eb9f766f0fc5bf Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35639 Tested-by: HWSV CI Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Sumit Kumar Tested-by: PPE CI Reviewed-by: Richard J. Knight Reviewed-by: Thi N. Tran Tested-by: Hostboot CI Reviewed-by: Jennifer A. Stofer Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36011 Reviewed-by: Hostboot Team Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Reviewed-by: Christian R. Geddes --- .../p9/procedures/hwp/accessors/p9_get_mvpd_ring.C | 2 +- .../p9/procedures/hwp/accessors/p9_get_mvpd_ring.H | 4 +- .../procedures/hwp/accessors/p9_mvpd_ring_funcs.C | 47 +++--- .../procedures/hwp/accessors/p9_mvpd_ring_funcs.H | 6 +- .../p9/procedures/hwp/customize/p9_xip_customize.C | 183 +++++++-------------- .../p9/procedures/hwp/lib/p9_hcode_image_defines.H | 1 - .../p9/procedures/hwp/pm/p9_hcode_image_build.C | 30 ++-- 7 files changed, 106 insertions(+), 167 deletions(-) (limited to 'src/import/chips/p9/procedures/hwp') diff --git a/src/import/chips/p9/procedures/hwp/accessors/p9_get_mvpd_ring.C b/src/import/chips/p9/procedures/hwp/accessors/p9_get_mvpd_ring.C index b98a7cb30..6cb36c88b 100644 --- a/src/import/chips/p9/procedures/hwp/accessors/p9_get_mvpd_ring.C +++ b/src/import/chips/p9/procedures/hwp/accessors/p9_get_mvpd_ring.C @@ -55,7 +55,7 @@ extern "C" fapi2::MvpdKeyword i_keyword, const uint8_t i_chipletId, const uint8_t i_evenOdd, - const uint8_t i_ringId, + const RingId_t i_ringId, uint8_t* o_pRingBuf, uint32_t& io_rRingBufsize ) { diff --git a/src/import/chips/p9/procedures/hwp/accessors/p9_get_mvpd_ring.H b/src/import/chips/p9/procedures/hwp/accessors/p9_get_mvpd_ring.H index 352f8ae07..385cdbe8d 100644 --- a/src/import/chips/p9/procedures/hwp/accessors/p9_get_mvpd_ring.H +++ b/src/import/chips/p9/procedures/hwp/accessors/p9_get_mvpd_ring.H @@ -45,7 +45,7 @@ typedef ReturnCode (*getMvpdRing_FP_t) ( MvpdKeyword, const uint8_t, const uint64_t, - const uint8_t, + const RingId_t, uint8_t*, uint32_t& ); @@ -98,7 +98,7 @@ extern "C" MvpdKeyword i_keyword, const uint8_t i_chipletId, const uint8_t i_evenOdd, - const uint8_t i_ringId, + const RingId_t i_ringId, uint8_t* o_pRingBuf, uint32_t& io_rRingBufsize ); diff --git a/src/import/chips/p9/procedures/hwp/accessors/p9_mvpd_ring_funcs.C b/src/import/chips/p9/procedures/hwp/accessors/p9_mvpd_ring_funcs.C index e4ba01b64..dc01832e7 100644 --- a/src/import/chips/p9/procedures/hwp/accessors/p9_mvpd_ring_funcs.C +++ b/src/import/chips/p9/procedures/hwp/accessors/p9_mvpd_ring_funcs.C @@ -37,18 +37,22 @@ // *HWP Consumed by: HOSTBOOT, CRONUS // -#include +#include +#include + +namespace P9_RID +{ +#include +} + +#include // fapi2 support -#include -#include -#include -#include +#include +#include +#include -// pull in CompressedScanData def from proc_slw_build HWP -#include -#include -#include +using namespace P9_RID; extern "C" { @@ -61,7 +65,7 @@ extern "C" & i_fapiTarget, CompressedScanData* i_pRing, uint8_t i_chipletId, - uint8_t i_ringId, + RingId_t i_ringId, uint32_t i_ringBufsize); fapi2::ReturnCode mvpdRingFuncFind( const fapi2::Target @@ -70,7 +74,7 @@ extern "C" fapi2::MvpdKeyword i_keyword, const uint8_t i_chipletId, const uint8_t i_evenOdd, - const uint8_t i_ringId, + const RingId_t i_ringId, uint8_t* i_pRecordBuf, uint32_t i_recordBufLenfapi, uint8_t*& o_rRingBuf, @@ -208,7 +212,7 @@ extern "C" fapi2::MvpdKeyword i_keyword, const uint8_t i_chipletId, const uint8_t i_evenOdd, - const uint8_t i_ringId, + const RingId_t i_ringId, uint8_t* o_pRingBuf, uint32_t& io_rRingBufsize ) { @@ -439,7 +443,7 @@ extern "C" & i_fapiTarget, const uint8_t i_chipletId, const uint8_t i_evenOdd, - const uint8_t i_ringId, + const RingId_t i_ringId, uint8_t** io_pBufLeft, uint32_t* io_pBufLenLeft, CompressedScanData** o_pScanData) @@ -523,14 +527,15 @@ extern "C" // check if this ring matches the given criteria // (ring ID, chiplet Id, and even/odd for EX) - if ( l_pScanDataOld->iv_ringId == i_ringId && + if ( ( i_ringId <= 0xff && + l_pScanDataOld->iv_ringId == i_ringId ) && l_pScanDataOld->iv_chipletId == i_chipletId && - (l_evenOddMask == 0 || - be64toh(l_pScanDataOld->iv_scanSelect) & l_evenOddMask) ) + ( l_evenOddMask == 0 || + be64toh(l_pScanDataOld->iv_scanSelect) & l_evenOddMask ) ) { // look up ring in p9_ringId and retrieve scanAddr - GenRingIdList* l_ringProp = p9_ringid_get_ring_properties( - (RingID)i_ringId); + GenRingIdList* l_ringProp = p9_ringid_get_ring_properties(i_ringId); + FAPI_ASSERT(l_ringProp, fapi2::MVPD_RINGID_DATA_NOT_FOUND(). set_CHIP_TARGET(i_fapiTarget). @@ -608,7 +613,7 @@ extern "C" & i_fapiTarget, const uint8_t i_chipletId, const uint8_t i_evenOdd, - const uint8_t i_ringId, + const RingId_t i_ringId, uint8_t** io_pBufLeft, uint32_t* io_pBufLenLeft, CompressedScanData** o_pScanData) @@ -746,7 +751,7 @@ extern "C" fapi2::MvpdKeyword i_keyword, const uint8_t i_chipletId, const uint8_t i_evenOdd, - const uint8_t i_ringId, + const RingId_t i_ringId, uint8_t* i_pRecordBuf, uint32_t i_recordBufLen, uint8_t*& o_rpRing, @@ -888,7 +893,7 @@ extern "C" & i_fapiTarget, CompressedScanData* i_pRingBuf, uint8_t i_chipletId, - uint8_t i_ringId, + RingId_t i_ringId, uint32_t i_ringBufsize) { uint8_t l_failedTestVec = 0x00; diff --git a/src/import/chips/p9/procedures/hwp/accessors/p9_mvpd_ring_funcs.H b/src/import/chips/p9/procedures/hwp/accessors/p9_mvpd_ring_funcs.H index b8fae9fd5..449a684cc 100644 --- a/src/import/chips/p9/procedures/hwp/accessors/p9_mvpd_ring_funcs.H +++ b/src/import/chips/p9/procedures/hwp/accessors/p9_mvpd_ring_funcs.H @@ -46,6 +46,8 @@ enum mvpdRingFuncOp MVPD_RING_SET, }; +#define MVPD_END_OF_DATA_MAGIC (uint32_t)0x454E4400 // "END " + typedef ReturnCode (*mvpdRingFuncs_FP_t) ( const Target&, mvpdRingFuncOp, @@ -53,7 +55,7 @@ typedef ReturnCode (*mvpdRingFuncs_FP_t) ( MvpdKeyword, const uint8_t, const uint64_t, - const uint8_t, + const RingId_t, uint8_t*, uint32_t& ); @@ -87,7 +89,7 @@ extern "C" MvpdKeyword i_keyword, const uint8_t i_chipletId, const uint8_t i_evenOdd, - const uint8_t i_ringId, + const RingId_t i_ringId, uint8_t* o_pRingBuf, uint32_t& io_rRingBufsize ); diff --git a/src/import/chips/p9/procedures/hwp/customize/p9_xip_customize.C b/src/import/chips/p9/procedures/hwp/customize/p9_xip_customize.C index 362bd191c..70ab94943 100644 --- a/src/import/chips/p9/procedures/hwp/customize/p9_xip_customize.C +++ b/src/import/chips/p9/procedures/hwp/customize/p9_xip_customize.C @@ -48,7 +48,6 @@ #include #include #include -#include enum MvpdRingStatus { @@ -267,7 +266,7 @@ fapi_try_exit: // Parameter list: // const fapi2::Target &i_target: Processor chip target. // void* i_overlaysSection: Pointer to extracted DD section in hw image -// RingID i_ringId: GPTR ring id +// RingId_t i_ringId: GPTR ring id // void* io_ringBuf2: Work buffer which contains RS4 overlay ring on return. // void* io_ringBuf3: Work buffer which contains data+care raw overlay ring on return. // uint32_t* o_ovlyUncmpSize Uncompressed overlay ring size @@ -278,10 +277,10 @@ int get_overlays_ring( fapi2::ReturnCode get_overlays_ring( const fapi2::Target& i_procTarget, #endif - void* i_overlaysSection, - RingID i_ringId, - void** io_ringBuf2, - void** io_ringBuf3, + void* i_overlaysSection, + RingId_t i_ringId, + void** io_ringBuf2, + void** io_ringBuf3, uint32_t* o_ovlyUncmpSize) { ReturnCode l_fapiRc = fapi2::FAPI2_RC_SUCCESS; @@ -300,11 +299,11 @@ fapi2::ReturnCode get_overlays_ring( FAPI_DBG("Entering get_overlays_ring"); // Get Gptr overlay ring from overlays section into ringBuf2 - l_rc = P9_TOR::tor_get_single_ring( + l_rc = tor_get_single_ring( i_overlaysSection, l_ddLevel, i_ringId, - P9_TOR::SBE, + PT_SBE, OVERLAY, l_instanceId, io_ringBuf2, //Has RS4 Gptr overlay ring on return @@ -557,7 +556,7 @@ fapi2::ReturnCode process_gptr_rings( ReturnCode l_fapiRc = fapi2::FAPI2_RC_SUCCESS; fapi2::current_err = fapi2::FAPI2_RC_SUCCESS; uint32_t l_ovlyUncmpSize = 0; - RingID l_vpdRingId = (RingID)be16toh(((CompressedScanData*)io_vpdRing)->iv_ringId); + RingId_t l_vpdRingId = (RingId_t)be16toh(((CompressedScanData*)io_vpdRing)->iv_ringId); uint32_t l_vpdScanAddr = be32toh(((CompressedScanData*)io_vpdRing)->iv_scanAddr); FAPI_DBG("Entering process_gptr_rings"); @@ -873,106 +872,20 @@ fapi2::ReturnCode _fetch_and_insert_vpd_rings( (i_ring.vpdRingClass == VPD_RING_CLASS_EX_INS ? 1 : 0)) + i_evenOdd; + PpeType_t l_PpeType; + switch (i_sysPhase) { case SYSPHASE_HB_SBE: - l_rc = tor_append_ring( - i_ringSection, - io_ringSectionSize, // In: Exact size. Out: Updated size. - i_ringBuf2, - i_ringBufSize2, // Max size. - (RingID)i_ring.ringId, - P9_TOR::SBE, // We're working on the SBE image - P9_TOR::ALLRING, // No-care - BASE, // All VPD rings are Base ringVariant - l_chipletTorId, // Chiplet instance TOR Index - i_vpdRing ); // The VPD RS4 ring container - - if (l_rc == TOR_SUCCESS) - { - FAPI_INF("Successfully added VPD ring: (ringId,evenOdd,chipletId)=(0x%02X,0x%X,0x%02X)", - i_ring.ringId, i_evenOdd, i_chipletId); - } - else - { - FAPI_ASSERT( false, - fapi2::XIPC_TOR_APPEND_RING_FAILED(). - set_CHIP_TARGET(i_procTarget). - set_TOR_RC(l_rc). - set_RING_ID(i_ring.ringId). - set_OCCURRENCE(1), - "tor_append_ring() failed in HB_SBE phase w/l_rc=%d for ringId=0x%x", - l_rc, i_ring.ringId ); - } - + l_PpeType = PT_SBE; break; case SYSPHASE_RT_CME: - l_rc = tor_append_ring( - i_ringSection, - io_ringSectionSize, // In: Exact size. Out: Updated size. - i_ringBuf2, - i_ringBufSize2, // Max size. - (RingID)i_ring.ringId, - P9_TOR::CME, // We're working on the SBE image - P9_TOR::ALLRING, // No-care - BASE, // All VPD rings are Base ringVariant - l_chipletTorId, // Chiplet instance ID - i_vpdRing ); // The VPD RS4 ring container - - if (l_rc == TOR_SUCCESS) - { - FAPI_INF("Successfully added VPD ring: (ringId,evenOdd,chipletId)=(0x%02X,0x%X,0x%02X)", - i_ring.ringId, i_evenOdd, i_chipletId); - } - else - { - FAPI_ASSERT( false, - fapi2::XIPC_TOR_APPEND_RING_FAILED(). - set_CHIP_TARGET(i_procTarget). - set_TOR_RC(l_rc). - set_RING_ID(i_ring.ringId). - set_OCCURRENCE(2), - "tor_append_ring() failed in RT_CME phase w/l_rc=%d for ringId=0x%x", - l_rc, i_ring.ringId ); - } - - FAPI_DBG("(After tor_append) io_ringSectionSize = %d", io_ringSectionSize); - + l_PpeType = PT_CME; break; case SYSPHASE_RT_SGPE: - l_rc = tor_append_ring( - i_ringSection, - io_ringSectionSize, // In: Exact size. Out: Updated size. - i_ringBuf2, - i_ringBufSize2, // Max size. - (RingID)i_ring.ringId, - P9_TOR::SGPE, // We're working on the SGPE image - P9_TOR::ALLRING, // No-care - BASE, // All VPD rings are Base ringVariant - l_chipletTorId, // Chiplet instance ID - i_vpdRing ); // The VPD RS4 ring container - - if (l_rc == TOR_SUCCESS) - { - FAPI_INF("Successfully added VPD ring: (ringId,evenOdd,chipletId)=(0x%02X,0x%X,0x%02X)", - i_ring.ringId, i_evenOdd, i_chipletId); - } - else - { - FAPI_ASSERT( false, - fapi2::XIPC_TOR_APPEND_RING_FAILED(). - set_CHIP_TARGET(i_procTarget). - set_TOR_RC(l_rc). - set_RING_ID(i_ring.ringId). - set_OCCURRENCE(3), - "tor_append_ring() failed in RT_SGPE phase w/l_rc=%d for ringId=0x%x", - l_rc, i_ring.ringId ); - } - - FAPI_DBG("(After tor_append) io_ringSectionSize = %d", io_ringSectionSize); - + l_PpeType = PT_SGPE; break; default: @@ -985,6 +898,32 @@ fapi2::ReturnCode _fetch_and_insert_vpd_rings( i_sysPhase ); break; } // End switch(sysPhase) + + l_rc = tor_append_ring( + i_ringSection, + io_ringSectionSize, // In: Exact size. Out: Updated size. + i_ringBuf2, + i_ringBufSize2, // Max size. + i_ring.ringId, + l_PpeType, + ALLRING, // No-care + BASE, // All VPD rings are Base ringVariant + l_chipletTorId, // Chiplet instance TOR Index + i_vpdRing ); // The VPD RS4 ring container + + FAPI_ASSERT( l_rc == TOR_SUCCESS, + fapi2::XIPC_TOR_APPEND_RING_FAILED(). + set_CHIP_TARGET(i_procTarget). + set_TOR_RC(l_rc). + set_RING_ID(i_ring.ringId). + set_OCCURRENCE(1), + "tor_append_ring() failed in phase %d w/l_rc=%d for ringId=0x%x", + l_PpeType, l_rc, i_ring.ringId ); + + FAPI_INF("Successfully added VPD ring: (ringId,evenOdd,chipletId)=(0x%02X,0x%X,0x%02X)", + i_ring.ringId, i_evenOdd, i_chipletId); + + FAPI_DBG("(After tor_append) io_ringSectionSize = %d", io_ringSectionSize); } else if ((uint32_t)l_fapiRc == RC_MVPD_RING_NOT_FOUND) { @@ -1184,7 +1123,7 @@ fapi2::ReturnCode fetch_and_insert_vpd_rings( uint8_t l_ringStatusInMvpd = RING_SCAN; bool l_bImgOutOfSpace = false; uint8_t l_eqNumWhenOutOfSpace = 0xF; // Assign invalid value to check for correctness of value when used - uint8_t l_ringType = RING_TYPES::COMMON_RING; + RingType_t l_ringType = INVALID_RING_TYPE; // Initialize activeCoreMask to be filled up with EC column filling as it progresses uint32_t l_activeCoreMask = 0x0; @@ -1210,7 +1149,7 @@ fapi2::ReturnCode fetch_and_insert_vpd_rings( // 1- Add all common rings // ----------------------- - l_ringType = RING_TYPES::COMMON_RING; + l_ringType = COMMON_RING; for (auto vpdType = 0; vpdType < NUM_OF_VPD_TYPES; vpdType++) { @@ -1318,7 +1257,7 @@ fapi2::ReturnCode fetch_and_insert_vpd_rings( // The step #2 instance part is updated looping over chipletId // to fill up one core chipletId "column" at a time (RTC158106). - l_ringType = RING_TYPES::INSTANCE_RING; + l_ringType = INSTANCE_RING; { // Initialize ring id list from VPD_RINGS[1] @@ -1631,7 +1570,7 @@ fapi2::ReturnCode fetch_and_insert_vpd_rings( fapi_try_exit: - if( (l_ringType == RING_TYPES::COMMON_RING) && + if( (l_ringType == COMMON_RING) && (fapi2::current_err != fapi2::FAPI2_RC_SUCCESS) ) { //Error handling: @@ -1642,7 +1581,7 @@ fapi_try_exit: FAPI_DBG("Exiting fetch_and_insert_vpd_rings"); return fapi2::current_err; } - else if( (l_ringType == RING_TYPES::INSTANCE_RING) && + else if( (l_ringType == INSTANCE_RING) && (fapi2::current_err != fapi2::FAPI2_RC_SUCCESS) ) { //Error handling: Any other 'unknown/unexpected' error reported @@ -2517,33 +2456,27 @@ ReturnCode p9_xip_customize ( //------------------------------------------------------------ // Get the CME or SGPE block of rings from .rings in HW image //------------------------------------------------------------ + PpeType_t l_PpeType; + if ( i_sysPhase == SYSPHASE_RT_CME ) { - FAPI_DBG("Getting the CME block of rings from HW image"); - - l_rc = tor_get_block_of_rings( l_hwRingsSection, - attrDdLevel, - P9_TOR::CME, - P9_TOR::ALLRING, - BASE, - 0, - &io_ringSectionBuf, - io_ringSectionBufSize ); + l_PpeType = PT_CME; } else { - FAPI_DBG("Getting the SGPE block of rings from HW image"); - - l_rc = tor_get_block_of_rings( l_hwRingsSection, - attrDdLevel, - P9_TOR::SGPE, - P9_TOR::ALLRING, - BASE, - 0, - &io_ringSectionBuf, - io_ringSectionBufSize ); + l_PpeType = PT_SGPE; } + FAPI_DBG("Getting the Phase %d block of rings from HW image", l_PpeType); + l_rc = tor_get_block_of_rings( l_hwRingsSection, + attrDdLevel, + l_PpeType, + ALLRING, + BASE, + 0, + &io_ringSectionBuf, + io_ringSectionBufSize ); + FAPI_ASSERT( l_rc == 0, fapi2::XIPC_TOR_GET_BLOCK_OF_RINGS_FAILED(). set_CHIP_TARGET(i_procTarget). diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H b/src/import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H index 69d96018b..7a07e7080 100644 --- a/src/import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H +++ b/src/import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H @@ -53,7 +53,6 @@ #ifndef __ASSEMBLER__ #ifdef __cplusplus #ifndef __PPE_PLAT -#include namespace p9_hcodeImageBuild { #endif //__PPE_PLAT diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C b/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C index 1b3dda591..144ead47c 100644 --- a/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C +++ b/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C @@ -1993,7 +1993,8 @@ uint32_t getPpeScanRings( void* const i_pHwImage, uint8_t* pOvrdRingPayload = pOverrideStart + QUAD_COMMON_RING_INDEX_SIZE; uint32_t tempRingLength = 0; uint32_t tempBufSize = 0; - FAPI_DBG("TOR Version : 0x%02x", P9_TOR::tor_version() ); + + FAPI_DBG("TOR Version : 0x%02x", tor_version() ); RingID quadCmnOvrdRingId; for( uint32_t ringIndex = 0; ringIndex < MAX_HOMER_QUAD_CMN_RINGS; @@ -2008,7 +2009,7 @@ uint32_t getPpeScanRings( void* const i_pHwImage, rc = tor_get_single_ring( i_pOverride, i_chipState.getChipLevel(), quadCmnOvrdRingId, - P9_TOR::SBE, + PT_SBE, OVERRIDE, CACHE0_CHIPLET_ID, &i_ringData.iv_pWorkBuf2, @@ -2038,7 +2039,7 @@ uint32_t getPpeScanRings( void* const i_pHwImage, memcpy( pOvrdRingPayload, i_ringData.iv_pWorkBuf2, tempBufSize); uint16_t* pScanRingIndex = (uint16_t*)pOverrideStart; - uint32_t ringStartToHdrOffset = ( TOR_VER_ONE == P9_TOR::tor_version() ) ? RING_START_TO_RS4_OFFSET : 0; + uint32_t ringStartToHdrOffset = ( TOR_VER_ONE == tor_version() ) ? RING_START_TO_RS4_OFFSET : 0; *(pScanRingIndex + ringIndex) = SWIZZLE_2_BYTE((pOvrdRingPayload - pOverrideStart) + ringStartToHdrOffset); @@ -2487,7 +2488,7 @@ fapi2::ReturnCode layoutCmnRingsForCme( Homerlayout_t* i_pHomer, rc = tor_get_single_ring( i_ringData.iv_pRingBuffer, i_chipState.getChipLevel(), coreCmnRingId, - P9_TOR::CME, + PT_CME, l_ringVariant, CORE0_CHIPLET_ID , &i_ringData.iv_pWorkBuf1, @@ -2517,7 +2518,7 @@ fapi2::ReturnCode layoutCmnRingsForCme( Homerlayout_t* i_pHomer, "Failed To Complete CME Ring Layout" ); uint16_t* pScanRingIndex = (uint16_t*) pRingStart; - uint32_t ringStartToHdrOffset = ( TOR_VER_ONE == P9_TOR::tor_version() ) ? RING_START_TO_RS4_OFFSET : 0; + uint32_t ringStartToHdrOffset = ( TOR_VER_ONE == tor_version() ) ? RING_START_TO_RS4_OFFSET : 0; memcpy( pRingPayload, i_ringData.iv_pWorkBuf1, ringSize ); *(pScanRingIndex + ringIndex) = SWIZZLE_2_BYTE((pRingPayload - pRingStart) + ringStartToHdrOffset); @@ -2577,7 +2578,7 @@ fapi2::ReturnCode layoutInstRingsForCme( Homerlayout_t* i_pHomer, uint32_t ringLength = 0; uint32_t tempSize = 0; uint32_t tempRepairLength = 0; - uint32_t ringStartToHdrOffset = ( TOR_VER_ONE == P9_TOR::tor_version() ) ? RING_START_TO_RS4_OFFSET : 0; + uint32_t ringStartToHdrOffset = ( TOR_VER_ONE == tor_version() ) ? RING_START_TO_RS4_OFFSET : 0; if( i_imgType.cmeHcodeBuild ) { @@ -2604,7 +2605,7 @@ fapi2::ReturnCode layoutInstRingsForCme( Homerlayout_t* i_pHomer, rc = tor_get_single_ring( i_ringData.iv_pRingBuffer, i_chipState.getChipLevel(), io_cmeRings.getInstRingId(0), - P9_TOR::CME, + PT_CME, i_ringVariant, CORE0_CHIPLET_ID + ((2 * exId) + coreId), &i_ringData.iv_pWorkBuf1, @@ -2668,7 +2669,7 @@ fapi2::ReturnCode layoutInstRingsForCme( Homerlayout_t* i_pHomer, rc = tor_get_single_ring( i_ringData.iv_pRingBuffer, i_chipState.getChipLevel(), io_cmeRings.getInstRingId(0), - P9_TOR::CME, + PT_CME, i_ringVariant, CORE0_CHIPLET_ID + ((2 * exId) + coreId), &i_ringData.iv_pWorkBuf1, @@ -2747,7 +2748,7 @@ fapi2::ReturnCode layoutCmeScanOverride( Homerlayout_t* i_pHomer, fapi2::current_err = fapi2::FAPI2_RC_SUCCESS; uint32_t tempRingLength = io_ovrdRingLength; uint32_t tempBufSize = 0; - uint32_t ringStartToHdrOffset = ( TOR_VER_ONE == P9_TOR::tor_version() ) ? RING_START_TO_RS4_OFFSET : 0; + uint32_t ringStartToHdrOffset = ( TOR_VER_ONE == tor_version() ) ? RING_START_TO_RS4_OFFSET : 0; RingBucket cmeOvrdRings( PLAT_CME, (uint8_t*)&i_pHomer->cpmrRegion, @@ -2778,7 +2779,7 @@ fapi2::ReturnCode layoutCmeScanOverride( Homerlayout_t* i_pHomer, rc = tor_get_single_ring( i_pOverride, i_chipState.getChipLevel(), coreCmnOvrdRingId, - P9_TOR::SBE, + PT_SBE, OVERRIDE, CORE0_CHIPLET_ID, &i_ringData.iv_pWorkBuf2, @@ -3088,7 +3089,7 @@ fapi2::ReturnCode layoutCmnRingsForSgpe( Homerlayout_t* i_pHomer, RingID torRingId; uint32_t tempLength = 0; uint32_t tempBufSize = i_ringData.iv_sizeWorkBuf1; - uint32_t ringStartToHdrOffset = ( TOR_VER_ONE == P9_TOR::tor_version() ) ? RING_START_TO_RS4_OFFSET : 0; + uint32_t ringStartToHdrOffset = ( TOR_VER_ONE == tor_version() ) ? RING_START_TO_RS4_OFFSET : 0; RingBucket sgpeRings( PLAT_SGPE, (uint8_t*)&i_pHomer->qpmrRegion, @@ -3129,7 +3130,7 @@ fapi2::ReturnCode layoutCmnRingsForSgpe( Homerlayout_t* i_pHomer, rc = tor_get_single_ring( i_ringData.iv_pRingBuffer, i_chipState.getChipLevel(), torRingId, - P9_TOR::SGPE, + PT_SGPE, l_ringVariant, CACHE0_CHIPLET_ID, &i_ringData.iv_pWorkBuf1, @@ -3217,8 +3218,7 @@ fapi2::ReturnCode layoutInstRingsForSgpe( Homerlayout_t* i_pHomer, uint8_t* pRingStart = &i_pHomer->qpmrRegion.sgpeRegion.sgpeSramImage[quadSpecRingStart]; uint8_t* instRingPayLoad = &i_pHomer->qpmrRegion.sgpeRegion.sgpeSramImage[ quadSpecRingStart + QUAD_SPEC_RING_INDEX_LEN ]; - - uint32_t ringStartToHdrOffset = ( TOR_VER_ONE == P9_TOR::tor_version() ) ? RING_START_TO_RS4_OFFSET : 0; + uint32_t ringStartToHdrOffset = ( TOR_VER_ONE == tor_version() ) ? RING_START_TO_RS4_OFFSET : 0; RingID quadSpecRingId; @@ -3247,7 +3247,7 @@ fapi2::ReturnCode layoutInstRingsForSgpe( Homerlayout_t* i_pHomer, rc = tor_get_single_ring( i_ringData.iv_pRingBuffer, i_chipState.getChipLevel(), quadSpecRingId, - P9_TOR::SGPE, + PT_SGPE, i_ringVariant, chipletId, &i_ringData.iv_pWorkBuf1, -- cgit v1.2.1