From dbc5fddd2f596574d4e06cbe293d799e2fc30c6a Mon Sep 17 00:00:00 2001 From: Sumit Kumar Date: Fri, 10 Jun 2016 02:07:19 -0500 Subject: L2 HWP p9_pm_pfet_control Change-Id: I7587f3436d9ef9918f31926cf2788378044fa375 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25610 Tested-by: Jenkins Server Reviewed-by: Gregory S. Still Reviewed-by: Richard J. Knight Reviewed-by: Jennifer A. Stofer Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36093 Tested-by: FSP CI Jenkins Tested-by: Jenkins OP Build CI Reviewed-by: Daniel M. Crowell --- .../p9/procedures/hwp/pm/p9_pm_pfet_control.H | 142 ++++++++++++++++----- 1 file changed, 108 insertions(+), 34 deletions(-) (limited to 'src/import/chips/p9/procedures/hwp/pm/p9_pm_pfet_control.H') diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_pfet_control.H b/src/import/chips/p9/procedures/hwp/pm/p9_pm_pfet_control.H index a220a41cb..0f25be894 100755 --- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_pfet_control.H +++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_pfet_control.H @@ -22,15 +22,18 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ -/// @file p9_pm_pfet_control.C -/// @brief Perform override operations to the EX PFET headers /// -/// *HWP HWP Owner: Greg Still -/// *HWP FW Owner: Sunil Kumar -/// *HWP Team: PM -/// *HWP Level: 1 -/// *HWP Consumed by: HS +/// @file p9_pm_pfet_control.H +/// @brief Enable PFET devices to power on/off all enabled Core and Cache +/// chiplets in target passed. /// +//---------------------------------------------------------------------------- +// *HWP HWP Owner : Greg Still +// *HWP FW Owner : Sumit Kumar +// *HWP Team : PM +// *HWP Level : 2 +// *HWP Consumed by : OCC:CME:FSP +//---------------------------------------------------------------------------- #ifndef _P9_PM_PFETCTL_H_ #define _P9_PM_PFETCTL_H_ @@ -39,37 +42,108 @@ //------------------------------------------------------------------------------ // Includes //------------------------------------------------------------------------------ -#include "p9_pm_pfet_types.H" -#include "fapi2.H" -#include "p9_pm.H" +#include +#include + +static int const PFET_DELAY = 100000; // 100us in ns +static int const PFET_SIM_CYCLES_DELAY = 0; + +namespace PM_PFET_TYPE_C +{ +//Valid rail options +enum pfet_rail_t +{ + BOTH, + VDD, + VCS +}; + +//Valid force options +enum pfet_force_t +{ + OFF, + ON +}; +} // function pointer typedef definition for HWP call support -typedef fapi2::ReturnCode (*p9_pm_pfet_control_FP_t) ( - const fapi2::Target&, - const uint8_t, - PMPFETTYPE_C::pfet_dom_t, - PMPFETTYPE_C::pfet_force_t); +typedef fapi2::ReturnCode (*p9_pm_pfet_control_eq_FP_t) ( + const fapi2::Target& i_target, + const PM_PFET_TYPE_C::pfet_rail_t i_rail, + const PM_PFET_TYPE_C::pfet_force_t i_op); -extern "C" { +typedef fapi2::ReturnCode (*p9_pm_pfet_control_ex_FP_t) ( + const fapi2::Target& i_target, + const PM_PFET_TYPE_C::pfet_rail_t i_rail, + const PM_PFET_TYPE_C::pfet_force_t i_op); -/// @brief Controls the pfets for the specified EX chiplet -/// -/// @param[in] i_target Processor Chip target -/// @param[in] i_ex_number EX number -/// @param[in] i_domain Domain: BOTH, ECO, CORE -/// @param[in] i_op Operation: -/// VON: Turns a chiplet domain on, VCS then VDD -/// VOFF: Turns a chiplet domain off, VDD then VCS -// VOFF_OVERRIDE: Turns a chiplet domain off with -/// controller override -/// -/// @return SUCCESS incase of success, -/// @return BAD_RETURN_CODE otherwise - fapi2::ReturnCode p9_pm_pfet_control(const - fapi2::Target& i_target, - const uint8_t i_ex_number, - PMPFETTYPE_C::pfet_dom_t i_domain, - PMPFETTYPE_C::pfet_force_t i_op); +typedef fapi2::ReturnCode (*p9_pm_pfet_control_ec_FP_t) ( + const fapi2::Target& i_target, + const PM_PFET_TYPE_C::pfet_rail_t i_rail, + const PM_PFET_TYPE_C::pfet_force_t i_op); + +extern "C" +{ +//------------------------------------------------------------------------------ +// Function prototypes +//------------------------------------------------------------------------------ + + /** + ** @brief HWP + ** p9_pm_pfet_control_eq - Enable power on/off for cache chiplet + ** + ** @param[in] &i_target Target type cache chiplet + ** @param[in] i_rail Valid rail options: + ** BOTH + ** VDD + ** VCS + ** @param[in] i_op Valid options: + ** OFF + ** ON + ** @return FAPI2_RC_SUCCESS on success, error otherwise + **/ + fapi2::ReturnCode p9_pm_pfet_control_eq ( + const fapi2::Target& i_target, + const PM_PFET_TYPE_C::pfet_rail_t i_rail, + const PM_PFET_TYPE_C::pfet_force_t i_op); + + /** + ** @brief HWP + ** p9_pm_pfet_control_ex - Enable power on/off for EX chiplet + ** + ** @param[in] &i_target Target type EX chiplet + ** @param[in] i_rail Valid rail options: + ** BOTH + ** VDD + ** VCS + ** @param[in] i_op Valid options: + ** OFF + ** ON + ** @return FAPI2_RC_SUCCESS on success, error otherwise + **/ + fapi2::ReturnCode p9_pm_pfet_control_ex ( + const fapi2::Target& i_target, + const PM_PFET_TYPE_C::pfet_rail_t i_rail, + const PM_PFET_TYPE_C::pfet_force_t i_op); + + /** + ** @brief HWP + ** p9_pm_pfet_control_ec - Enable power on/off for core chiplet + ** + ** @param[in] &i_target Target type core chiplet + ** @param[in] i_rail Valid rail options: + ** BOTH + ** VDD + ** VCS + ** @param[in] i_op Valid options: + ** OFF + ** ON + ** @return FAPI2_RC_SUCCESS on success, error otherwise + **/ + fapi2::ReturnCode p9_pm_pfet_control_ec ( + const fapi2::Target& i_target, + const PM_PFET_TYPE_C::pfet_rail_t i_rail, + const PM_PFET_TYPE_C::pfet_force_t i_op); } // extern "C" -- cgit v1.2.1