From a35686ddb6ca12787681d4f2a31b81a8c04c1c94 Mon Sep 17 00:00:00 2001 From: Joachim Fenkes Date: Mon, 20 Aug 2018 17:48:05 +0200 Subject: lpc_init: Correct LPC host controller timeout value The LPC host controller has an interesting way to decode the timeout value. The left 4 bits are used for the "short wait" timeout, while the entire 8 bits are used for the "long wait" timeout. If the "short wait" timeout is 0xF, it is taken to be infinite, causing the host controller to hang if the slave doesn't respond. Change the timeout value from 0xFE to 0xEF, the correct maximum value that is not decoded to be infinity. Change-Id: Iaf1a5119a87338c24b1e324d814ade0b30353360 CQ: SW442999 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64850 Reviewed-by: Joseph J. McGill Tested-by: Jenkins Server Tested-by: PPE CI Reviewed-by: Prachi Gupta Reviewed-by: Jennifer A. Stofer Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71485 Tested-by: FSP CI Jenkins Reviewed-by: Christian R. Geddes --- src/import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.H | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/import/chips/p9/procedures/hwp/perv') diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.H index e68acd499..2bcc35b19 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.H +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.H @@ -61,7 +61,7 @@ extern "C" const uint32_t LPCM_OPB_MASTER_TIMEOUT_REG = 0xC0010040; const uint32_t LPCM_OPB_MASTER_TIMEOUT_VALUE = 0x01312D00; // 50ms at 1600MHz Nest / 400MHz OPB const uint32_t LPCM_LPC_MASTER_TIMEOUT_REG = 0xC001202C; - const uint32_t LPCM_LPC_MASTER_TIMEOUT_VALUE = 0xFE000000; + const uint32_t LPCM_LPC_MASTER_TIMEOUT_VALUE = 0xEF000000; const uint32_t CPLT_CONF1_TC_LP_RESET = 12; fapi2::ReturnCode p9_sbe_lpc_init(const fapi2::Target& i_target_chip); -- cgit v1.2.1