From 3dcbd232eb5d9db7a882362a5e740a664bb6205e Mon Sep 17 00:00:00 2001 From: Joachim Fenkes Date: Wed, 25 Jul 2018 16:20:27 +0200 Subject: p9_sbe_lpc_init: Improve reset The sequence to switch the LPC HC clock onto the nest clock temporarily was incorrect as it used the TP CPLT_CTRL0 register inasted of N3, so it never really switched the clocks during reset. Also, for good measure, keep the clock switched to the nest clock while we're resetting the LPC bus. (Bonus change: Decrease the sim delay cycles waiting for a command to complete.) Change-Id: I5e77fa056204639a96aad9c1eec4b7bc76d8e54b CQ: SW439536 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/63279 Tested-by: Jenkins Server Tested-by: HWSV CI Tested-by: PPE CI Tested-by: Hostboot CI Reviewed-by: Dean Sanner Reviewed-by: Joseph J. McGill Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/63287 Tested-by: Jenkins OP Build CI Tested-by: FSP CI Jenkins Tested-by: Jenkins OP HW Reviewed-by: Christian R. Geddes --- src/import/chips/p9/procedures/hwp/perv/p9_lpc_utils.H | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/import/chips/p9/procedures/hwp/perv/p9_lpc_utils.H') diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_lpc_utils.H b/src/import/chips/p9/procedures/hwp/perv/p9_lpc_utils.H index eab956f44..1d0f35b1c 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_lpc_utils.H +++ b/src/import/chips/p9/procedures/hwp/perv/p9_lpc_utils.H @@ -30,7 +30,7 @@ #define P9_LPC_UTILS_H_ const uint32_t LPC_CMD_TIMEOUT_DELAY_NS = 1000000; -const uint32_t LPC_CMD_TIMEOUT_DELAY_CYCLE = 80000000; +const uint32_t LPC_CMD_TIMEOUT_DELAY_CYCLE = 1000000; const uint32_t LPC_CMD_TIMEOUT_COUNT = 20; static fapi2::ReturnCode lpc_rw( -- cgit v1.2.1