From ab9139914163cf13ebc98dcbb0634b5e58fb46fb Mon Sep 17 00:00:00 2001 From: Andre Marin Date: Wed, 17 Jul 2019 22:35:57 -0400 Subject: Move pre_eff_config specific code to chip specific folders Change-Id: I2b2f3a5231f23a3a812997bc8a570e3242a8e697 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/80582 Tested-by: FSP CI Jenkins Tested-by: Jenkins Server Tested-by: HWSV CI Tested-by: Hostboot CI Reviewed-by: Mark Pizzutillo Reviewed-by: Louis Stermole Reviewed-by: Jennifer A Stofer Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/80929 Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Reviewed-by: Daniel M Crowell --- .../p9/procedures/hwp/memory/lib/dimm/eff_dimm.H | 2 +- .../memory/lib/eff_config/nimbus_pre_data_engine.C | 2 +- .../memory/lib/eff_config/p9n_data_init_traits.H | 473 +++++++++++++++++++++ .../hwp/memory/lib/eff_config/pre_data_init.H | 438 +++++++++++++++++++ .../chips/p9/procedures/hwp/memory/p9_mss_freq.C | 2 +- 5 files changed, 914 insertions(+), 3 deletions(-) create mode 100644 src/import/chips/p9/procedures/hwp/memory/lib/eff_config/p9n_data_init_traits.H create mode 100644 src/import/chips/p9/procedures/hwp/memory/lib/eff_config/pre_data_init.H (limited to 'src/import/chips/p9/procedures/hwp/memory') diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.H b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.H index f60adaf7c..477b7114c 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.H @@ -38,7 +38,7 @@ #include #include #include -#include +#include #include namespace mss diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/nimbus_pre_data_engine.C b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/nimbus_pre_data_engine.C index 281fe8c56..d8358a8a5 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/nimbus_pre_data_engine.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/nimbus_pre_data_engine.C @@ -34,7 +34,7 @@ // *HWP Level: 3 // *HWP Consumed by: CI -#include +#include namespace mss { diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/p9n_data_init_traits.H b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/p9n_data_init_traits.H new file mode 100644 index 000000000..93d3e43d6 --- /dev/null +++ b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/p9n_data_init_traits.H @@ -0,0 +1,473 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/import/chips/p9/procedures/hwp/memory/lib/eff_config/p9n_data_init_traits.H $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2018,2019 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ + +/// +/// @file p9n_data_init_traits.H +/// @brief Trait class definitions for Nimbus pre_data_init +/// +// *HWP HWP Owner: Andre Marin +// *HWP FW Owner: Stephen Glancy +// *HWP Team: Memory +// *HWP Level: 2 +// *HWP Consumed by: CI + +#ifndef _MSS_P9N_PRE_DATA_INIT_TRAITS_H_ +#define _MSS_P9N_PRE_DATA_INIT_TRAITS_H_ + +#include +#include +#include +#include + +namespace mss +{ + +/// +/// @brief Traits for pre_data_engine +/// @class preDataInitTraits +/// @note NIMBUS, DIMM_TYPE specialization +/// +template<> +class preDataInitTraits +{ + public: + using attr_type = fapi2::ATTR_EFF_DIMM_TYPE_Type; + static const fapi2::TargetType TARGET_TYPE = fapi2::ATTR_EFF_DIMM_TYPE_TargetType; + static constexpr generic_ffdc_codes FFDC_CODE = SET_DIMM_TYPE; + + /// + /// @brief attribute getter + /// @param[in] i_target the MCS target + /// @param[out] o_setting array to populate + /// @return FAPI2_RC_SUCCESS iff okay + /// + static fapi2::ReturnCode get_attr(const fapi2::Target& i_target, + attr_type& o_setting) + { + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_TYPE, i_target, o_setting) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief attribute setter + /// @param[in] i_target the MCS target + /// @param[in] i_setting array to set + /// @return FAPI2_RC_SUCCESS iff okay + /// + static fapi2::ReturnCode set_attr(const fapi2::Target& i_target, + attr_type& i_setting) + { + return FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_TYPE, i_target, i_setting); + } +}; + +/// +/// @brief Traits for pre_data_engine +/// @class preDataInitTraits +/// @note NIMBUS, DRAM_GEN specialization +/// +template<> +class preDataInitTraits +{ + public: + using attr_type = fapi2::ATTR_EFF_DRAM_GEN_Type; + static const fapi2::TargetType TARGET_TYPE = fapi2::ATTR_EFF_DRAM_GEN_TargetType; + static constexpr generic_ffdc_codes FFDC_CODE = SET_DRAM_GEN; + + /// + /// @brief attribute getter + /// @param[in] i_target the MCS target + /// @param[out] o_setting array to populate + /// @return FAPI2_RC_SUCCESS iff okay + /// + static fapi2::ReturnCode get_attr(const fapi2::Target& i_target, + attr_type& o_setting) + { + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_GEN, i_target, o_setting) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief attribute setter + /// @param[in] i_target the MCS target + /// @param[in] i_setting array to set + /// @return FAPI2_RC_SUCCESS iff okay + /// + static fapi2::ReturnCode set_attr(const fapi2::Target& i_target, + attr_type& i_setting) + { + return FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_GEN, i_target, i_setting); + } +}; + +/// +/// @brief Traits for pre_data_engine +/// @class preDataInitTraits +/// @note NIMBUS, HYBRID specialization +/// +template<> +class preDataInitTraits +{ + public: + using attr_type = fapi2::ATTR_EFF_HYBRID_Type; + static const fapi2::TargetType TARGET_TYPE = fapi2::ATTR_EFF_HYBRID_TargetType; + static constexpr generic_ffdc_codes FFDC_CODE = SET_HYBRID; + + /// + /// @brief attribute getter + /// @param[in] i_target the MCS target + /// @param[out] o_setting array to populate + /// @return FAPI2_RC_SUCCESS iff okay + /// + static fapi2::ReturnCode get_attr(const fapi2::Target& i_target, + attr_type& o_setting) + { + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_HYBRID, i_target, o_setting) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief attribute setter + /// @param[in] i_target the MCS target + /// @param[in] i_setting array to set + /// @return FAPI2_RC_SUCCESS iff okay + /// + static fapi2::ReturnCode set_attr(const fapi2::Target& i_target, + attr_type& i_setting) + { + return FAPI_ATTR_SET(fapi2::ATTR_EFF_HYBRID, i_target, i_setting); + } +}; + +/// +/// @brief Traits for pre_data_engine +/// @class preDataInitTraits +/// @note NIMBUS, HYBRID_MEDIA specialization +/// +template<> +class preDataInitTraits +{ + public: + using attr_type = fapi2::ATTR_EFF_HYBRID_MEMORY_TYPE_Type; + static const fapi2::TargetType TARGET_TYPE = fapi2::ATTR_EFF_HYBRID_MEMORY_TYPE_TargetType; + static constexpr generic_ffdc_codes FFDC_CODE = SET_HYBRID_MEDIA; + + /// + /// @brief attribute getter + /// @param[in] i_target the MCS target + /// @param[out] o_setting array to populate + /// @return FAPI2_RC_SUCCESS iff okay + /// + static fapi2::ReturnCode get_attr(const fapi2::Target& i_target, + attr_type& o_setting) + { + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_HYBRID_MEMORY_TYPE, i_target, o_setting) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief attribute setter + /// @param[in] i_target the MCS target + /// @param[in] i_setting array to set + /// @return FAPI2_RC_SUCCESS iff okay + /// + static fapi2::ReturnCode set_attr(const fapi2::Target& i_target, + attr_type& i_setting) + { + return FAPI_ATTR_SET(fapi2::ATTR_EFF_HYBRID_MEMORY_TYPE, i_target, i_setting); + } +}; + +/// +/// @brief Traits for pre_data_engine +/// @class preDataInitTraits +/// @note NIMBUS, MRANKS specialization +/// +template<> +class preDataInitTraits +{ + public: + using attr_type = fapi2::ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_Type; + static const fapi2::TargetType TARGET_TYPE = fapi2::ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_TargetType; + static constexpr generic_ffdc_codes FFDC_CODE = SET_MRANKS; + + /// + /// @brief attribute getter + /// @param[in] i_target the MCS target + /// @param[out] o_setting array to populate + /// @return FAPI2_RC_SUCCESS iff okay + /// + static fapi2::ReturnCode get_attr(const fapi2::Target& i_target, + attr_type& o_setting) + { + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM, i_target, o_setting) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief attribute setter + /// @param[in] i_target the MCS target + /// @param[in] i_setting array to set + /// @return FAPI2_RC_SUCCESS iff okay + /// + static fapi2::ReturnCode set_attr(const fapi2::Target& i_target, + attr_type& i_setting) + { + return FAPI_ATTR_SET(fapi2::ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM, i_target, i_setting); + } +}; + +/// +/// @brief Traits for pre_data_engine +/// @class preDataInitTraits +/// @note NIMBUS, DIMM_RANKS_CNFG specialization +/// +template<> +struct preDataInitTraits +{ + using attr_type = fapi2::ATTR_EFF_DIMM_RANKS_CONFIGED_Type; + static const fapi2::TargetType TARGET_TYPE = fapi2::ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_TargetType; + static constexpr generic_ffdc_codes FFDC_CODE = SET_DIMM_RANKS_CNFG; + + /// + /// @brief attribute getter + /// @param[in] i_target the MCS target + /// @param[out] o_setting array to populate + /// @return FAPI2_RC_SUCCESS iff okay + /// + static fapi2::ReturnCode get_attr(const fapi2::Target& i_target, + attr_type& o_setting) + { + return FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_RANKS_CONFIGED, i_target, o_setting); + } + + /// + /// @brief attribute setter + /// @param[in] i_target the MCS target + /// @param[in] i_setting array to set + /// @return FAPI2_RC_SUCCESS iff okay + /// + static fapi2::ReturnCode set_attr(const fapi2::Target& i_target, + attr_type& i_setting) + { + return FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_RANKS_CONFIGED, i_target, i_setting); + } +}; + +/// +/// @brief Traits for pre_data_engine +/// @class attrEngineTraits +/// @note AXONE, DIMM_TYPE_METADATA specialization +/// +template<> +struct attrEngineTraits +{ + using attr_type = fapi2::ATTR_MEM_DIMM_TYPE_METADATA_Type; + using attr_integral_type = std::remove_all_extents::type; + static constexpr fapi2::TargetType TARGET_TYPE = fapi2::ATTR_MEM_DIMM_TYPE_METADATA_TargetType; + static constexpr generic_ffdc_codes FFDC_CODE = SET_DIMM_TYPE_METADATA; + + /// + /// @brief attribute getter + /// @param[in] i_target the MCS target + /// @param[out] o_setting array to populate + /// @return FAPI2_RC_SUCCESS iff okay + /// + static fapi2::ReturnCode get_attr(const fapi2::Target& i_target, + attr_type& o_setting) + { + return FAPI_ATTR_GET(fapi2::ATTR_MEM_DIMM_TYPE_METADATA, i_target, o_setting); + } + + /// + /// @brief attribute setter + /// @param[in] i_target the MCS target + /// @param[in] i_setting array to set + /// @return FAPI2_RC_SUCCESS iff okay + /// + static fapi2::ReturnCode set_attr(const fapi2::Target& i_target, + attr_type& i_setting) + { + return FAPI_ATTR_SET(fapi2::ATTR_MEM_DIMM_TYPE_METADATA, i_target, i_setting); + } + + /// + /// @brief Computes setting for attribute + /// @param[in] i_spd_data SPD data + /// @param[in] i_setting value we want to set attr with + /// @return FAPI2_RC_SUCCESS iff okay + /// + static fapi2::ReturnCode get_value_to_set(const fapi2::Target& i_target, + attr_integral_type& o_setting) + { + return mss::eff_dimm_type(i_target, o_setting); + } +}; + +/// +/// @brief Traits associated with DIMM positioning +/// @class dimmPosTraits - NIMBUS specializattion +/// +template<> +class dimmPosTraits +{ + private: + using PT = posTraits; + using MT = mss::mcTypeTraits; + + public: + // Public interface syntatic sugar + using pos_type = PT::pos_type; + + // Proc 0 is DIMM 0-15, proc 2 is 64-79. 64 is the stride between processors + static constexpr auto DIMM_STRIDE_PER_PROC = 64; + static constexpr auto TOTAL_DIMM = MT::MC_PER_MODULE * MT::MCS_PER_MC * MT::PORTS_PER_MCS * MT::DIMMS_PER_PORT; + + /// + /// @brief Return the PROC_CHIP parent of a DIMM + /// @param[in] i_target the dimm target + /// @return the fapi2 proc target + /// + static fapi2::Target get_proc(const fapi2::Target& i_target) + { + // Using fapi2 rather than mss::find as this is pretty low level stuff. + return i_target.getParent().getParent(); + } +}; + +/// +/// @brief Traits for pre_data_engine +/// @class attrEngineTraits +/// @note generic_metadata_fields, DRAM_GEN_METADATA specialization +/// +template<> +struct attrEngineTraits +{ + using attr_type = fapi2::ATTR_MEM_DRAM_GEN_METADATA_Type; + using attr_integral_type = std::remove_all_extents::type; + static constexpr fapi2::TargetType TARGET_TYPE = fapi2::ATTR_MEM_DRAM_GEN_METADATA_TargetType; + static constexpr generic_ffdc_codes FFDC_CODE = SET_DRAM_GEN_METADATA; + + /// + /// @brief attribute getter + /// @param[in] i_target the MCS target + /// @param[out] o_setting array to populate + /// @return FAPI2_RC_SUCCESS iff okay + /// + static fapi2::ReturnCode get_attr(const fapi2::Target& i_target, + attr_type& o_setting) + { + return FAPI_ATTR_GET(fapi2::ATTR_MEM_DRAM_GEN_METADATA, i_target, o_setting); + } + + /// + /// @brief attribute setter + /// @param[in] i_target the MCS target + /// @param[in] i_setting array to set + /// @return FAPI2_RC_SUCCESS iff okay + /// + static fapi2::ReturnCode set_attr(const fapi2::Target& i_target, + attr_type& i_setting) + { + return FAPI_ATTR_SET(fapi2::ATTR_MEM_DRAM_GEN_METADATA, i_target, i_setting); + } + + /// + /// @brief Computes setting for attribute + /// @param[in] i_spd_data SPD data + /// @param[in] i_setting value we want to set attr with + /// @return FAPI2_RC_SUCCESS iff okay + /// + static fapi2::ReturnCode get_value_to_set(const fapi2::Target& i_target, + attr_integral_type& o_setting) + { + return mss::eff_dram_gen(i_target, o_setting); + } +}; + +/// +/// @brief Traits for pre_data_engine +/// @class attrEngineTraits +/// @note generic_metadata_fields, DIMM_POS_METADATA specialization +/// +template<> +struct attrEngineTraits +{ + using attr_type = fapi2::ATTR_MEM_DIMM_POS_METADATA_Type; + using attr_integral_type = std::remove_all_extents::type; + static constexpr fapi2::TargetType TARGET_TYPE = fapi2::ATTR_MEM_DIMM_POS_METADATA_TargetType; + static constexpr generic_ffdc_codes FFDC_CODE = SET_DIMM_POS_METADATA; + + /// + /// @brief attribute getter + /// @param[in] i_target the MCS target + /// @param[out] o_setting array to populate + /// @return FAPI2_RC_SUCCESS iff okay + /// + static fapi2::ReturnCode get_attr(const fapi2::Target& i_target, + attr_type& o_setting) + { + return FAPI_ATTR_GET(fapi2::ATTR_MEM_DIMM_POS_METADATA, i_target, o_setting); + } + + /// + /// @brief attribute setter + /// @param[in] i_target the MCS target + /// @param[in] i_setting array to set + /// @return FAPI2_RC_SUCCESS iff okay + /// + static fapi2::ReturnCode set_attr(const fapi2::Target& i_target, + attr_type& i_setting) + { + return FAPI_ATTR_SET(fapi2::ATTR_MEM_DIMM_POS_METADATA, i_target, i_setting); + } + + /// + /// @brief Computes setting for attribute + /// @param[in] i_spd_data SPD data + /// @param[in] i_setting value we want to set attr with + /// @return FAPI2_RC_SUCCESS iff okay + /// + static fapi2::ReturnCode get_value_to_set(const fapi2::Target& i_target, + attr_integral_type& o_setting) + { + using TT = mss::dimmPosTraits; + return gen::dimm_pos(i_target, o_setting); + } +}; + +}// mss + +#endif diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/pre_data_init.H b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/pre_data_init.H new file mode 100644 index 000000000..14d25f63b --- /dev/null +++ b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/pre_data_init.H @@ -0,0 +1,438 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/import/chips/p9/procedures/hwp/memory/lib/eff_config/pre_data_init.H $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2018,2019 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ + +/// +/// @file pre_data_init.H +/// @brief Class to set preliminary eff_config attributes +/// +// *HWP HWP Owner: Andre Marin +// *HWP FW Owner: Stephen Glancy +// *HWP Team: Memory +// *HWP Level: 2 +// *HWP Consumed by: CI + +#ifndef _MSS_PRE_DATA_INIT_H_ +#define _MSS_PRE_DATA_INIT_H_ + +#include +#include +#include +#include +#include +#include +#include + +namespace mss +{ +// TK - Remove generalizations since this is dubbed Nimbus specific implementation + +/// +/// @class DataSetterTraits2D +/// @brief Traits for setting eff_config data +/// @tparam P proc_type +/// @tparam X size of 1st array index +/// @tparam Y size of 2nd array index +/// +template < proc_type P, size_t X, size_t Y > +struct DataSetterTraits2D; + +/// +/// @class DataSetterTraits - Nimbus, [PORT][DIMM] array specialization +/// @brief Traits for setting eff_config data +/// +template < > +struct DataSetterTraits2D < proc_type::NIMBUS, + mcTypeTraits::PORTS_PER_MCS, + mcTypeTraits::DIMMS_PER_PORT + > +{ + static constexpr fapi2::TargetType TARGET = fapi2::TARGET_TYPE_MCA; +}; + +/// +/// @brief Helper function to update a 2D array output +/// @tparam P proc_type +/// @tparam X size of 1st array index +/// @tparam Y size of 2nd array index +/// @tparam T Input/output data type +/// @tparam TT defaulted to DataSetterTraits2D +/// @param[in] i_target the DIMM target +/// @param[in] i_setting array to set +/// @param[in] i_ffdc_code FFDC function code +/// @param[out] o_data attribute data structure to set +/// @warning This is Nimbus specific until MCA alias to MEM_PORT +/// +template < proc_type P, + size_t X, + size_t Y, + typename T, + typename TT = DataSetterTraits2D + > +fapi2::ReturnCode update_data(const fapi2::Target& i_target, + const T i_setting, + const generic_ffdc_codes i_ffdc_code, + T (&o_data)[X][Y]) +{ + // Currenlty only valid for a DIMM target, for Nimbus, traits enforces this at compile time + // Use case is currently for pre_eff_config which is supported in both Axone and Nimbus + const auto l_port_index = mss::index( find_target(i_target) ); + const auto l_dimm_index = mss::index(i_target); + + FAPI_ASSERT( l_port_index < X, + fapi2::MSS_OUT_OF_BOUNDS_INDEXING() + .set_INDEX(l_port_index) + .set_LIST_SIZE(X) + .set_FUNCTION(i_ffdc_code) + .set_TARGET(i_target), + "Port index (%d) was larger than max (%d) on %s", + l_port_index, + X, + mss::spd::c_str(i_target) ); + + FAPI_ASSERT( l_dimm_index < Y, + fapi2::MSS_OUT_OF_BOUNDS_INDEXING() + .set_INDEX(l_dimm_index) + .set_LIST_SIZE(Y) + .set_FUNCTION(i_ffdc_code) + .set_TARGET(i_target), + "DIMM index (%d) was larger than max (%d) on %s", + l_dimm_index, + Y, + mss::spd::c_str(i_target) ); + + o_data[l_port_index][l_dimm_index] = i_setting; + + return fapi2::FAPI2_RC_SUCCESS; + +fapi_try_exit: + return fapi2::current_err; +} + +/// +/// @brief Sets attr data fields +/// @tparam P proc_type +/// @tparam TT data engine class traits (e.g. preDataInitTraits, etc.) +/// @tparam T FAPI2 target type +/// @tparam IT Input data type +/// @param[in] i_target the FAPI target +/// @param[in] i_setting value we want to set attr with +/// @return FAPI2_RC_SUCCESS iff okay +/// +template< proc_type P, + typename TT, + fapi2::TargetType T, + typename IT > +inline fapi2::ReturnCode set_field(const fapi2::Target& i_target, + const IT i_setting) +{ + const auto l_attr_target = mss::find_target(i_target); + typename TT::attr_type l_attr_list = {}; + FAPI_TRY( TT::get_attr(l_attr_target, l_attr_list) ); + + FAPI_TRY( update_data

(i_target, i_setting, TT::FFDC_CODE, l_attr_list) ); + FAPI_TRY( TT::set_attr(l_attr_target, l_attr_list) ); + +fapi_try_exit: + return fapi2::current_err; +} + +/// +/// @brief Sets preliminary data fields +/// @tparam P processor type (e.g. NIMBUS, AXONE, etc.) +/// @tparam F pre_data_init_fields +/// @tparam T FAPI2 target type +/// @tparam IT Input data type +/// @tparam TT defaulted to preDataInitTraits +/// @param[in] i_setting value we want to set attr with +/// @return FAPI2_RC_SUCCESS iff okay +/// +template< proc_type P, + pre_data_init_fields F, + fapi2::TargetType T, + typename IT, + typename TT = preDataInitTraits + > +inline fapi2::ReturnCode set_field(const fapi2::Target& i_target, + const IT i_setting) +{ + FAPI_TRY( (set_field(i_target, i_setting)), + "Failed set_field() for %s", spd::c_str(i_target) ); + +fapi_try_exit: + return fapi2::current_err; +} + +/// +/// @brief Data structure to set pre-effective config data +/// @class pre_data_engine +/// @tparam P supported processor type (e.g. Nimbus, Axone, etc.) +/// +template< proc_type P > +class pre_data_engine +{ + private: + + fapi2::Target iv_dimm; + spd::facade iv_spd_data; + + public: + + static const std::vector > NUM_PACKAGE_RANKS_MAP; + static const std::vector > BASE_MODULE_TYPE_MAP; + static const std::vector > DRAM_GEN_MAP; + static const std::vector > HYBRID_MAP; + static const std::vector > HYBRID_MEMORY_TYPE_MAP; + + /// + /// @brief ctor + /// @param[in] i_target the DIMM target + /// @param[in] i_spd_data SPD decoder + /// + pre_data_engine(const fapi2::Target& i_target, + const spd::facade& i_spd_data): + iv_dimm(i_target), + iv_spd_data(i_spd_data) + {} + + /// + /// @brief default dtor + /// + ~pre_data_engine() = default; + + /// + /// @brief Set ATTR_EFF_DIMM_TYPE + /// @return FAPI2_RC_SUCCESS iff ok + /// + fapi2::ReturnCode set_dimm_type() + { + uint8_t l_base_module_type = 0; + uint8_t l_dimm_type = 0; + + FAPI_TRY(iv_spd_data.base_module(l_base_module_type)); + FAPI_TRY(lookup_table_check(iv_dimm, BASE_MODULE_TYPE_MAP, SET_ATTR_DIMM_TYPE, l_base_module_type, l_dimm_type)); + FAPI_TRY( (set_field(iv_dimm, l_dimm_type)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Set ATTR_EFF_DRAM_GEN + /// @return FAPI2_RC_SUCCESS iff ok + /// + fapi2::ReturnCode set_dram_gen() + { + uint8_t l_device_type = 0; + uint8_t l_dram_gen = 0; + + FAPI_TRY(iv_spd_data.device_type(l_device_type)); + FAPI_TRY(lookup_table_check(iv_dimm, DRAM_GEN_MAP, SET_ATTR_DRAM_GEN, l_device_type, l_dram_gen)); + + FAPI_TRY( (set_field(iv_dimm, l_dram_gen)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Set ATTR_EFF_HYBRID + /// @return FAPI2_RC_SUCCESS iff ok + /// + fapi2::ReturnCode set_hybrid() + { + uint8_t l_spd_hybrid_type = 0; + uint8_t l_hybrid = 0; + + FAPI_TRY(iv_spd_data.hybrid(l_spd_hybrid_type)); + FAPI_TRY(lookup_table_check(iv_dimm, HYBRID_MAP, SET_ATTR_HYBRID, l_spd_hybrid_type, l_hybrid)); + + FAPI_TRY( (set_field(iv_dimm, l_hybrid)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Set ATTR_EFF_HYBRID_MEMORY_TYPE + /// @return FAPI2_RC_SUCCESS iff ok + /// + fapi2::ReturnCode set_hybrid_media() + { + uint8_t l_hybrid_media = 0; + uint8_t l_spd_hybrid_media = 0; + + FAPI_TRY(iv_spd_data.hybrid_media(l_spd_hybrid_media)); + FAPI_TRY(lookup_table_check(iv_dimm, HYBRID_MAP, SET_ATTR_HYBRID, l_spd_hybrid_media, l_hybrid_media)); + + FAPI_TRY( (set_field(iv_dimm, l_hybrid_media)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Set ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM + /// @return FAPI2_RC_SUCCESS iff ok + /// + fapi2::ReturnCode set_master_ranks() + { + uint8_t l_master_ranks = 0; + FAPI_TRY( get_master_ranks(l_master_ranks) ); + + FAPI_TRY( (set_field(iv_dimm, l_master_ranks)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Sets ATTR_EFF_DIMM_RANKS_CONFIGED + /// @return FAPI2_RC_SUCCESS iff okay + /// + fapi2::ReturnCode set_dimm_ranks_configured() + { + // Set configed ranks. Set the bit representing the master rank configured (0 being left most.) So, + // a 4R DIMM would be 0b11110000 (0xF0). This is used by PRD. + fapi2::buffer l_ranks_configed; + + // Make sure the number of master ranks is setup + uint8_t l_master_ranks = 0; + FAPI_TRY( get_master_ranks(l_master_ranks) ); + + FAPI_TRY( l_ranks_configed.setBit(0, l_master_ranks), + "%s. Failed to setBit", spd::c_str(iv_dimm) ); + + FAPI_TRY( (set_field(iv_dimm, uint8_t(l_ranks_configed))) ); + + fapi_try_exit: + return fapi2::current_err; + } + + private: + + /// + /// @brief Gets master ranks from SPD + /// @param[out] o_output num package ranks per DIMM + /// @return FAPI2_RC_SUCCESS iff ok + /// + fapi2::ReturnCode get_master_ranks(uint8_t& o_output) + { + // Sets up commonly used member variables + uint8_t l_master_ranks_spd = 0; + FAPI_TRY(iv_spd_data.num_package_ranks_per_dimm(l_master_ranks_spd), + "%s failed to get number of package ranks from SPD", spd::c_str(iv_dimm)); + + FAPI_TRY(lookup_table_check(iv_dimm, NUM_PACKAGE_RANKS_MAP, PRE_DATA_ENGINE_CTOR, l_master_ranks_spd, + o_output), "%s failed MASTER_RANKS lookup check", spd::c_str(iv_dimm)); + + fapi_try_exit: + return fapi2::current_err; + } +}; + +/// +/// @brief Sets pre_eff_config attributes +/// @tparam P processor type +/// @param[in] i_target the DIMM target +/// @param[in] i_spd_decoder SPD decoder +/// @return FAPI2_RC_SUCCESS iff ok +/// +template +inline fapi2::ReturnCode set_pre_init_attrs( const fapi2::Target& i_target, + const spd::facade& i_spd_decoder ); + +/// +/// @brief Sets pre_eff_config attributes - NIMBUS specialization +/// @param[in] i_target the DIMM target +/// @param[in] i_spd_decoder SPD decoder +/// @return FAPI2_RC_SUCCESS iff ok +/// +template <> +inline fapi2::ReturnCode set_pre_init_attrs( const fapi2::Target& + i_target, + const spd::facade& i_spd_decoder ) +{ + // TK explicitly forcing this API to only run in Nimbus, need to move pre_data_engine to Nimbus chip path, + // using template recursive algorithm moving forward + mss::pre_data_engine l_data_engine(i_target, i_spd_decoder); + + // Set attributes needed before eff_config + // DIMM type and DRAM gen are needed for c_str to aid debugging + FAPI_TRY(l_data_engine.set_dimm_type(), "Failed to set DIMM type %s", mss::spd::c_str(i_target) ); + FAPI_TRY(l_data_engine.set_dram_gen(), "Failed to set DRAM gen %s", mss::spd::c_str(i_target) ); + + // Hybrid and hybrid media help detect hybrid modules, specifically NVDIMMs for Nimbus + FAPI_TRY(l_data_engine.set_hybrid(), "Failed to set Hybrid %s", mss::spd::c_str(i_target) ); + FAPI_TRY(l_data_engine.set_hybrid_media(), "Failed to set Hybrid Media %s", mss::spd::c_str(i_target) ); + + // Number of master ranks needed for VPD decoding + FAPI_TRY(l_data_engine.set_master_ranks(), "Failed to set Master ranks %s", mss::spd::c_str(i_target) ); + + // and dimm_ranks_configured is a PRD attr... + FAPI_TRY(l_data_engine.set_dimm_ranks_configured(), "Failed to set DIMM ranks configured %s", + mss::spd::c_str(i_target) ); + + // Adding metadata c-str fields derived from attrs set above + FAPI_TRY( (mss::gen::attr_engine::set(i_target)), + "Failed attr_engine::set for %s", mss::spd::c_str(i_target) ); + +fapi_try_exit: + return fapi2::current_err; +} + +/// +/// @brief Sets pre_eff_config attributes +/// @tparam P processor type +/// @tparam T fapi2::TargetType +/// @param[in] i_target the target on which to operate +/// @return FAPI2_RC_SUCCESS iff ok +/// +template +fapi2::ReturnCode set_pre_init_attrs( const fapi2::Target& i_target ) +{ + for( const auto& d : mss::find_targets(i_target)) + { + std::vector l_raw_spd; + FAPI_TRY(mss::spd::get_raw_data(d, l_raw_spd)); + { + // Gets the SPD facade + fapi2::ReturnCode l_rc(fapi2::FAPI2_RC_SUCCESS); + mss::spd::facade l_spd_decoder(d, l_raw_spd, l_rc); + + // Checks that the facade was setup correctly + FAPI_TRY(l_rc, "Failed to initialize SPD facade for %s", mss::spd::c_str(d)); + + // Sets pre-init attributes + FAPI_TRY(mss::set_pre_init_attrs

(d, l_spd_decoder), "%s failed to set pre init attrs", mss::spd::c_str(d) ); + } + } + +fapi_try_exit: + return fapi2::current_err; +} + +}//mss + +#endif diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.C index 7d770fc13..6c24fd182 100644 --- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.C +++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.C @@ -48,7 +48,7 @@ #include #include #include -#include +#include using fapi2::TARGET_TYPE_MCS; using fapi2::TARGET_TYPE_MCA; -- cgit v1.2.1