From d74a6f70680d8e675e8c620b3e1258dfcc9e4c06 Mon Sep 17 00:00:00 2001 From: Brian Silver Date: Wed, 8 Jun 2016 10:09:17 -0500 Subject: Update error handling for IPL procedures Change-Id: I4644227da8b9d84af4987e7652d7ef3e98494c3f RTC: 155734 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25568 Tested-by: Hostboot CI Reviewed-by: Louis Stermole Tested-by: Jenkins Server Reviewed-by: ANDRE A. MARIN Reviewed-by: Jennifer A. Stofer Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25573 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell --- src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit.C | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit.C') diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit.C index cf96bbf10..86cd3bf0e 100644 --- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit.C +++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit.C @@ -75,9 +75,9 @@ extern "C" return fapi2::FAPI2_RC_SUCCESS; } - // Configure the CCS engine. Since this is a chunk of McBIST logic, we don't want + // Configure the CCS engine. Since this is a chunk of MCBIST logic, we don't want // to do it for every port. If we ever break this code out so f/w can call draminit - // per-port (separate threads) we'll need to proved them a way to set this up before + // per-port (separate threads) we'll need to provide them a way to set this up before // sapwning per-port threads. { fapi2::buffer l_ccs_config; -- cgit v1.2.1