From a30a6311dc2028ee5dd16326dd8c742e88228986 Mon Sep 17 00:00:00 2001 From: Brian Silver Date: Mon, 31 Oct 2016 07:36:43 -0500 Subject: Add DP16 workarounds for Nimbus DD1.0 VREF override VCCD override Change-Id: I480efe28d299da37a717199933889d9bfecf8e11 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32011 Dev-Ready: Brian R. Silver Tested-by: Jenkins Server Reviewed-by: ANDRE A. MARIN Reviewed-by: STEPHEN GLANCY Tested-by: Hostboot CI Reviewed-by: Christian R. Geddes Reviewed-by: Matt K. Light Reviewed-by: Brian R. Silver Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32025 Tested-by: FSP CI Jenkins --- src/import/chips/p9/procedures/hwp/memory/p9_mss_ddr_phy_reset.C | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/import/chips/p9/procedures/hwp/memory/p9_mss_ddr_phy_reset.C') diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_ddr_phy_reset.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_ddr_phy_reset.C index 741d6dc0d..d450c4ad1 100644 --- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_ddr_phy_reset.C +++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_ddr_phy_reset.C @@ -156,6 +156,9 @@ extern "C" FAPI_TRY(mss::change_force_mclk_low(i_target, mss::HIGH), "force_mclk_low (set low) Failed rc = 0x%08X", uint64_t(fapi2::current_err) ); + // Workarounds + FAPI_TRY( mss::workarounds::dp16::after_phy_reset(i_target) ); + // If mss_unmask_ddrphy_errors gets it's own bad rc, // it will commit the passed in rc (if non-zero), and return it's own bad rc. // Else if mss_unmask_ddrphy_errors runs clean, -- cgit v1.2.1