From fa0064292733ea0c5091de493ea52845ba8d9ecd Mon Sep 17 00:00:00 2001
From: Tsung Yeung <tyeung@us.ibm.com>
Date: Mon, 8 Apr 2019 22:11:40 -0400
Subject: Ignore refresh overrun fir NVDIMM during post-restore sequence

While CCS is running (ccs_addr_sel_mux=1) mainline refreshes could get
queued up and later released 1 cycle apart, causing the refresh overrun
fir. Mask this error during post-restore sequence so it doesn't get called
out later.

Change-Id: Iac0f998bfcc807d6f5fa2e6a57ec07a7afa5cc60
CQ:SW462190
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75692
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75696
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
---
 .../p9/procedures/hwp/memory/lib/workarounds/ccs_workarounds.C    | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

(limited to 'src/import/chips/p9/procedures/hwp/memory/lib/workarounds/ccs_workarounds.C')

diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/ccs_workarounds.C b/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/ccs_workarounds.C
index 13c3cffae..f6a8b3467 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/ccs_workarounds.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/ccs_workarounds.C
@@ -241,6 +241,11 @@ fapi2::ReturnCode execute_inst_array(const fapi2::Target<fapi2::TARGET_TYPE_MCBI
 
     FAPI_TRY(mss::ccs::start_stop(i_target, mss::START), "%s Error in execute_inst_array", mss::c_str(i_port) );
 
+    // ccs_add_mux_sel back to low. Per Shelton, it is okay to change the mux while ccs is running
+    // when doing single port execute. ccs will remain in control until the end of the program then
+    // mainline takes over
+    FAPI_TRY(mss::change_addr_mux_sel(i_port, mss::LOW));
+
     mss::poll(i_target, TT::STATQ_REG, i_program.iv_poll,
               [&status](const size_t poll_remaining, const fapi2::buffer<uint64_t>& stat_reg) -> bool
     {
@@ -250,9 +255,6 @@ fapi2::ReturnCode execute_inst_array(const fapi2::Target<fapi2::TARGET_TYPE_MCBI
     },
     i_program.iv_probes);
 
-    // ccs_add_mux_sel back to low to give control back to mainline
-    FAPI_TRY(mss::change_addr_mux_sel(i_port, mss::LOW));
-
     // Check for done and success. DONE being the only bit set.
     if (status == STAT_QUERY_SUCCESS)
     {
-- 
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