From 07585c1409e3a768d941b8e1084e169011801439 Mon Sep 17 00:00:00 2001 From: Stephen Glancy Date: Tue, 2 Oct 2018 08:36:40 -0500 Subject: Removes unused attribute accessors Change-Id: If3628431d4ff5d153b284bc2d8e861094cf15f67 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66878 Reviewed-by: Louis Stermole Tested-by: Jenkins Server Tested-by: HWSV CI Tested-by: PPE CI Tested-by: Hostboot CI Reviewed-by: ANDRE A. MARIN Reviewed-by: Jennifer A. Stofer Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66881 Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Tested-by: FSP CI Jenkins Reviewed-by: Christian R. Geddes --- .../hwp/memory/lib/mss_attribute_accessors.H | 14876 +++++-------------- 1 file changed, 3491 insertions(+), 11385 deletions(-) (limited to 'src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H') diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H index 6e73aced9..3660561c0 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H @@ -57,29 +57,6 @@ fapi_try_exit: return fapi2::current_err; } -/// -/// @brief ATTR_MSS_VOLT_VPP getter -/// @param[in] const ref to the TARGET_TYPE_MCBIST -/// @param[out] uint32_t& reference to store the value -/// @note Generated by gen_accessors.pl generateParameters (NODIM A) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DRAM VPP Voltage, each voltage rail would need to have a value. Computed in -/// mss_volt C code - in millivolts. 0V - DDR3, 2.5V - DDR4 creator: mss_volt -/// consumer: mss_eff_cnfg, others firmware notes: -/// none -/// -inline fapi2::ReturnCode volt_vpp(const fapi2::Target& i_target, uint32_t& o_value) -{ - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_VOLT_VPP, i_target, o_value) ); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_VOLT_VPP: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - /// /// @brief ATTR_MSS_FREQ_OVERRIDE getter /// @param[in] const ref to the TARGET_TYPE_MCBIST @@ -129,77 +106,40 @@ fapi_try_exit: } /// -/// @brief ATTR_MSS_FREQ_BIAS_PERCENTAGE getter -/// @param[in] const ref to the TARGET_TYPE_MCBIST -/// @param[out] uint32_t& reference to store the value -/// @note Generated by gen_accessors.pl generateParameters (NODIM A) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Percentage to increase/decrease MEM frequency - two's complement number. -/// Measured in 100's. So the value of 100 is one percent increase. This frequency -/// change comes from changing multipliers and dividers to get the desired -/// frequency. The supported frequencies come from Tim Diemoz. Creator: platform set -/// this to 0. Users can set this to a valid value. VALID Values: (TBD % to TBD %) -/// (Tuleta) (TBD % to TBD %) (Glacier) Set by: PLL settings written by Dave -/// Cadigan -/// -inline fapi2::ReturnCode freq_bias_percentage(const fapi2::Target& i_target, - uint32_t& o_value) -{ - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_FREQ_BIAS_PERCENTAGE, i_target, o_value) ); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_FREQ_BIAS_PERCENTAGE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_SPARE getter +/// @brief ATTR_EFF_DIMM_SIZE getter /// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (A) +/// @param[out] ref to the value uint32_t +/// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Spare DRAM availability. Used in various locations and is computed in -/// mss_eff_cnfg. creator: mss_eff_cnfg consumer: various firmware notes: load from -/// spd OBSOLETE: Use -/// ATTR_VPD_DIMM_SPARE +/// @note DIMM Size, in GB Used in various locations and is computed in +/// mss_eff_cnfg. /// -inline fapi2::ReturnCode eff_dimm_spare(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_size(const fapi2::Target& i_target, uint32_t& o_value) { - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2][4]; + uint32_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_SPARE, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(l_mca)][mss::index(i_target)][0]), 4); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_SIZE, l_mcs, l_value) ); + o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_SPARE: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_SIZE: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_SPARE getter +/// @brief ATTR_EFF_DIMM_SIZE getter /// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (B) +/// @param[out] uint32_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Spare DRAM availability. Used in various locations and is computed in -/// mss_eff_cnfg. creator: mss_eff_cnfg consumer: various firmware notes: load from -/// spd OBSOLETE: Use -/// ATTR_VPD_DIMM_SPARE +/// @note DIMM Size, in GB Used in various locations and is computed in +/// mss_eff_cnfg. /// -inline fapi2::ReturnCode eff_dimm_spare(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_size(const fapi2::Target& i_target, uint32_t* o_array) { if (o_array == nullptr) { @@ -207,31 +147,29 @@ inline fapi2::ReturnCode eff_dimm_spare(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_SPARE, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_SIZE, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 8); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_SPARE: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_SIZE: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_SPARE getter +/// @brief ATTR_EFF_DIMM_SIZE getter /// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (C) +/// @param[out] uint32_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Spare DRAM availability. Used in various locations and is computed in -/// mss_eff_cnfg. creator: mss_eff_cnfg consumer: various firmware notes: load from -/// spd OBSOLETE: Use -/// ATTR_VPD_DIMM_SPARE +/// @note DIMM Size, in GB Used in various locations and is computed in +/// mss_eff_cnfg. /// -inline fapi2::ReturnCode eff_dimm_spare(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_size(const fapi2::Target& i_target, uint32_t* o_array) { if (o_array == nullptr) { @@ -239,84 +177,78 @@ inline fapi2::ReturnCode eff_dimm_spare(const fapi2::Target -/// @param[out] ref to the value uint32_t +/// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DRAM Write Vref. Used in various locations and comes from the MT keyword of the -/// VPD or is computed in mss_eff_cnfg_termination. creator: VPD(MT) or -/// mss_eff_cnfg_termination consumer: various.C and initfile firmware notes: none -/// This is the nominal value This is for -/// DDR3 +/// @note CAS Latency. Each memory channel will have a value. creator: mss_freq consumer: +/// various firmware notes: +/// none /// -inline fapi2::ReturnCode eff_dram_wr_vref(const fapi2::Target& i_target, uint32_t& o_value) +inline fapi2::ReturnCode eff_dram_cl(const fapi2::Target& i_target, uint8_t& o_value) { - uint32_t l_value[2]; + uint8_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_WR_VREF, i_target.getParent(), l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_CL, i_target.getParent(), l_value) ); o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_WR_VREF: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DRAM_CL: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DRAM_WR_VREF getter +/// @brief ATTR_EFF_DRAM_CL getter /// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint32_t +/// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DRAM Write Vref. Used in various locations and comes from the MT keyword of the -/// VPD or is computed in mss_eff_cnfg_termination. creator: VPD(MT) or -/// mss_eff_cnfg_termination consumer: various.C and initfile firmware notes: none -/// This is the nominal value This is for -/// DDR3 +/// @note CAS Latency. Each memory channel will have a value. creator: mss_freq consumer: +/// various firmware notes: +/// none /// -inline fapi2::ReturnCode eff_dram_wr_vref(const fapi2::Target& i_target, uint32_t& o_value) +inline fapi2::ReturnCode eff_dram_cl(const fapi2::Target& i_target, uint8_t& o_value) { - uint32_t l_value[2]; + uint8_t l_value[2]; auto l_mca = i_target.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_WR_VREF, l_mca.getParent(), l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_CL, l_mca.getParent(), l_value) ); o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_WR_VREF: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DRAM_CL: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DRAM_WR_VREF getter +/// @brief ATTR_EFF_DRAM_CL getter /// @param[in] const ref to the fapi2::Target -/// @param[out] uint32_t* memory to store the value +/// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DRAM Write Vref. Used in various locations and comes from the MT keyword of the -/// VPD or is computed in mss_eff_cnfg_termination. creator: VPD(MT) or -/// mss_eff_cnfg_termination consumer: various.C and initfile firmware notes: none -/// This is the nominal value This is for -/// DDR3 +/// @note CAS Latency. Each memory channel will have a value. creator: mss_freq consumer: +/// various firmware notes: +/// none /// -inline fapi2::ReturnCode eff_dram_wr_vref(const fapi2::Target& i_target, uint32_t* o_array) +inline fapi2::ReturnCode eff_dram_cl(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -324,81 +256,81 @@ inline fapi2::ReturnCode eff_dram_wr_vref(const fapi2::Target -/// @param[out] ref to the value uint32_t +/// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Enables for which VREF to use on the WR Schmoo. The LSB corresponds to the -/// highest WR -/// Vref +/// @note Additive Latency. Used in various locations and is computed in +/// mss_eff_cnfg_timing. Each memory channel will have a value. creator: +/// mss_eff_cnfg_timing consumer: various firmware notes: +/// none /// -inline fapi2::ReturnCode eff_dram_wr_vref_schmoo(const fapi2::Target& i_target, - uint32_t& o_value) +inline fapi2::ReturnCode eff_dram_al(const fapi2::Target& i_target, uint8_t& o_value) { - uint32_t l_value[2]; + uint8_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_WR_VREF_SCHMOO, i_target.getParent(), l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_AL, i_target.getParent(), l_value) ); o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_WR_VREF_SCHMOO: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DRAM_AL: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DRAM_WR_VREF_SCHMOO getter +/// @brief ATTR_EFF_DRAM_AL getter /// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint32_t +/// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Enables for which VREF to use on the WR Schmoo. The LSB corresponds to the -/// highest WR -/// Vref +/// @note Additive Latency. Used in various locations and is computed in +/// mss_eff_cnfg_timing. Each memory channel will have a value. creator: +/// mss_eff_cnfg_timing consumer: various firmware notes: +/// none /// -inline fapi2::ReturnCode eff_dram_wr_vref_schmoo(const fapi2::Target& i_target, - uint32_t& o_value) +inline fapi2::ReturnCode eff_dram_al(const fapi2::Target& i_target, uint8_t& o_value) { - uint32_t l_value[2]; + uint8_t l_value[2]; auto l_mca = i_target.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_WR_VREF_SCHMOO, l_mca.getParent(), l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_AL, l_mca.getParent(), l_value) ); o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_WR_VREF_SCHMOO: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DRAM_AL: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DRAM_WR_VREF_SCHMOO getter +/// @brief ATTR_EFF_DRAM_AL getter /// @param[in] const ref to the fapi2::Target -/// @param[out] uint32_t* memory to store the value +/// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Enables for which VREF to use on the WR Schmoo. The LSB corresponds to the -/// highest WR -/// Vref +/// @note Additive Latency. Used in various locations and is computed in +/// mss_eff_cnfg_timing. Each memory channel will have a value. creator: +/// mss_eff_cnfg_timing consumer: various firmware notes: +/// none /// -inline fapi2::ReturnCode eff_dram_wr_vref_schmoo(const fapi2::Target& i_target, - uint32_t* o_array) +inline fapi2::ReturnCode eff_dram_al(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -406,82 +338,81 @@ inline fapi2::ReturnCode eff_dram_wr_vref_schmoo(const fapi2::Target -/// @param[out] ref to the value uint32_t +/// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Enables for which VREF to use on the WR Schmoo. The LSB corresponds to the -/// highest WR -/// Vref +/// @note CAS Write Latency. Used in various locations and is computed in +/// mss_eff_cnfg_timing. Each memory channel will have a value. creator: +/// mss_eff_cnfg_timing consumer: various firmware notes: +/// none /// -inline fapi2::ReturnCode eff_dram_wrddr4_vref_schmoo(const fapi2::Target& i_target, - uint32_t& o_value) +inline fapi2::ReturnCode eff_dram_cwl(const fapi2::Target& i_target, uint8_t& o_value) { - uint32_t l_value[2]; + uint8_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_WRDDR4_VREF_SCHMOO, i_target.getParent(), - l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_CWL, i_target.getParent(), l_value) ); o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_WRDDR4_VREF_SCHMOO: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DRAM_CWL: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DRAM_WRDDR4_VREF_SCHMOO getter +/// @brief ATTR_EFF_DRAM_CWL getter /// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint32_t +/// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Enables for which VREF to use on the WR Schmoo. The LSB corresponds to the -/// highest WR -/// Vref +/// @note CAS Write Latency. Used in various locations and is computed in +/// mss_eff_cnfg_timing. Each memory channel will have a value. creator: +/// mss_eff_cnfg_timing consumer: various firmware notes: +/// none /// -inline fapi2::ReturnCode eff_dram_wrddr4_vref_schmoo(const fapi2::Target& i_target, - uint32_t& o_value) +inline fapi2::ReturnCode eff_dram_cwl(const fapi2::Target& i_target, uint8_t& o_value) { - uint32_t l_value[2]; + uint8_t l_value[2]; auto l_mca = i_target.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_WRDDR4_VREF_SCHMOO, l_mca.getParent(), l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_CWL, l_mca.getParent(), l_value) ); o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_WRDDR4_VREF_SCHMOO: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DRAM_CWL: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DRAM_WRDDR4_VREF_SCHMOO getter +/// @brief ATTR_EFF_DRAM_CWL getter /// @param[in] const ref to the fapi2::Target -/// @param[out] uint32_t* memory to store the value +/// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Enables for which VREF to use on the WR Schmoo. The LSB corresponds to the -/// highest WR -/// Vref +/// @note CAS Write Latency. Used in various locations and is computed in +/// mss_eff_cnfg_timing. Each memory channel will have a value. creator: +/// mss_eff_cnfg_timing consumer: various firmware notes: +/// none /// -inline fapi2::ReturnCode eff_dram_wrddr4_vref_schmoo(const fapi2::Target& i_target, - uint32_t* o_array) +inline fapi2::ReturnCode eff_dram_cwl(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -489,53 +420,57 @@ inline fapi2::ReturnCode eff_dram_wrddr4_vref_schmoo(const fapi2::Target -/// @param[out] ref to the value uint32_t +/// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DIMM Size, in GB Used in various locations and is computed in -/// mss_eff_cnfg. +/// @note Read Burst Type. Used in various locations and is computed in mss_eff_cnfg. Each +/// memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// firmware notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_size(const fapi2::Target& i_target, uint32_t& o_value) +inline fapi2::ReturnCode eff_dram_rbt(const fapi2::Target& i_target, uint8_t& o_value) { - uint32_t l_value[2][2]; + uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_SIZE, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_RBT, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_SIZE: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DRAM_RBT: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_SIZE getter +/// @brief ATTR_EFF_DRAM_RBT getter /// @param[in] const ref to the fapi2::Target -/// @param[out] uint32_t* memory to store the value +/// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DIMM Size, in GB Used in various locations and is computed in -/// mss_eff_cnfg. +/// @note Read Burst Type. Used in various locations and is computed in mss_eff_cnfg. Each +/// memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// firmware notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_size(const fapi2::Target& i_target, uint32_t* o_array) +inline fapi2::ReturnCode eff_dram_rbt(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -543,29 +478,31 @@ inline fapi2::ReturnCode eff_dimm_size(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_SIZE, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 8); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_RBT, l_mcs, l_value) ); + memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_SIZE: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DRAM_RBT: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_SIZE getter +/// @brief ATTR_EFF_DRAM_RBT getter /// @param[in] const ref to the fapi2::Target -/// @param[out] uint32_t* memory to store the value +/// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DIMM Size, in GB Used in various locations and is computed in -/// mss_eff_cnfg. +/// @note Read Burst Type. Used in various locations and is computed in mss_eff_cnfg. Each +/// memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// firmware notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_size(const fapi2::Target& i_target, uint32_t* o_array) +inline fapi2::ReturnCode eff_dram_rbt(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -573,78 +510,57 @@ inline fapi2::ReturnCode eff_dimm_size(const fapi2::Target +/// @brief ATTR_EFF_DRAM_TM getter +/// @param[in] const ref to the fapi2::Target /// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note CAS Latency. Each memory channel will have a value. creator: mss_freq consumer: -/// various firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_dram_cl(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_CL, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_CL: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DRAM_CL getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) +/// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note CAS Latency. Each memory channel will have a value. creator: mss_freq consumer: -/// various firmware notes: +/// @note Test Mode. Used in various locations and is computed in mss_eff_cnfg. Each +/// memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// firmware notes: /// none /// -inline fapi2::ReturnCode eff_dram_cl(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dram_tm(const fapi2::Target& i_target, uint8_t& o_value) { - uint8_t l_value[2]; + uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); + auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_CL, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_TM, l_mcs, l_value) ); + o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_CL: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DRAM_TM: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DRAM_CL getter -/// @param[in] const ref to the fapi2::Target +/// @brief ATTR_EFF_DRAM_TM getter +/// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) +/// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note CAS Latency. Each memory channel will have a value. creator: mss_freq consumer: -/// various firmware notes: +/// @note Test Mode. Used in various locations and is computed in mss_eff_cnfg. Each +/// memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// firmware notes: /// none /// -inline fapi2::ReturnCode eff_dram_cl(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dram_tm(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -652,81 +568,89 @@ inline fapi2::ReturnCode eff_dram_cl(const fapi2::Target return fapi2::FAPI2_RC_INVALID_PARAMETER; } - uint8_t l_value[2]; + uint8_t l_value[2][2]; + auto l_mcs = i_target.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_CL, i_target, l_value) ); - memcpy(o_array, &l_value, 2); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_TM, l_mcs, l_value) ); + memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_CL: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DRAM_TM: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DRAM_AL getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D) +/// @brief ATTR_EFF_DRAM_TM getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] uint8_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Additive Latency. Used in various locations and is computed in -/// mss_eff_cnfg_timing. Each memory channel will have a value. creator: -/// mss_eff_cnfg_timing consumer: various firmware notes: +/// @note Test Mode. Used in various locations and is computed in mss_eff_cnfg. Each +/// memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// firmware notes: /// none /// -inline fapi2::ReturnCode eff_dram_al(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dram_tm(const fapi2::Target& i_target, uint8_t* o_array) { - uint8_t l_value[2]; + if (o_array == nullptr) + { + FAPI_ERR("nullptr passed to attribute accessor %s", __func__); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + } - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_AL, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; + uint8_t l_value[2][2]; + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_TM, i_target, l_value) ); + memcpy(o_array, &l_value, 4); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_AL: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DRAM_TM: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DRAM_AL getter +/// @brief ATTR_EFF_DRAM_DLL_RESET getter /// @param[in] const ref to the fapi2::Target /// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) +/// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Additive Latency. Used in various locations and is computed in -/// mss_eff_cnfg_timing. Each memory channel will have a value. creator: -/// mss_eff_cnfg_timing consumer: various firmware notes: +/// @note DLL Reset. Used in various locations and is computed in mss_eff_cnfg. Each +/// memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// firmware notes: /// none /// -inline fapi2::ReturnCode eff_dram_al(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dram_dll_reset(const fapi2::Target& i_target, uint8_t& o_value) { - uint8_t l_value[2]; + uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); + auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_AL, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_DLL_RESET, l_mcs, l_value) ); + o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_AL: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DRAM_DLL_RESET: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DRAM_AL getter -/// @param[in] const ref to the fapi2::Target +/// @brief ATTR_EFF_DRAM_DLL_RESET getter +/// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) +/// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Additive Latency. Used in various locations and is computed in -/// mss_eff_cnfg_timing. Each memory channel will have a value. creator: -/// mss_eff_cnfg_timing consumer: various firmware notes: +/// @note DLL Reset. Used in various locations and is computed in mss_eff_cnfg. Each +/// memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// firmware notes: /// none /// -inline fapi2::ReturnCode eff_dram_al(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dram_dll_reset(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -734,81 +658,31 @@ inline fapi2::ReturnCode eff_dram_al(const fapi2::Target return fapi2::FAPI2_RC_INVALID_PARAMETER; } - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_AL, i_target, l_value) ); - memcpy(o_array, &l_value, 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_AL: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DRAM_CWL getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note CAS Write Latency. Used in various locations and is computed in -/// mss_eff_cnfg_timing. Each memory channel will have a value. creator: -/// mss_eff_cnfg_timing consumer: various firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_dram_cwl(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_CWL, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_CWL: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DRAM_CWL getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note CAS Write Latency. Used in various locations and is computed in -/// mss_eff_cnfg_timing. Each memory channel will have a value. creator: -/// mss_eff_cnfg_timing consumer: various firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_dram_cwl(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - auto l_mca = i_target.getParent(); + uint8_t l_value[2][2]; + auto l_mcs = i_target.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_CWL, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_DLL_RESET, l_mcs, l_value) ); + memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_CWL: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DRAM_DLL_RESET: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DRAM_CWL getter +/// @brief ATTR_EFF_DRAM_DLL_RESET getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) +/// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note CAS Write Latency. Used in various locations and is computed in -/// mss_eff_cnfg_timing. Each memory channel will have a value. creator: -/// mss_eff_cnfg_timing consumer: various firmware notes: +/// @note DLL Reset. Used in various locations and is computed in mss_eff_cnfg. Each +/// memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// firmware notes: /// none /// -inline fapi2::ReturnCode eff_dram_cwl(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dram_dll_reset(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -816,57 +690,57 @@ inline fapi2::ReturnCode eff_dram_cwl(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Read Burst Type. Used in various locations and is computed in mss_eff_cnfg. Each +/// @note DLL Enable. Used in various locations and is computed in mss_eff_cnfg. Each /// memory channel will have a value. creator: mss_eff_cnfg consumer: various /// firmware notes: /// none /// -inline fapi2::ReturnCode eff_dram_rbt(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dram_dll_enable(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_RBT, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_DLL_ENABLE, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_RBT: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DRAM_DLL_ENABLE: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DRAM_RBT getter +/// @brief ATTR_EFF_DRAM_DLL_ENABLE getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Read Burst Type. Used in various locations and is computed in mss_eff_cnfg. Each +/// @note DLL Enable. Used in various locations and is computed in mss_eff_cnfg. Each /// memory channel will have a value. creator: mss_eff_cnfg consumer: various /// firmware notes: /// none /// -inline fapi2::ReturnCode eff_dram_rbt(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dram_dll_enable(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -877,28 +751,28 @@ inline fapi2::ReturnCode eff_dram_rbt(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_RBT, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_DLL_ENABLE, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_RBT: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DRAM_DLL_ENABLE: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DRAM_RBT getter +/// @brief ATTR_EFF_DRAM_DLL_ENABLE getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Read Burst Type. Used in various locations and is computed in mss_eff_cnfg. Each +/// @note DLL Enable. Used in various locations and is computed in mss_eff_cnfg. Each /// memory channel will have a value. creator: mss_eff_cnfg consumer: various /// firmware notes: /// none /// -inline fapi2::ReturnCode eff_dram_rbt(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dram_dll_enable(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -908,87 +782,80 @@ inline fapi2::ReturnCode eff_dram_rbt(const fapi2::Target +/// @brief ATTR_EFF_DRAM_WR_LVL_ENABLE getter +/// @param[in] const ref to the fapi2::Target /// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) +/// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Test Mode. Used in various locations and is computed in mss_eff_cnfg. Each -/// memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// @note Write Level Enable. Used in various locations and is computed in mss_eff_cnfg. +/// Each memory channel will have a value. creator: mss_eff_cnfg consumer: various /// firmware notes: /// none /// -inline fapi2::ReturnCode eff_dram_tm(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dram_wr_lvl_enable(const fapi2::Target& i_target, uint8_t& o_value) { - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); + uint8_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_TM, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_WR_LVL_ENABLE, i_target.getParent(), l_value) ); + o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_TM: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DRAM_WR_LVL_ENABLE: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DRAM_TM getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) +/// @brief ATTR_EFF_DRAM_WR_LVL_ENABLE getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint8_t +/// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Test Mode. Used in various locations and is computed in mss_eff_cnfg. Each -/// memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// @note Write Level Enable. Used in various locations and is computed in mss_eff_cnfg. +/// Each memory channel will have a value. creator: mss_eff_cnfg consumer: various /// firmware notes: /// none /// -inline fapi2::ReturnCode eff_dram_tm(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dram_wr_lvl_enable(const fapi2::Target& i_target, + uint8_t& o_value) { - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); + uint8_t l_value[2]; + auto l_mca = i_target.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_TM, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_WR_LVL_ENABLE, l_mca.getParent(), l_value) ); + o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_TM: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DRAM_WR_LVL_ENABLE: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DRAM_TM getter +/// @brief ATTR_EFF_DRAM_WR_LVL_ENABLE getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) +/// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Test Mode. Used in various locations and is computed in mss_eff_cnfg. Each -/// memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// @note Write Level Enable. Used in various locations and is computed in mss_eff_cnfg. +/// Each memory channel will have a value. creator: mss_eff_cnfg consumer: various /// firmware notes: /// none /// -inline fapi2::ReturnCode eff_dram_tm(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dram_wr_lvl_enable(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -996,89 +863,82 @@ inline fapi2::ReturnCode eff_dram_tm(const fapi2::Target return fapi2::FAPI2_RC_INVALID_PARAMETER; } - uint8_t l_value[2][2]; + uint8_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_TM, i_target, l_value) ); - memcpy(o_array, &l_value, 4); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_WR_LVL_ENABLE, i_target, l_value) ); + memcpy(o_array, &l_value, 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_TM: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DRAM_WR_LVL_ENABLE: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DRAM_DLL_RESET getter -/// @param[in] const ref to the fapi2::Target +/// @brief ATTR_EFF_DRAM_OUTPUT_BUFFER getter +/// @param[in] const ref to the fapi2::Target /// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) +/// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DLL Reset. Used in various locations and is computed in mss_eff_cnfg. Each -/// memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: +/// @note DRAM Qoff. Enables or disables DRAM output. Used in various locations and is +/// computed in mss_eff_cnfg. Each memory channel will have a value. creator: +/// mss_eff_cnfg consumer: various firmware notes: /// none /// -inline fapi2::ReturnCode eff_dram_dll_reset(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dram_output_buffer(const fapi2::Target& i_target, uint8_t& o_value) { - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); + uint8_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_DLL_RESET, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_OUTPUT_BUFFER, i_target.getParent(), l_value) ); + o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_DLL_RESET: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DRAM_OUTPUT_BUFFER: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DRAM_DLL_RESET getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) +/// @brief ATTR_EFF_DRAM_OUTPUT_BUFFER getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint8_t +/// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DLL Reset. Used in various locations and is computed in mss_eff_cnfg. Each -/// memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: +/// @note DRAM Qoff. Enables or disables DRAM output. Used in various locations and is +/// computed in mss_eff_cnfg. Each memory channel will have a value. creator: +/// mss_eff_cnfg consumer: various firmware notes: /// none /// -inline fapi2::ReturnCode eff_dram_dll_reset(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dram_output_buffer(const fapi2::Target& i_target, + uint8_t& o_value) { - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); + uint8_t l_value[2]; + auto l_mca = i_target.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_DLL_RESET, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_OUTPUT_BUFFER, l_mca.getParent(), l_value) ); + o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_DLL_RESET: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DRAM_OUTPUT_BUFFER: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DRAM_DLL_RESET getter +/// @brief ATTR_EFF_DRAM_OUTPUT_BUFFER getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) +/// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DLL Reset. Used in various locations and is computed in mss_eff_cnfg. Each -/// memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: +/// @note DRAM Qoff. Enables or disables DRAM output. Used in various locations and is +/// computed in mss_eff_cnfg. Each memory channel will have a value. creator: +/// mss_eff_cnfg consumer: various firmware notes: /// none /// -inline fapi2::ReturnCode eff_dram_dll_reset(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dram_output_buffer(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -1086,81 +946,81 @@ inline fapi2::ReturnCode eff_dram_dll_reset(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DLL Precharge PD. Used in various locations and is computed in mss_eff_cnfg. -/// Each memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: +/// @note Multi Purpose Register Mode. Used in various locations and is computed in +/// mss_eff_cnfg. Each memory channel will have a value. creator: mss_eff_cnfg +/// consumer: various firmware notes: /// none /// -inline fapi2::ReturnCode eff_dram_dll_ppd(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_mpr_mode(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_DLL_PPD, i_target.getParent(), l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_MPR_MODE, i_target.getParent(), l_value) ); o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_DLL_PPD: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_MPR_MODE: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DRAM_DLL_PPD getter +/// @brief ATTR_EFF_MPR_MODE getter /// @param[in] const ref to the fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DLL Precharge PD. Used in various locations and is computed in mss_eff_cnfg. -/// Each memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: +/// @note Multi Purpose Register Mode. Used in various locations and is computed in +/// mss_eff_cnfg. Each memory channel will have a value. creator: mss_eff_cnfg +/// consumer: various firmware notes: /// none /// -inline fapi2::ReturnCode eff_dram_dll_ppd(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_mpr_mode(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2]; auto l_mca = i_target.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_DLL_PPD, l_mca.getParent(), l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_MPR_MODE, l_mca.getParent(), l_value) ); o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_DLL_PPD: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_MPR_MODE: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DRAM_DLL_PPD getter +/// @brief ATTR_EFF_MPR_MODE getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DLL Precharge PD. Used in various locations and is computed in mss_eff_cnfg. -/// Each memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: +/// @note Multi Purpose Register Mode. Used in various locations and is computed in +/// mss_eff_cnfg. Each memory channel will have a value. creator: mss_eff_cnfg +/// consumer: various firmware notes: /// none /// -inline fapi2::ReturnCode eff_dram_dll_ppd(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_mpr_mode(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -1170,55 +1030,65 @@ inline fapi2::ReturnCode eff_dram_dll_ppd(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DLL Enable. Used in various locations and is computed in mss_eff_cnfg. Each -/// memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: +/// @note F0RC00: Global Features Control Word.For normal operation, output inversion is +/// always enabled. For DIMM vendor test purpose, output inversion can be disabled. +/// When disabled, register tPDM is not guaranteed to be met. NOTE: Default value - +/// 0x00. Values Range from 0-8. 00 - Normal Operation; 01 - Output Inversion +/// Disabled; 02 - Weak Drive Enabled; 04 - A outputs disabled; 08 - B outputs +/// disabled; So on. No need to calculate; User can override with desired +/// experimental value. creator: mss_eff_cnfg consumer: mss_dram_init firmware +/// notes: /// none /// -inline fapi2::ReturnCode eff_dram_dll_enable(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_rc00(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_DLL_ENABLE, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC00, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_DLL_ENABLE: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC00: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DRAM_DLL_ENABLE getter +/// @brief ATTR_EFF_DIMM_DDR4_RC00 getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DLL Enable. Used in various locations and is computed in mss_eff_cnfg. Each -/// memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: +/// @note F0RC00: Global Features Control Word.For normal operation, output inversion is +/// always enabled. For DIMM vendor test purpose, output inversion can be disabled. +/// When disabled, register tPDM is not guaranteed to be met. NOTE: Default value - +/// 0x00. Values Range from 0-8. 00 - Normal Operation; 01 - Output Inversion +/// Disabled; 02 - Weak Drive Enabled; 04 - A outputs disabled; 08 - B outputs +/// disabled; So on. No need to calculate; User can override with desired +/// experimental value. creator: mss_eff_cnfg consumer: mss_dram_init firmware +/// notes: /// none /// -inline fapi2::ReturnCode eff_dram_dll_enable(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc00(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -1229,28 +1099,33 @@ inline fapi2::ReturnCode eff_dram_dll_enable(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_DLL_ENABLE, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC00, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_DLL_ENABLE: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC00: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DRAM_DLL_ENABLE getter +/// @brief ATTR_EFF_DIMM_DDR4_RC00 getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DLL Enable. Used in various locations and is computed in mss_eff_cnfg. Each -/// memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: +/// @note F0RC00: Global Features Control Word.For normal operation, output inversion is +/// always enabled. For DIMM vendor test purpose, output inversion can be disabled. +/// When disabled, register tPDM is not guaranteed to be met. NOTE: Default value - +/// 0x00. Values Range from 0-8. 00 - Normal Operation; 01 - Output Inversion +/// Disabled; 02 - Weak Drive Enabled; 04 - A outputs disabled; 08 - B outputs +/// disabled; So on. No need to calculate; User can override with desired +/// experimental value. creator: mss_eff_cnfg consumer: mss_dram_init firmware +/// notes: /// none /// -inline fapi2::ReturnCode eff_dram_dll_enable(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc00(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -1260,80 +1135,99 @@ inline fapi2::ReturnCode eff_dram_dll_enable(const fapi2::Target +/// @brief ATTR_EFF_DIMM_DDR4_RC01 getter +/// @param[in] const ref to the fapi2::Target /// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D) +/// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Write Level Enable. Used in various locations and is computed in mss_eff_cnfg. -/// Each memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: +/// @note F0RC01 - Clock Driver Enable Control Word.1. Output clocks may be individually +/// turned on or off to conserve power. The system must read the module SPD to +/// determine which clock outputs are used by the module. The PLL remains locked on +/// CK_t/CK_c unless the system stops the clock inputs to the DDR4RCD02 to enter the +/// lowest power mode. Default value - 0x00. Values Range from 0-8. No need to +/// calculate; User can override with desired experimental value. creator: +/// mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dram_wr_lvl_enable(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_rc01(const fapi2::Target& i_target, uint8_t& o_value) { - uint8_t l_value[2]; + uint8_t l_value[2][2]; + auto l_mca = i_target.getParent(); + auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_WR_LVL_ENABLE, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC01, l_mcs, l_value) ); + o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_WR_LVL_ENABLE: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC01: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DRAM_WR_LVL_ENABLE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) +/// @brief ATTR_EFF_DIMM_DDR4_RC01 getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] uint8_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Write Level Enable. Used in various locations and is computed in mss_eff_cnfg. -/// Each memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_dram_wr_lvl_enable(const fapi2::Target& i_target, - uint8_t& o_value) +/// @note F0RC01 - Clock Driver Enable Control Word.1. Output clocks may be individually +/// turned on or off to conserve power. The system must read the module SPD to +/// determine which clock outputs are used by the module. The PLL remains locked on +/// CK_t/CK_c unless the system stops the clock inputs to the DDR4RCD02 to enter the +/// lowest power mode. Default value - 0x00. Values Range from 0-8. No need to +/// calculate; User can override with desired experimental value. creator: +/// mss_eff_cnfg consumer: mss_dram_init firmware notes: +/// none +/// +inline fapi2::ReturnCode eff_dimm_ddr4_rc01(const fapi2::Target& i_target, uint8_t* o_array) { - uint8_t l_value[2]; - auto l_mca = i_target.getParent(); + if (o_array == nullptr) + { + FAPI_ERR("nullptr passed to attribute accessor %s", __func__); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + } - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_WR_LVL_ENABLE, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; + uint8_t l_value[2][2]; + auto l_mcs = i_target.getParent(); + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC01, l_mcs, l_value) ); + memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_WR_LVL_ENABLE: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC01: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DRAM_WR_LVL_ENABLE getter +/// @brief ATTR_EFF_DIMM_DDR4_RC01 getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) +/// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Write Level Enable. Used in various locations and is computed in mss_eff_cnfg. -/// Each memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: +/// @note F0RC01 - Clock Driver Enable Control Word.1. Output clocks may be individually +/// turned on or off to conserve power. The system must read the module SPD to +/// determine which clock outputs are used by the module. The PLL remains locked on +/// CK_t/CK_c unless the system stops the clock inputs to the DDR4RCD02 to enter the +/// lowest power mode. Default value - 0x00. Values Range from 0-8. No need to +/// calculate; User can override with desired experimental value. creator: +/// mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dram_wr_lvl_enable(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc01(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -1341,82 +1235,89 @@ inline fapi2::ReturnCode eff_dram_wr_lvl_enable(const fapi2::Target +/// @brief ATTR_EFF_DIMM_DDR4_RC02 getter +/// @param[in] const ref to the fapi2::Target /// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D) +/// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DRAM Qoff. Enables or disables DRAM output. Used in various locations and is -/// computed in mss_eff_cnfg. Each memory channel will have a value. creator: -/// mss_eff_cnfg consumer: various firmware notes: +/// @note F0RC02: Timing and IBT Control Word; Default value - 0x00. Values Range from +/// 0-8. No need to calculate; User can override with desired experimental value. +/// creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dram_output_buffer(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_rc02(const fapi2::Target& i_target, uint8_t& o_value) { - uint8_t l_value[2]; + uint8_t l_value[2][2]; + auto l_mca = i_target.getParent(); + auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_OUTPUT_BUFFER, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC02, l_mcs, l_value) ); + o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_OUTPUT_BUFFER: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC02: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DRAM_OUTPUT_BUFFER getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) +/// @brief ATTR_EFF_DIMM_DDR4_RC02 getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] uint8_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DRAM Qoff. Enables or disables DRAM output. Used in various locations and is -/// computed in mss_eff_cnfg. Each memory channel will have a value. creator: -/// mss_eff_cnfg consumer: various firmware notes: +/// @note F0RC02: Timing and IBT Control Word; Default value - 0x00. Values Range from +/// 0-8. No need to calculate; User can override with desired experimental value. +/// creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dram_output_buffer(const fapi2::Target& i_target, - uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_rc02(const fapi2::Target& i_target, uint8_t* o_array) { - uint8_t l_value[2]; - auto l_mca = i_target.getParent(); + if (o_array == nullptr) + { + FAPI_ERR("nullptr passed to attribute accessor %s", __func__); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + } - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_OUTPUT_BUFFER, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; + uint8_t l_value[2][2]; + auto l_mcs = i_target.getParent(); + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC02, l_mcs, l_value) ); + memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_OUTPUT_BUFFER: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC02: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DRAM_OUTPUT_BUFFER getter +/// @brief ATTR_EFF_DIMM_DDR4_RC02 getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) +/// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DRAM Qoff. Enables or disables DRAM output. Used in various locations and is -/// computed in mss_eff_cnfg. Each memory channel will have a value. creator: -/// mss_eff_cnfg consumer: various firmware notes: +/// @note F0RC02: Timing and IBT Control Word; Default value - 0x00. Values Range from +/// 0-8. No need to calculate; User can override with desired experimental value. +/// creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dram_output_buffer(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc02(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -1424,81 +1325,92 @@ inline fapi2::ReturnCode eff_dram_output_buffer(const fapi2::Target +/// @brief ATTR_EFF_DIMM_DDR4_RC03 getter +/// @param[in] const ref to the fapi2::Target /// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D) +/// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Partial Array Self-Refresh. Used in various locations and is computed in -/// mss_eff_cnfg. Each memory channel will have a value. creator: mss_eff_cnfg -/// consumer: various firmware notes: +/// @note F0RC03 - CA and CS Signals Driver Characteristics Control Word; Default value - +/// 0x05 (Moderate Drive). Values Range from 00 to 0F. Has to be picked up from SPD +/// byte 137, 1st Nibble for CS and CA. creator: mss_eff_cnfg consumer: +/// mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dram_pasr(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_rc03(const fapi2::Target& i_target, uint8_t& o_value) { - uint8_t l_value[2]; + uint8_t l_value[2][2]; + auto l_mca = i_target.getParent(); + auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_PASR, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC03, l_mcs, l_value) ); + o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_PASR: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC03: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DRAM_PASR getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) +/// @brief ATTR_EFF_DIMM_DDR4_RC03 getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] uint8_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Partial Array Self-Refresh. Used in various locations and is computed in -/// mss_eff_cnfg. Each memory channel will have a value. creator: mss_eff_cnfg -/// consumer: various firmware notes: +/// @note F0RC03 - CA and CS Signals Driver Characteristics Control Word; Default value - +/// 0x05 (Moderate Drive). Values Range from 00 to 0F. Has to be picked up from SPD +/// byte 137, 1st Nibble for CS and CA. creator: mss_eff_cnfg consumer: +/// mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dram_pasr(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_rc03(const fapi2::Target& i_target, uint8_t* o_array) { - uint8_t l_value[2]; - auto l_mca = i_target.getParent(); + if (o_array == nullptr) + { + FAPI_ERR("nullptr passed to attribute accessor %s", __func__); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + } - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_PASR, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; + uint8_t l_value[2][2]; + auto l_mcs = i_target.getParent(); + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC03, l_mcs, l_value) ); + memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_PASR: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC03: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DRAM_PASR getter +/// @brief ATTR_EFF_DIMM_DDR4_RC03 getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) +/// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Partial Array Self-Refresh. Used in various locations and is computed in -/// mss_eff_cnfg. Each memory channel will have a value. creator: mss_eff_cnfg -/// consumer: various firmware notes: +/// @note F0RC03 - CA and CS Signals Driver Characteristics Control Word; Default value - +/// 0x05 (Moderate Drive). Values Range from 00 to 0F. Has to be picked up from SPD +/// byte 137, 1st Nibble for CS and CA. creator: mss_eff_cnfg consumer: +/// mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dram_pasr(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc03(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -1506,81 +1418,92 @@ inline fapi2::ReturnCode eff_dram_pasr(const fapi2::Target +/// @brief ATTR_EFF_DIMM_DDR4_RC04 getter +/// @param[in] const ref to the fapi2::Target /// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D) +/// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Auto Self-Refresh. Used in various locations and is computed in mss_eff_cnfg. -/// Each memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: +/// @note F0RC04 - ODT and CKE Signals Driver Characteristics Control Word; Default value +/// - 0x05 (Moderate Drive). Values Range from 00 to 0F. Has to be picked up from +/// SPD byte 137, 2nd Nibble for ODT and CKE. creator: mss_eff_cnfg consumer: +/// mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dram_asr(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_rc04(const fapi2::Target& i_target, uint8_t& o_value) { - uint8_t l_value[2]; + uint8_t l_value[2][2]; + auto l_mca = i_target.getParent(); + auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_ASR, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC04, l_mcs, l_value) ); + o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_ASR: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC04: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DRAM_ASR getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) +/// @brief ATTR_EFF_DIMM_DDR4_RC04 getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] uint8_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Auto Self-Refresh. Used in various locations and is computed in mss_eff_cnfg. -/// Each memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: +/// @note F0RC04 - ODT and CKE Signals Driver Characteristics Control Word; Default value +/// - 0x05 (Moderate Drive). Values Range from 00 to 0F. Has to be picked up from +/// SPD byte 137, 2nd Nibble for ODT and CKE. creator: mss_eff_cnfg consumer: +/// mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dram_asr(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_rc04(const fapi2::Target& i_target, uint8_t* o_array) { - uint8_t l_value[2]; - auto l_mca = i_target.getParent(); + if (o_array == nullptr) + { + FAPI_ERR("nullptr passed to attribute accessor %s", __func__); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + } - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_ASR, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; + uint8_t l_value[2][2]; + auto l_mcs = i_target.getParent(); + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC04, l_mcs, l_value) ); + memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_ASR: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC04: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DRAM_ASR getter +/// @brief ATTR_EFF_DIMM_DDR4_RC04 getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) +/// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Auto Self-Refresh. Used in various locations and is computed in mss_eff_cnfg. -/// Each memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: +/// @note F0RC04 - ODT and CKE Signals Driver Characteristics Control Word; Default value +/// - 0x05 (Moderate Drive). Values Range from 00 to 0F. Has to be picked up from +/// SPD byte 137, 2nd Nibble for ODT and CKE. creator: mss_eff_cnfg consumer: +/// mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dram_asr(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc04(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -1588,81 +1511,92 @@ inline fapi2::ReturnCode eff_dram_asr(const fapi2::Target +/// @brief ATTR_EFF_DIMM_DDR4_RC05 getter +/// @param[in] const ref to the fapi2::Target /// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D) +/// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Self-Refresh Temperature Range. Used in various locations and is computed in -/// mss_eff_cnfg. Each memory channel will have a value. creator: mss_eff_cnfg -/// consumer: various firmware notes: +/// @note F0RC05 - Clock Driver Characteristics Control Word; Default value - 0x05 +/// (Moderate Drive). Values Range from 00 to 0F. Has to be picked up from SPD byte +/// 138, 2nd Nibble for CK. creator: mss_eff_cnfg consumer: mss_dram_init firmware +/// notes: /// none /// -inline fapi2::ReturnCode eff_dram_srt(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_rc05(const fapi2::Target& i_target, uint8_t& o_value) { - uint8_t l_value[2]; + uint8_t l_value[2][2]; + auto l_mca = i_target.getParent(); + auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_SRT, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC05, l_mcs, l_value) ); + o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_SRT: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC05: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DRAM_SRT getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) +/// @brief ATTR_EFF_DIMM_DDR4_RC05 getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] uint8_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Self-Refresh Temperature Range. Used in various locations and is computed in -/// mss_eff_cnfg. Each memory channel will have a value. creator: mss_eff_cnfg -/// consumer: various firmware notes: +/// @note F0RC05 - Clock Driver Characteristics Control Word; Default value - 0x05 +/// (Moderate Drive). Values Range from 00 to 0F. Has to be picked up from SPD byte +/// 138, 2nd Nibble for CK. creator: mss_eff_cnfg consumer: mss_dram_init firmware +/// notes: /// none /// -inline fapi2::ReturnCode eff_dram_srt(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_rc05(const fapi2::Target& i_target, uint8_t* o_array) { - uint8_t l_value[2]; - auto l_mca = i_target.getParent(); + if (o_array == nullptr) + { + FAPI_ERR("nullptr passed to attribute accessor %s", __func__); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + } - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_SRT, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; + uint8_t l_value[2][2]; + auto l_mcs = i_target.getParent(); + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC05, l_mcs, l_value) ); + memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_SRT: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC05: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DRAM_SRT getter +/// @brief ATTR_EFF_DIMM_DDR4_RC05 getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) +/// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Self-Refresh Temperature Range. Used in various locations and is computed in -/// mss_eff_cnfg. Each memory channel will have a value. creator: mss_eff_cnfg -/// consumer: various firmware notes: +/// @note F0RC05 - Clock Driver Characteristics Control Word; Default value - 0x05 +/// (Moderate Drive). Values Range from 00 to 0F. Has to be picked up from SPD byte +/// 138, 2nd Nibble for CK. creator: mss_eff_cnfg consumer: mss_dram_init firmware +/// notes: /// none /// -inline fapi2::ReturnCode eff_dram_srt(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc05(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -1670,81 +1604,89 @@ inline fapi2::ReturnCode eff_dram_srt(const fapi2::Target +/// @brief ATTR_EFF_DIMM_DDR4_RC06_07 getter +/// @param[in] const ref to the fapi2::Target /// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D) +/// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Multi Purpose Register Location. Used in various locations and is computed in -/// mss_eff_cnfg. Each memory channel will have a value. creator: mss_eff_cnfg -/// consumer: various firmware notes: +/// @note F0RC06: Command Space Control Word definition; Default value - 0xF0 (NOP). +/// Values Range from 00 to F0. F0RC07 not used. RDIMM creator: mss_eff_cnfg +/// consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_mpr_loc(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_rc06_07(const fapi2::Target& i_target, uint8_t& o_value) { - uint8_t l_value[2]; + uint8_t l_value[2][2]; + auto l_mca = i_target.getParent(); + auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_MPR_LOC, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC06_07, l_mcs, l_value) ); + o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_MPR_LOC: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC06_07: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_MPR_LOC getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) +/// @brief ATTR_EFF_DIMM_DDR4_RC06_07 getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] uint8_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Multi Purpose Register Location. Used in various locations and is computed in -/// mss_eff_cnfg. Each memory channel will have a value. creator: mss_eff_cnfg -/// consumer: various firmware notes: +/// @note F0RC06: Command Space Control Word definition; Default value - 0xF0 (NOP). +/// Values Range from 00 to F0. F0RC07 not used. RDIMM creator: mss_eff_cnfg +/// consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_mpr_loc(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_rc06_07(const fapi2::Target& i_target, uint8_t* o_array) { - uint8_t l_value[2]; - auto l_mca = i_target.getParent(); + if (o_array == nullptr) + { + FAPI_ERR("nullptr passed to attribute accessor %s", __func__); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + } - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_MPR_LOC, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; + uint8_t l_value[2][2]; + auto l_mcs = i_target.getParent(); + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC06_07, l_mcs, l_value) ); + memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_MPR_LOC: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC06_07: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_MPR_LOC getter +/// @brief ATTR_EFF_DIMM_DDR4_RC06_07 getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) +/// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Multi Purpose Register Location. Used in various locations and is computed in -/// mss_eff_cnfg. Each memory channel will have a value. creator: mss_eff_cnfg -/// consumer: various firmware notes: +/// @note F0RC06: Command Space Control Word definition; Default value - 0xF0 (NOP). +/// Values Range from 00 to F0. F0RC07 not used. RDIMM creator: mss_eff_cnfg +/// consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_mpr_loc(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc06_07(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -1752,81 +1694,92 @@ inline fapi2::ReturnCode eff_mpr_loc(const fapi2::Target return fapi2::FAPI2_RC_INVALID_PARAMETER; } - uint8_t l_value[2]; + uint8_t l_value[2][2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_MPR_LOC, i_target, l_value) ); - memcpy(o_array, &l_value, 2); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC06_07, i_target, l_value) ); + memcpy(o_array, &l_value, 4); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_MPR_LOC: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC06_07: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_MPR_MODE getter -/// @param[in] const ref to the fapi2::Target +/// @brief ATTR_EFF_DIMM_DDR4_RC08 getter +/// @param[in] const ref to the fapi2::Target /// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D) +/// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Multi Purpose Register Mode. Used in various locations and is computed in -/// mss_eff_cnfg. Each memory channel will have a value. creator: mss_eff_cnfg -/// consumer: various firmware notes: +/// @note F0RC06: Command Space Control Word definition; Default value - 0x03. Values +/// Range from 00 to 08 decimal. Check the stack height and calculate dynamically; +/// 00 = Stack height_8; 01 = Stack height_4; 02 = Stack height_2; creator: +/// mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_mpr_mode(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_rc08(const fapi2::Target& i_target, uint8_t& o_value) { - uint8_t l_value[2]; + uint8_t l_value[2][2]; + auto l_mca = i_target.getParent(); + auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_MPR_MODE, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC08, l_mcs, l_value) ); + o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_MPR_MODE: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC08: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_MPR_MODE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) +/// @brief ATTR_EFF_DIMM_DDR4_RC08 getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] uint8_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Multi Purpose Register Mode. Used in various locations and is computed in -/// mss_eff_cnfg. Each memory channel will have a value. creator: mss_eff_cnfg -/// consumer: various firmware notes: +/// @note F0RC06: Command Space Control Word definition; Default value - 0x03. Values +/// Range from 00 to 08 decimal. Check the stack height and calculate dynamically; +/// 00 = Stack height_8; 01 = Stack height_4; 02 = Stack height_2; creator: +/// mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_mpr_mode(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_rc08(const fapi2::Target& i_target, uint8_t* o_array) { - uint8_t l_value[2]; - auto l_mca = i_target.getParent(); + if (o_array == nullptr) + { + FAPI_ERR("nullptr passed to attribute accessor %s", __func__); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + } - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_MPR_MODE, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; + uint8_t l_value[2][2]; + auto l_mcs = i_target.getParent(); + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC08, l_mcs, l_value) ); + memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_MPR_MODE: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC08: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_MPR_MODE getter +/// @brief ATTR_EFF_DIMM_DDR4_RC08 getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) +/// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Multi Purpose Register Mode. Used in various locations and is computed in -/// mss_eff_cnfg. Each memory channel will have a value. creator: mss_eff_cnfg -/// consumer: various firmware notes: +/// @note F0RC06: Command Space Control Word definition; Default value - 0x03. Values +/// Range from 00 to 08 decimal. Check the stack height and calculate dynamically; +/// 00 = Stack height_8; 01 = Stack height_4; 02 = Stack height_2; creator: +/// mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_mpr_mode(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc08(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -1834,67 +1787,59 @@ inline fapi2::ReturnCode eff_mpr_mode(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC00: Global Features Control Word.For normal operation, output inversion is -/// always enabled. For DIMM vendor test purpose, output inversion can be disabled. -/// When disabled, register tPDM is not guaranteed to be met. NOTE: Default value - -/// 0x00. Values Range from 0-8. 00 - Normal Operation; 01 - Output Inversion -/// Disabled; 02 - Weak Drive Enabled; 04 - A outputs disabled; 08 - B outputs -/// disabled; So on. No need to calculate; User can override with desired +/// @note F0RC06: Command Space Control Word definition; Default value - 0xF0 (NOP). +/// Values Range from 00 to F0. No need to calculate; User can override with desired /// experimental value. creator: mss_eff_cnfg consumer: mss_dram_init firmware /// notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc00(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_rc09(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC00, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC09, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC00: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC09: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC00 getter +/// @brief ATTR_EFF_DIMM_DDR4_RC09 getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC00: Global Features Control Word.For normal operation, output inversion is -/// always enabled. For DIMM vendor test purpose, output inversion can be disabled. -/// When disabled, register tPDM is not guaranteed to be met. NOTE: Default value - -/// 0x00. Values Range from 0-8. 00 - Normal Operation; 01 - Output Inversion -/// Disabled; 02 - Weak Drive Enabled; 04 - A outputs disabled; 08 - B outputs -/// disabled; So on. No need to calculate; User can override with desired +/// @note F0RC06: Command Space Control Word definition; Default value - 0xF0 (NOP). +/// Values Range from 00 to F0. No need to calculate; User can override with desired /// experimental value. creator: mss_eff_cnfg consumer: mss_dram_init firmware /// notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc00(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc09(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -1905,33 +1850,29 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc00(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC00, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC09, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC00: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC09: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC00 getter +/// @brief ATTR_EFF_DIMM_DDR4_RC09 getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC00: Global Features Control Word.For normal operation, output inversion is -/// always enabled. For DIMM vendor test purpose, output inversion can be disabled. -/// When disabled, register tPDM is not guaranteed to be met. NOTE: Default value - -/// 0x00. Values Range from 0-8. 00 - Normal Operation; 01 - Output Inversion -/// Disabled; 02 - Weak Drive Enabled; 04 - A outputs disabled; 08 - B outputs -/// disabled; So on. No need to calculate; User can override with desired +/// @note F0RC06: Command Space Control Word definition; Default value - 0xF0 (NOP). +/// Values Range from 00 to F0. No need to calculate; User can override with desired /// experimental value. creator: mss_eff_cnfg consumer: mss_dram_init firmware /// notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc00(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc09(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -1941,63 +1882,55 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc00(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC01 - Clock Driver Enable Control Word.1. Output clocks may be individually -/// turned on or off to conserve power. The system must read the module SPD to -/// determine which clock outputs are used by the module. The PLL remains locked on -/// CK_t/CK_c unless the system stops the clock inputs to the DDR4RCD02 to enter the -/// lowest power mode. Default value - 0x00. Values Range from 0-8. No need to -/// calculate; User can override with desired experimental value. creator: -/// mss_eff_cnfg consumer: mss_dram_init firmware notes: +/// @note RDIMM Operating Speed; Read from ATTR_MSS_FREQ; Default value - 00. Values Range +/// from 00 to 09. No need to calculate; User can override with desired experimental +/// value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc01(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_rc0a(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC01, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC0A, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC01: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC0A: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC01 getter +/// @brief ATTR_EFF_DIMM_DDR4_RC0A getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC01 - Clock Driver Enable Control Word.1. Output clocks may be individually -/// turned on or off to conserve power. The system must read the module SPD to -/// determine which clock outputs are used by the module. The PLL remains locked on -/// CK_t/CK_c unless the system stops the clock inputs to the DDR4RCD02 to enter the -/// lowest power mode. Default value - 0x00. Values Range from 0-8. No need to -/// calculate; User can override with desired experimental value. creator: -/// mss_eff_cnfg consumer: mss_dram_init firmware notes: +/// @note RDIMM Operating Speed; Read from ATTR_MSS_FREQ; Default value - 00. Values Range +/// from 00 to 09. No need to calculate; User can override with desired experimental +/// value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc01(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc0a(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -2008,32 +1941,28 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc01(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC01, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC0A, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC01: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC0A: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC01 getter +/// @brief ATTR_EFF_DIMM_DDR4_RC0A getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC01 - Clock Driver Enable Control Word.1. Output clocks may be individually -/// turned on or off to conserve power. The system must read the module SPD to -/// determine which clock outputs are used by the module. The PLL remains locked on -/// CK_t/CK_c unless the system stops the clock inputs to the DDR4RCD02 to enter the -/// lowest power mode. Default value - 0x00. Values Range from 0-8. No need to -/// calculate; User can override with desired experimental value. creator: -/// mss_eff_cnfg consumer: mss_dram_init firmware notes: +/// @note RDIMM Operating Speed; Read from ATTR_MSS_FREQ; Default value - 00. Values Range +/// from 00 to 09. No need to calculate; User can override with desired experimental +/// value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc01(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc0a(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -2043,55 +1972,57 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc01(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC02: Timing and IBT Control Word; Default value - 0x00. Values Range from -/// 0-8. No need to calculate; User can override with desired experimental value. -/// creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: +/// @note Operating Voltage VDD and VrefCA Source Control Word; Read from +/// ATTR_MSS_VOLT_VDDR. Default value - 14. Values Range from 00 to 15 decimal. No +/// need to calculate; User can override with desired experimental value. creator: +/// mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc02(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_rc0b(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC02, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC0B, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC02: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC0B: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC02 getter +/// @brief ATTR_EFF_DIMM_DDR4_RC0B getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC02: Timing and IBT Control Word; Default value - 0x00. Values Range from -/// 0-8. No need to calculate; User can override with desired experimental value. -/// creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: +/// @note Operating Voltage VDD and VrefCA Source Control Word; Read from +/// ATTR_MSS_VOLT_VDDR. Default value - 14. Values Range from 00 to 15 decimal. No +/// need to calculate; User can override with desired experimental value. creator: +/// mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc02(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc0b(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -2102,28 +2033,29 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc02(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC02, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC0B, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC02: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC0B: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC02 getter +/// @brief ATTR_EFF_DIMM_DDR4_RC0B getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC02: Timing and IBT Control Word; Default value - 0x00. Values Range from -/// 0-8. No need to calculate; User can override with desired experimental value. -/// creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: +/// @note Operating Voltage VDD and VrefCA Source Control Word; Read from +/// ATTR_MSS_VOLT_VDDR. Default value - 14. Values Range from 00 to 15 decimal. No +/// need to calculate; User can override with desired experimental value. creator: +/// mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc02(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc0b(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -2133,57 +2065,55 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc02(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC03 - CA and CS Signals Driver Characteristics Control Word; Default value - -/// 0x05 (Moderate Drive). Values Range from 00 to 0F. Has to be picked up from SPD -/// byte 137, 1st Nibble for CS and CA. creator: mss_eff_cnfg consumer: -/// mss_dram_init firmware notes: +/// @note F0RC0C - Training Control Word; Default value - 00. Values Range from 00 to 07 +/// decimal.No need to calculate; User can override with desired experimental value. +/// creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc03(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_rc0c(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC03, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC0C, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC03: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC0C: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC03 getter +/// @brief ATTR_EFF_DIMM_DDR4_RC0C getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC03 - CA and CS Signals Driver Characteristics Control Word; Default value - -/// 0x05 (Moderate Drive). Values Range from 00 to 0F. Has to be picked up from SPD -/// byte 137, 1st Nibble for CS and CA. creator: mss_eff_cnfg consumer: -/// mss_dram_init firmware notes: +/// @note F0RC0C - Training Control Word; Default value - 00. Values Range from 00 to 07 +/// decimal.No need to calculate; User can override with desired experimental value. +/// creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc03(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc0c(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -2194,29 +2124,28 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc03(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC03, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC0C, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC03: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC0C: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC03 getter +/// @brief ATTR_EFF_DIMM_DDR4_RC0C getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC03 - CA and CS Signals Driver Characteristics Control Word; Default value - -/// 0x05 (Moderate Drive). Values Range from 00 to 0F. Has to be picked up from SPD -/// byte 137, 1st Nibble for CS and CA. creator: mss_eff_cnfg consumer: -/// mss_dram_init firmware notes: +/// @note F0RC0C - Training Control Word; Default value - 00. Values Range from 00 to 07 +/// decimal.No need to calculate; User can override with desired experimental value. +/// creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc03(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc0c(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -2226,57 +2155,57 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc03(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC04 - ODT and CKE Signals Driver Characteristics Control Word; Default value -/// - 0x05 (Moderate Drive). Values Range from 00 to 0F. Has to be picked up from -/// SPD byte 137, 2nd Nibble for ODT and CKE. creator: mss_eff_cnfg consumer: -/// mss_dram_init firmware notes: +/// @note F0RC0D - DIMM Configuration Control Word; Default value - 0B. Values Range from +/// 00 to 15 decimal. Dynamically calculated using 4 bits[0:3] Bit 0 - Address +/// Mirroring; Bit 1 - Rdimm(1)/Lrdimm (0) ; Bit 2 - N/A ; Bit 3 - CS Mode (Direct / +/// Quad CS mode etc); creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc04(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_rc0d(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC04, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC0D, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC04: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC0D: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC04 getter +/// @brief ATTR_EFF_DIMM_DDR4_RC0D getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC04 - ODT and CKE Signals Driver Characteristics Control Word; Default value -/// - 0x05 (Moderate Drive). Values Range from 00 to 0F. Has to be picked up from -/// SPD byte 137, 2nd Nibble for ODT and CKE. creator: mss_eff_cnfg consumer: -/// mss_dram_init firmware notes: +/// @note F0RC0D - DIMM Configuration Control Word; Default value - 0B. Values Range from +/// 00 to 15 decimal. Dynamically calculated using 4 bits[0:3] Bit 0 - Address +/// Mirroring; Bit 1 - Rdimm(1)/Lrdimm (0) ; Bit 2 - N/A ; Bit 3 - CS Mode (Direct / +/// Quad CS mode etc); creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc04(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc0d(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -2287,29 +2216,29 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc04(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC04, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC0D, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC04: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC0D: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC04 getter +/// @brief ATTR_EFF_DIMM_DDR4_RC0D getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC04 - ODT and CKE Signals Driver Characteristics Control Word; Default value -/// - 0x05 (Moderate Drive). Values Range from 00 to 0F. Has to be picked up from -/// SPD byte 137, 2nd Nibble for ODT and CKE. creator: mss_eff_cnfg consumer: -/// mss_dram_init firmware notes: +/// @note F0RC0D - DIMM Configuration Control Word; Default value - 0B. Values Range from +/// 00 to 15 decimal. Dynamically calculated using 4 bits[0:3] Bit 0 - Address +/// Mirroring; Bit 1 - Rdimm(1)/Lrdimm (0) ; Bit 2 - N/A ; Bit 3 - CS Mode (Direct / +/// Quad CS mode etc); creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc04(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc0d(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -2319,57 +2248,55 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc04(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC05 - Clock Driver Characteristics Control Word; Default value - 0x05 -/// (Moderate Drive). Values Range from 00 to 0F. Has to be picked up from SPD byte -/// 138, 2nd Nibble for CK. creator: mss_eff_cnfg consumer: mss_dram_init firmware -/// notes: +/// @note F0RC0E - Parity Control Word; Default value - 00. Check from ATTR_EFF_CA_PARITY +/// and assign; Values Range from 00 to 0F. creator: mss_eff_cnfg consumer: +/// mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc05(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_rc0e(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC05, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC0E, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC05: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC0E: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC05 getter +/// @brief ATTR_EFF_DIMM_DDR4_RC0E getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC05 - Clock Driver Characteristics Control Word; Default value - 0x05 -/// (Moderate Drive). Values Range from 00 to 0F. Has to be picked up from SPD byte -/// 138, 2nd Nibble for CK. creator: mss_eff_cnfg consumer: mss_dram_init firmware -/// notes: +/// @note F0RC0E - Parity Control Word; Default value - 00. Check from ATTR_EFF_CA_PARITY +/// and assign; Values Range from 00 to 0F. creator: mss_eff_cnfg consumer: +/// mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc05(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc0e(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -2380,29 +2307,28 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc05(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC05, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC0E, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC05: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC0E: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC05 getter +/// @brief ATTR_EFF_DIMM_DDR4_RC0E getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC05 - Clock Driver Characteristics Control Word; Default value - 0x05 -/// (Moderate Drive). Values Range from 00 to 0F. Has to be picked up from SPD byte -/// 138, 2nd Nibble for CK. creator: mss_eff_cnfg consumer: mss_dram_init firmware -/// notes: +/// @note F0RC0E - Parity Control Word; Default value - 00. Check from ATTR_EFF_CA_PARITY +/// and assign; Values Range from 00 to 0F. creator: mss_eff_cnfg consumer: +/// mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc05(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc0e(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -2412,55 +2338,55 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc05(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC06: Command Space Control Word definition; Default value - 0xF0 (NOP). -/// Values Range from 00 to F0. F0RC07 not used. RDIMM creator: mss_eff_cnfg -/// consumer: mss_dram_init firmware notes: +/// @note F0RC0F - Command Latency Adder Control Word; Default value - 04. Values Range +/// from 00 to 04. No need to calculate; User can override with desired experimental +/// value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc06_07(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_rc0f(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC06_07, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC0F, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC06_07: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC0F: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC06_07 getter +/// @brief ATTR_EFF_DIMM_DDR4_RC0F getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC06: Command Space Control Word definition; Default value - 0xF0 (NOP). -/// Values Range from 00 to F0. F0RC07 not used. RDIMM creator: mss_eff_cnfg -/// consumer: mss_dram_init firmware notes: +/// @note F0RC0F - Command Latency Adder Control Word; Default value - 04. Values Range +/// from 00 to 04. No need to calculate; User can override with desired experimental +/// value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc06_07(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc0f(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -2471,28 +2397,28 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc06_07(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC06_07, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC0F, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC06_07: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC0F: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC06_07 getter +/// @brief ATTR_EFF_DIMM_DDR4_RC0F getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC06: Command Space Control Word definition; Default value - 0xF0 (NOP). -/// Values Range from 00 to F0. F0RC07 not used. RDIMM creator: mss_eff_cnfg -/// consumer: mss_dram_init firmware notes: +/// @note F0RC0F - Command Latency Adder Control Word; Default value - 04. Values Range +/// from 00 to 04. No need to calculate; User can override with desired experimental +/// value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc06_07(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc0f(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -2502,57 +2428,55 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc06_07(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC06: Command Space Control Word definition; Default value - 0x03. Values -/// Range from 00 to 08 decimal. Check the stack height and calculate dynamically; -/// 00 = Stack height_8; 01 = Stack height_4; 02 = Stack height_2; creator: -/// mss_eff_cnfg consumer: mss_dram_init firmware notes: +/// @note F0RC1x - Internal VrefCA Control Word; Default value - 00. Values Range from 00 +/// to 3F.No need to calculate; User can override with desired experimental value. +/// creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc08(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_rc_1x(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC08, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC_1x, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC08: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC_1x: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC08 getter +/// @brief ATTR_EFF_DIMM_DDR4_RC_1x getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC06: Command Space Control Word definition; Default value - 0x03. Values -/// Range from 00 to 08 decimal. Check the stack height and calculate dynamically; -/// 00 = Stack height_8; 01 = Stack height_4; 02 = Stack height_2; creator: -/// mss_eff_cnfg consumer: mss_dram_init firmware notes: +/// @note F0RC1x - Internal VrefCA Control Word; Default value - 00. Values Range from 00 +/// to 3F.No need to calculate; User can override with desired experimental value. +/// creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc08(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc_1x(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -2563,29 +2487,28 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc08(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC08, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC_1x, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC08: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC_1x: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC08 getter +/// @brief ATTR_EFF_DIMM_DDR4_RC_1x getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC06: Command Space Control Word definition; Default value - 0x03. Values -/// Range from 00 to 08 decimal. Check the stack height and calculate dynamically; -/// 00 = Stack height_8; 01 = Stack height_4; 02 = Stack height_2; creator: -/// mss_eff_cnfg consumer: mss_dram_init firmware notes: +/// @note F0RC1x - Internal VrefCA Control Word; Default value - 00. Values Range from 00 +/// to 3F.No need to calculate; User can override with desired experimental value. +/// creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc08(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc_1x(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -2595,57 +2518,55 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc08(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC06: Command Space Control Word definition; Default value - 0xF0 (NOP). -/// Values Range from 00 to F0. No need to calculate; User can override with desired -/// experimental value. creator: mss_eff_cnfg consumer: mss_dram_init firmware -/// notes: +/// @note F0RC2x: I2C Bus Control Word; Default value - 00. Values Range from 00 to FF.No +/// need to calculate; User can override with desired experimental value. creator: +/// mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc09(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_rc_2x(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC09, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC_2x, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC09: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC_2x: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC09 getter +/// @brief ATTR_EFF_DIMM_DDR4_RC_2x getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC06: Command Space Control Word definition; Default value - 0xF0 (NOP). -/// Values Range from 00 to F0. No need to calculate; User can override with desired -/// experimental value. creator: mss_eff_cnfg consumer: mss_dram_init firmware -/// notes: +/// @note F0RC2x: I2C Bus Control Word; Default value - 00. Values Range from 00 to FF.No +/// need to calculate; User can override with desired experimental value. creator: +/// mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc09(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc_2x(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -2656,29 +2577,28 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc09(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC09, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC_2x, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC09: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC_2x: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC09 getter +/// @brief ATTR_EFF_DIMM_DDR4_RC_2x getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC06: Command Space Control Word definition; Default value - 0xF0 (NOP). -/// Values Range from 00 to F0. No need to calculate; User can override with desired -/// experimental value. creator: mss_eff_cnfg consumer: mss_dram_init firmware -/// notes: +/// @note F0RC2x: I2C Bus Control Word; Default value - 00. Values Range from 00 to FF.No +/// need to calculate; User can override with desired experimental value. creator: +/// mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc09(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc_2x(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -2688,55 +2608,55 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc09(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note RDIMM Operating Speed; Read from ATTR_MSS_FREQ; Default value - 00. Values Range -/// from 00 to 09. No need to calculate; User can override with desired experimental -/// value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: +/// @note F0RC3x - Fine Granularity RDIMM Operating Speed; Default value = (Operating Freq +/// - 1250)/20. Values Range from 00 to 61 Hex. creator: mss_eff_cnfg consumer: +/// mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc0a(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_rc_3x(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC0A, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC_3x, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC0A: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC_3x: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC0A getter +/// @brief ATTR_EFF_DIMM_DDR4_RC_3x getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note RDIMM Operating Speed; Read from ATTR_MSS_FREQ; Default value - 00. Values Range -/// from 00 to 09. No need to calculate; User can override with desired experimental -/// value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: +/// @note F0RC3x - Fine Granularity RDIMM Operating Speed; Default value = (Operating Freq +/// - 1250)/20. Values Range from 00 to 61 Hex. creator: mss_eff_cnfg consumer: +/// mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc0a(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc_3x(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -2747,28 +2667,28 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc0a(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC0A, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC_3x, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC0A: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC_3x: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC0A getter +/// @brief ATTR_EFF_DIMM_DDR4_RC_3x getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note RDIMM Operating Speed; Read from ATTR_MSS_FREQ; Default value - 00. Values Range -/// from 00 to 09. No need to calculate; User can override with desired experimental -/// value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: +/// @note F0RC3x - Fine Granularity RDIMM Operating Speed; Default value = (Operating Freq +/// - 1250)/20. Values Range from 00 to 61 Hex. creator: mss_eff_cnfg consumer: +/// mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc0a(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc_3x(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -2778,57 +2698,55 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc0a(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Operating Voltage VDD and VrefCA Source Control Word; Read from -/// ATTR_MSS_VOLT_VDDR. Default value - 14. Values Range from 00 to 15 decimal. No -/// need to calculate; User can override with desired experimental value. creator: -/// mss_eff_cnfg consumer: mss_dram_init firmware notes: +/// @note F0RC4x: CW Source Selection Control Word; Default value - 00. Values Range from +/// 00 to FF. No need to calculate; User can override with desired experimental +/// value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc0b(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_rc_4x(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC0B, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC_4x, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC0B: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC_4x: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC0B getter +/// @brief ATTR_EFF_DIMM_DDR4_RC_4x getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Operating Voltage VDD and VrefCA Source Control Word; Read from -/// ATTR_MSS_VOLT_VDDR. Default value - 14. Values Range from 00 to 15 decimal. No -/// need to calculate; User can override with desired experimental value. creator: -/// mss_eff_cnfg consumer: mss_dram_init firmware notes: +/// @note F0RC4x: CW Source Selection Control Word; Default value - 00. Values Range from +/// 00 to FF. No need to calculate; User can override with desired experimental +/// value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc0b(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc_4x(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -2839,29 +2757,28 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc0b(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC0B, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC_4x, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC0B: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC_4x: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC0B getter +/// @brief ATTR_EFF_DIMM_DDR4_RC_4x getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Operating Voltage VDD and VrefCA Source Control Word; Read from -/// ATTR_MSS_VOLT_VDDR. Default value - 14. Values Range from 00 to 15 decimal. No -/// need to calculate; User can override with desired experimental value. creator: -/// mss_eff_cnfg consumer: mss_dram_init firmware notes: +/// @note F0RC4x: CW Source Selection Control Word; Default value - 00. Values Range from +/// 00 to FF. No need to calculate; User can override with desired experimental +/// value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc0b(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc_4x(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -2871,55 +2788,57 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc0b(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC0C - Training Control Word; Default value - 00. Values Range from 00 to 07 -/// decimal.No need to calculate; User can override with desired experimental value. -/// creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: +/// @note F0RC5x: CW Destination Selection and Write/Read Additional QxODT[1:0] Signal +/// High; Default value - 00. Values Range from 00 to FF. No need to calculate; User +/// can override with desired experimental value. creator: mss_eff_cnfg consumer: +/// mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc0c(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_rc_5x(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC0C, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC_5x, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC0C: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC_5x: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC0C getter +/// @brief ATTR_EFF_DIMM_DDR4_RC_5x getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC0C - Training Control Word; Default value - 00. Values Range from 00 to 07 -/// decimal.No need to calculate; User can override with desired experimental value. -/// creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: +/// @note F0RC5x: CW Destination Selection and Write/Read Additional QxODT[1:0] Signal +/// High; Default value - 00. Values Range from 00 to FF. No need to calculate; User +/// can override with desired experimental value. creator: mss_eff_cnfg consumer: +/// mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc0c(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc_5x(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -2930,28 +2849,29 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc0c(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC0C, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC_5x, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC0C: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC_5x: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC0C getter +/// @brief ATTR_EFF_DIMM_DDR4_RC_5x getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC0C - Training Control Word; Default value - 00. Values Range from 00 to 07 -/// decimal.No need to calculate; User can override with desired experimental value. -/// creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: +/// @note F0RC5x: CW Destination Selection and Write/Read Additional QxODT[1:0] Signal +/// High; Default value - 00. Values Range from 00 to FF. No need to calculate; User +/// can override with desired experimental value. creator: mss_eff_cnfg consumer: +/// mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc0c(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc_5x(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -2961,57 +2881,55 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc0c(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC0D - DIMM Configuration Control Word; Default value - 0B. Values Range from -/// 00 to 15 decimal. Dynamically calculated using 4 bits[0:3] Bit 0 - Address -/// Mirroring; Bit 1 - Rdimm(1)/Lrdimm (0) ; Bit 2 - N/A ; Bit 3 - CS Mode (Direct / -/// Quad CS mode etc); creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: +/// @note F0RC6x: CW Data Control Word; Default value - 00. Values Range from 00 to FF.No +/// need to calculate; User can override with desired experimental value. creator: +/// mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc0d(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_rc_6x(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC0D, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC_6x, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC0D: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC_6x: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC0D getter +/// @brief ATTR_EFF_DIMM_DDR4_RC_6x getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC0D - DIMM Configuration Control Word; Default value - 0B. Values Range from -/// 00 to 15 decimal. Dynamically calculated using 4 bits[0:3] Bit 0 - Address -/// Mirroring; Bit 1 - Rdimm(1)/Lrdimm (0) ; Bit 2 - N/A ; Bit 3 - CS Mode (Direct / -/// Quad CS mode etc); creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: +/// @note F0RC6x: CW Data Control Word; Default value - 00. Values Range from 00 to FF.No +/// need to calculate; User can override with desired experimental value. creator: +/// mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc0d(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc_6x(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -3022,29 +2940,28 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc0d(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC0D, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC_6x, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC0D: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC_6x: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC0D getter +/// @brief ATTR_EFF_DIMM_DDR4_RC_6x getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC0D - DIMM Configuration Control Word; Default value - 0B. Values Range from -/// 00 to 15 decimal. Dynamically calculated using 4 bits[0:3] Bit 0 - Address -/// Mirroring; Bit 1 - Rdimm(1)/Lrdimm (0) ; Bit 2 - N/A ; Bit 3 - CS Mode (Direct / -/// Quad CS mode etc); creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: +/// @note F0RC6x: CW Data Control Word; Default value - 00. Values Range from 00 to FF.No +/// need to calculate; User can override with desired experimental value. creator: +/// mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc0d(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc_6x(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -3054,55 +2971,55 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc0d(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC0E - Parity Control Word; Default value - 00. Check from ATTR_EFF_CA_PARITY -/// and assign; Values Range from 00 to 0F. creator: mss_eff_cnfg consumer: -/// mss_dram_init firmware notes: +/// @note F0RC7x: IBT Control Word; Default value - 00. Values Range from 00 to FF.No need +/// to calculate; User can override with desired experimental value. creator: +/// mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc0e(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_rc_7x(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC0E, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC_7x, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC0E: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC_7x: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC0E getter +/// @brief ATTR_EFF_DIMM_DDR4_RC_7x getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC0E - Parity Control Word; Default value - 00. Check from ATTR_EFF_CA_PARITY -/// and assign; Values Range from 00 to 0F. creator: mss_eff_cnfg consumer: -/// mss_dram_init firmware notes: +/// @note F0RC7x: IBT Control Word; Default value - 00. Values Range from 00 to FF.No need +/// to calculate; User can override with desired experimental value. creator: +/// mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc0e(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc_7x(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -3113,28 +3030,28 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc0e(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC0E, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC_7x, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC0E: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC_7x: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC0E getter +/// @brief ATTR_EFF_DIMM_DDR4_RC_7x getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC0E - Parity Control Word; Default value - 00. Check from ATTR_EFF_CA_PARITY -/// and assign; Values Range from 00 to 0F. creator: mss_eff_cnfg consumer: -/// mss_dram_init firmware notes: +/// @note F0RC7x: IBT Control Word; Default value - 00. Values Range from 00 to FF.No need +/// to calculate; User can override with desired experimental value. creator: +/// mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc0e(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc_7x(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -3144,55 +3061,57 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc0e(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC0F - Command Latency Adder Control Word; Default value - 04. Values Range -/// from 00 to 04. No need to calculate; User can override with desired experimental -/// value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: +/// @note F0RC8x: ODT Input Buffer/IBT, QxODT Output Buffer and Timing Control Word; +/// Default value - 00. Values Range from 00 to FF. No need to calculate; User can +/// override with desired experimental value. creator: mss_eff_cnfg consumer: +/// mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc0f(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_rc_8x(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC0F, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC_8x, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC0F: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC_8x: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC0F getter +/// @brief ATTR_EFF_DIMM_DDR4_RC_8x getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC0F - Command Latency Adder Control Word; Default value - 04. Values Range -/// from 00 to 04. No need to calculate; User can override with desired experimental -/// value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: +/// @note F0RC8x: ODT Input Buffer/IBT, QxODT Output Buffer and Timing Control Word; +/// Default value - 00. Values Range from 00 to FF. No need to calculate; User can +/// override with desired experimental value. creator: mss_eff_cnfg consumer: +/// mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc0f(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc_8x(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -3203,28 +3122,29 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc0f(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC0F, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC_8x, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC0F: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC_8x: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC0F getter +/// @brief ATTR_EFF_DIMM_DDR4_RC_8x getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC0F - Command Latency Adder Control Word; Default value - 04. Values Range -/// from 00 to 04. No need to calculate; User can override with desired experimental -/// value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: +/// @note F0RC8x: ODT Input Buffer/IBT, QxODT Output Buffer and Timing Control Word; +/// Default value - 00. Values Range from 00 to FF. No need to calculate; User can +/// override with desired experimental value. creator: mss_eff_cnfg consumer: +/// mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc0f(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc_8x(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -3234,55 +3154,55 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc0f(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC1x - Internal VrefCA Control Word; Default value - 00. Values Range from 00 -/// to 3F.No need to calculate; User can override with desired experimental value. -/// creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: +/// @note F0RC9x1: QxODT[1:0] Write Pattern Control Word; Default value - 00. Values Range +/// from 00 to FF.No need to calculate; User can override with desired experimental +/// value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc_1x(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_rc_9x(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC_1x, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC_9x, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC_1x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC_9x: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC_1x getter +/// @brief ATTR_EFF_DIMM_DDR4_RC_9x getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC1x - Internal VrefCA Control Word; Default value - 00. Values Range from 00 -/// to 3F.No need to calculate; User can override with desired experimental value. -/// creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: +/// @note F0RC9x1: QxODT[1:0] Write Pattern Control Word; Default value - 00. Values Range +/// from 00 to FF.No need to calculate; User can override with desired experimental +/// value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc_1x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc_9x(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -3293,28 +3213,28 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc_1x(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC_1x, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC_9x, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC_1x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC_9x: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC_1x getter +/// @brief ATTR_EFF_DIMM_DDR4_RC_9x getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC1x - Internal VrefCA Control Word; Default value - 00. Values Range from 00 -/// to 3F.No need to calculate; User can override with desired experimental value. -/// creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: +/// @note F0RC9x1: QxODT[1:0] Write Pattern Control Word; Default value - 00. Values Range +/// from 00 to FF.No need to calculate; User can override with desired experimental +/// value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc_1x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc_9x(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -3324,55 +3244,55 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc_1x(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC2x: I2C Bus Control Word; Default value - 00. Values Range from 00 to FF.No -/// need to calculate; User can override with desired experimental value. creator: -/// mss_eff_cnfg consumer: mss_dram_init firmware notes: +/// @note F0RCAx1: QxODT[1:0] Read Pattern Control Word; Default value - 00. Values Range +/// from 00 to FF. No need to calculate; User can override with desired experimental +/// value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc_2x(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_rc_ax(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC_2x, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC_Ax, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC_2x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC_Ax: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC_2x getter +/// @brief ATTR_EFF_DIMM_DDR4_RC_Ax getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC2x: I2C Bus Control Word; Default value - 00. Values Range from 00 to FF.No -/// need to calculate; User can override with desired experimental value. creator: -/// mss_eff_cnfg consumer: mss_dram_init firmware notes: +/// @note F0RCAx1: QxODT[1:0] Read Pattern Control Word; Default value - 00. Values Range +/// from 00 to FF. No need to calculate; User can override with desired experimental +/// value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc_2x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc_ax(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -3383,28 +3303,28 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc_2x(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC_2x, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC_Ax, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC_2x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC_Ax: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC_2x getter +/// @brief ATTR_EFF_DIMM_DDR4_RC_Ax getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC2x: I2C Bus Control Word; Default value - 00. Values Range from 00 to FF.No -/// need to calculate; User can override with desired experimental value. creator: -/// mss_eff_cnfg consumer: mss_dram_init firmware notes: +/// @note F0RCAx1: QxODT[1:0] Read Pattern Control Word; Default value - 00. Values Range +/// from 00 to FF. No need to calculate; User can override with desired experimental +/// value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc_2x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc_ax(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -3414,55 +3334,55 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc_2x(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC3x - Fine Granularity RDIMM Operating Speed; Default value = (Operating Freq -/// - 1250)/20. Values Range from 00 to 61 Hex. creator: mss_eff_cnfg consumer: -/// mss_dram_init firmware notes: +/// @note F0RCBx: IBT and MRS Snoop Control Word; Default value - 07. Values Range from 00 +/// to FF. No need to calculate; User can override with desired experimental value. +/// creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc_3x(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_rc_bx(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC_3x, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC_Bx, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC_3x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC_Bx: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC_3x getter +/// @brief ATTR_EFF_DIMM_DDR4_RC_Bx getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC3x - Fine Granularity RDIMM Operating Speed; Default value = (Operating Freq -/// - 1250)/20. Values Range from 00 to 61 Hex. creator: mss_eff_cnfg consumer: -/// mss_dram_init firmware notes: +/// @note F0RCBx: IBT and MRS Snoop Control Word; Default value - 07. Values Range from 00 +/// to FF. No need to calculate; User can override with desired experimental value. +/// creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc_3x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc_bx(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -3473,28 +3393,28 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc_3x(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC_3x, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC_Bx, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC_3x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC_Bx: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC_3x getter +/// @brief ATTR_EFF_DIMM_DDR4_RC_Bx getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC3x - Fine Granularity RDIMM Operating Speed; Default value = (Operating Freq -/// - 1250)/20. Values Range from 00 to 61 Hex. creator: mss_eff_cnfg consumer: -/// mss_dram_init firmware notes: +/// @note F0RCBx: IBT and MRS Snoop Control Word; Default value - 07. Values Range from 00 +/// to FF. No need to calculate; User can override with desired experimental value. +/// creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc_3x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_rc_bx(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -3504,55 +3424,57 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc_3x(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC4x: CW Source Selection Control Word; Default value - 00. Values Range from -/// 00 to FF. No need to calculate; User can override with desired experimental -/// value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: +/// @note RCD Mirroring. Used in mss_dram_init and is computed in mss_eff_cnfg. Each +/// memory channel will have a value. creator: mss_eff_cnfg consumer: mss_dram_init +/// firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc_4x(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_rcd_mirror_mode(const fapi2::Target& i_target, + uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC_4x, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_RCD_MIRROR_MODE, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC_4x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_RCD_MIRROR_MODE: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC_4x getter +/// @brief ATTR_EFF_DIMM_RCD_MIRROR_MODE getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC4x: CW Source Selection Control Word; Default value - 00. Values Range from -/// 00 to FF. No need to calculate; User can override with desired experimental -/// value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: +/// @note RCD Mirroring. Used in mss_dram_init and is computed in mss_eff_cnfg. Each +/// memory channel will have a value. creator: mss_eff_cnfg consumer: mss_dram_init +/// firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc_4x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_rcd_mirror_mode(const fapi2::Target& i_target, + uint8_t* o_array) { if (o_array == nullptr) { @@ -3563,28 +3485,29 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc_4x(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC_4x, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_RCD_MIRROR_MODE, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC_4x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_RCD_MIRROR_MODE: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC_4x getter +/// @brief ATTR_EFF_DIMM_RCD_MIRROR_MODE getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC4x: CW Source Selection Control Word; Default value - 00. Values Range from -/// 00 to FF. No need to calculate; User can override with desired experimental -/// value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: +/// @note RCD Mirroring. Used in mss_dram_init and is computed in mss_eff_cnfg. Each +/// memory channel will have a value. creator: mss_eff_cnfg consumer: mss_dram_init +/// firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc_4x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_rcd_mirror_mode(const fapi2::Target& i_target, + uint8_t* o_array) { if (o_array == nullptr) { @@ -3594,90 +3517,73 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc_4x(const fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) +/// @brief ATTR_EFF_MEMCAL_INTERVAL getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint32_t +/// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC5x: CW Destination Selection and Write/Read Additional QxODT[1:0] Signal -/// High; Default value - 00. Values Range from 00 to FF. No need to calculate; User -/// can override with desired experimental value. creator: mss_eff_cnfg consumer: -/// mss_dram_init firmware notes: -/// none +/// @note Specifies the memcal interval in +/// clocks. /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc_5x(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_memcal_interval(const fapi2::Target& i_target, uint32_t& o_value) { - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); + uint32_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC_5x, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_MEMCAL_INTERVAL, i_target.getParent(), l_value) ); + o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC_5x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_MEMCAL_INTERVAL: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC_5x getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) +/// @brief ATTR_EFF_MEMCAL_INTERVAL getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint32_t +/// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC5x: CW Destination Selection and Write/Read Additional QxODT[1:0] Signal -/// High; Default value - 00. Values Range from 00 to FF. No need to calculate; User -/// can override with desired experimental value. creator: mss_eff_cnfg consumer: -/// mss_dram_init firmware notes: -/// none +/// @note Specifies the memcal interval in +/// clocks. /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc_5x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_memcal_interval(const fapi2::Target& i_target, uint32_t& o_value) { - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); + uint32_t l_value[2]; + auto l_mca = i_target.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC_5x, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_MEMCAL_INTERVAL, l_mca.getParent(), l_value) ); + o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC_5x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_MEMCAL_INTERVAL: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC_5x getter +/// @brief ATTR_EFF_MEMCAL_INTERVAL getter /// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) +/// @param[out] uint32_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC5x: CW Destination Selection and Write/Read Additional QxODT[1:0] Signal -/// High; Default value - 00. Values Range from 00 to FF. No need to calculate; User -/// can override with desired experimental value. creator: mss_eff_cnfg consumer: -/// mss_dram_init firmware notes: -/// none +/// @note Specifies the memcal interval in +/// clocks. /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc_5x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_memcal_interval(const fapi2::Target& i_target, uint32_t* o_array) { if (o_array == nullptr) { @@ -3685,89 +3591,75 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc_5x(const fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) +/// @brief ATTR_EFF_ZQCAL_INTERVAL getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint32_t +/// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC6x: CW Data Control Word; Default value - 00. Values Range from 00 to FF.No -/// need to calculate; User can override with desired experimental value. creator: -/// mss_eff_cnfg consumer: mss_dram_init firmware notes: -/// none +/// @note Specifies the zqcal interval in +/// clocks. /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc_6x(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_zqcal_interval(const fapi2::Target& i_target, uint32_t& o_value) { - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); + uint32_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC_6x, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_ZQCAL_INTERVAL, i_target.getParent(), l_value) ); + o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC_6x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_ZQCAL_INTERVAL: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC_6x getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) +/// @brief ATTR_EFF_ZQCAL_INTERVAL getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint32_t +/// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC6x: CW Data Control Word; Default value - 00. Values Range from 00 to FF.No -/// need to calculate; User can override with desired experimental value. creator: -/// mss_eff_cnfg consumer: mss_dram_init firmware notes: -/// none +/// @note Specifies the zqcal interval in +/// clocks. /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc_6x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_zqcal_interval(const fapi2::Target& i_target, uint32_t& o_value) { - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); + uint32_t l_value[2]; + auto l_mca = i_target.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC_6x, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_ZQCAL_INTERVAL, l_mca.getParent(), l_value) ); + o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC_6x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_ZQCAL_INTERVAL: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC_6x getter +/// @brief ATTR_EFF_ZQCAL_INTERVAL getter /// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) +/// @param[out] uint32_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC6x: CW Data Control Word; Default value - 00. Values Range from 00 to FF.No -/// need to calculate; User can override with desired experimental value. creator: -/// mss_eff_cnfg consumer: mss_dram_init firmware notes: -/// none +/// @note Specifies the zqcal interval in +/// clocks. /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc_6x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_zqcal_interval(const fapi2::Target& i_target, uint32_t* o_array) { if (o_array == nullptr) { @@ -3775,57 +3667,61 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc_6x(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC7x: IBT Control Word; Default value - 00. Values Range from 00 to FF.No need -/// to calculate; User can override with desired experimental value. creator: -/// mss_eff_cnfg consumer: mss_dram_init firmware notes: -/// none +/// @note Specifies the number of master ranks per DIMM. Represents the number of physical +/// ranks on a DIMM. From SPD spec JEDEC Standard No. 21-C: Page 4.1.2.L-4. Byte 12 +/// (Bits 5~3) Number of package ranks per DIMM. Package ranks per DIMM refers to +/// the collections of devices on the module sharing common chip select +/// signals. /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc_7x(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_num_master_ranks_per_dimm(const fapi2::Target& i_target, + uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC_7x, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC_7x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC_7x getter +/// @brief ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC7x: IBT Control Word; Default value - 00. Values Range from 00 to FF.No need -/// to calculate; User can override with desired experimental value. creator: -/// mss_eff_cnfg consumer: mss_dram_init firmware notes: -/// none +/// @note Specifies the number of master ranks per DIMM. Represents the number of physical +/// ranks on a DIMM. From SPD spec JEDEC Standard No. 21-C: Page 4.1.2.L-4. Byte 12 +/// (Bits 5~3) Number of package ranks per DIMM. Package ranks per DIMM refers to +/// the collections of devices on the module sharing common chip select +/// signals. /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc_7x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_num_master_ranks_per_dimm(const fapi2::Target& i_target, + uint8_t* o_array) { if (o_array == nullptr) { @@ -3836,28 +3732,30 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc_7x(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC_7x, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC_7x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC_7x getter +/// @brief ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC7x: IBT Control Word; Default value - 00. Values Range from 00 to FF.No need -/// to calculate; User can override with desired experimental value. creator: -/// mss_eff_cnfg consumer: mss_dram_init firmware notes: -/// none +/// @note Specifies the number of master ranks per DIMM. Represents the number of physical +/// ranks on a DIMM. From SPD spec JEDEC Standard No. 21-C: Page 4.1.2.L-4. Byte 12 +/// (Bits 5~3) Number of package ranks per DIMM. Package ranks per DIMM refers to +/// the collections of devices on the module sharing common chip select +/// signals. /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc_7x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_num_master_ranks_per_dimm(const fapi2::Target& i_target, + uint8_t* o_array) { if (o_array == nullptr) { @@ -3867,57 +3765,55 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc_7x(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC8x: ODT Input Buffer/IBT, QxODT Output Buffer and Timing Control Word; -/// Default value - 00. Values Range from 00 to FF. No need to calculate; User can -/// override with desired experimental value. creator: mss_eff_cnfg consumer: -/// mss_dram_init firmware notes: -/// none +/// @note Bit wise representation of master ranks in each DIMM that are used for reads and +/// writes. Used by +/// PRD. /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc_8x(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ranks_configed(const fapi2::Target& i_target, + uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC_8x, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_RANKS_CONFIGED, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC_8x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_RANKS_CONFIGED: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC_8x getter +/// @brief ATTR_EFF_DIMM_RANKS_CONFIGED getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC8x: ODT Input Buffer/IBT, QxODT Output Buffer and Timing Control Word; -/// Default value - 00. Values Range from 00 to FF. No need to calculate; User can -/// override with desired experimental value. creator: mss_eff_cnfg consumer: -/// mss_dram_init firmware notes: -/// none +/// @note Bit wise representation of master ranks in each DIMM that are used for reads and +/// writes. Used by +/// PRD. /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc_8x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ranks_configed(const fapi2::Target& i_target, + uint8_t* o_array) { if (o_array == nullptr) { @@ -3928,29 +3824,28 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc_8x(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC_8x, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_RANKS_CONFIGED, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC_8x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_RANKS_CONFIGED: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC_8x getter +/// @brief ATTR_EFF_DIMM_RANKS_CONFIGED getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC8x: ODT Input Buffer/IBT, QxODT Output Buffer and Timing Control Word; -/// Default value - 00. Values Range from 00 to FF. No need to calculate; User can -/// override with desired experimental value. creator: mss_eff_cnfg consumer: -/// mss_dram_init firmware notes: -/// none +/// @note Bit wise representation of master ranks in each DIMM that are used for reads and +/// writes. Used by +/// PRD. /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc_8x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ranks_configed(const fapi2::Target& i_target, + uint8_t* o_array) { if (o_array == nullptr) { @@ -3960,55 +3855,51 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc_8x(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC9x1: QxODT[1:0] Write Pattern Control Word; Default value - 00. Values Range -/// from 00 to FF.No need to calculate; User can override with desired experimental -/// value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: -/// none +/// @note Specifies the number of DRAM dies per +/// package. /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc_9x(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_prim_die_count(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC_9x, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_PRIM_DIE_COUNT, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC_9x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_PRIM_DIE_COUNT: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC_9x getter +/// @brief ATTR_EFF_PRIM_DIE_COUNT getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC9x1: QxODT[1:0] Write Pattern Control Word; Default value - 00. Values Range -/// from 00 to FF.No need to calculate; User can override with desired experimental -/// value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: -/// none +/// @note Specifies the number of DRAM dies per +/// package. /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc_9x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_prim_die_count(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -4019,28 +3910,26 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc_9x(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC_9x, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_PRIM_DIE_COUNT, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC_9x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_PRIM_DIE_COUNT: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC_9x getter +/// @brief ATTR_EFF_PRIM_DIE_COUNT getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RC9x1: QxODT[1:0] Write Pattern Control Word; Default value - 00. Values Range -/// from 00 to FF.No need to calculate; User can override with desired experimental -/// value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: -/// none +/// @note Specifies the number of DRAM dies per +/// package. /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc_9x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_prim_die_count(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -4050,87 +3939,78 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc_9x(const fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) +/// @brief ATTR_MSS_MEM_THROTTLED_N_COMMANDS_PER_PORT getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint16_t +/// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RCAx1: QxODT[1:0] Read Pattern Control Word; Default value - 00. Values Range -/// from 00 to FF. No need to calculate; User can override with desired experimental -/// value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: -/// none +/// @note This is the throttled N commands per window of M DRAM clocks setting for +/// cfg_nm_n_per_port. /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc_ax(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode mem_throttled_n_commands_per_port(const fapi2::Target& i_target, + uint16_t& o_value) { - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); + uint16_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC_Ax, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_MEM_THROTTLED_N_COMMANDS_PER_PORT, i_target.getParent(), + l_value) ); + o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC_Ax: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_MEM_THROTTLED_N_COMMANDS_PER_PORT: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC_Ax getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) +/// @brief ATTR_MSS_MEM_THROTTLED_N_COMMANDS_PER_PORT getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint16_t +/// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RCAx1: QxODT[1:0] Read Pattern Control Word; Default value - 00. Values Range -/// from 00 to FF. No need to calculate; User can override with desired experimental -/// value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: -/// none +/// @note This is the throttled N commands per window of M DRAM clocks setting for +/// cfg_nm_n_per_port. /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc_ax(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode mem_throttled_n_commands_per_port(const fapi2::Target& i_target, + uint16_t& o_value) { - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); + uint16_t l_value[2]; + auto l_mca = i_target.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC_Ax, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_MEM_THROTTLED_N_COMMANDS_PER_PORT, l_mca.getParent(), + l_value) ); + o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC_Ax: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_MEM_THROTTLED_N_COMMANDS_PER_PORT: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC_Ax getter +/// @brief ATTR_MSS_MEM_THROTTLED_N_COMMANDS_PER_PORT getter /// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) +/// @param[out] uint16_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RCAx1: QxODT[1:0] Read Pattern Control Word; Default value - 00. Values Range -/// from 00 to FF. No need to calculate; User can override with desired experimental -/// value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: -/// none +/// @note This is the throttled N commands per window of M DRAM clocks setting for +/// cfg_nm_n_per_port. /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc_ax(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode mem_throttled_n_commands_per_port(const fapi2::Target& i_target, + uint16_t* o_array) { if (o_array == nullptr) { @@ -4138,89 +4018,78 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc_ax(const fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) +/// @brief ATTR_MSS_MEM_M_DRAM_CLOCKS getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint32_t +/// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RCBx: IBT and MRS Snoop Control Word; Default value - 07. Values Range from 00 -/// to FF. No need to calculate; User can override with desired experimental value. -/// creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: +/// @note This is the throttled M DRAM clocks setting for cfg_nm_m. creator: mss_eff_cnfg +/// consumer: mss_eff_config_thermal firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc_bx(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode mem_m_dram_clocks(const fapi2::Target& i_target, uint32_t& o_value) { - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); + uint32_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC_Bx, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_MEM_M_DRAM_CLOCKS, i_target.getParent(), l_value) ); + o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC_Bx: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_MEM_M_DRAM_CLOCKS: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC_Bx getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) +/// @brief ATTR_MSS_MEM_M_DRAM_CLOCKS getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint32_t +/// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RCBx: IBT and MRS Snoop Control Word; Default value - 07. Values Range from 00 -/// to FF. No need to calculate; User can override with desired experimental value. -/// creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: +/// @note This is the throttled M DRAM clocks setting for cfg_nm_m. creator: mss_eff_cnfg +/// consumer: mss_eff_config_thermal firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc_bx(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode mem_m_dram_clocks(const fapi2::Target& i_target, uint32_t& o_value) { - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); + uint32_t l_value[2]; + auto l_mca = i_target.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_RC_Bx, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_MEM_M_DRAM_CLOCKS, l_mca.getParent(), l_value) ); + o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_RC_Bx: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_MEM_M_DRAM_CLOCKS: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_RC_Bx getter +/// @brief ATTR_MSS_MEM_M_DRAM_CLOCKS getter /// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) +/// @param[out] uint32_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0RCBx: IBT and MRS Snoop Control Word; Default value - 07. Values Range from 00 -/// to FF. No need to calculate; User can override with desired experimental value. -/// creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: +/// @note This is the throttled M DRAM clocks setting for cfg_nm_m. creator: mss_eff_cnfg +/// consumer: mss_eff_config_thermal firmware notes: /// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_rc_bx(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode mem_m_dram_clocks(const fapi2::Target& i_target, uint32_t* o_array) { if (o_array == nullptr) { @@ -4228,92 +4097,80 @@ inline fapi2::ReturnCode eff_dimm_ddr4_rc_bx(const fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) +/// @brief ATTR_MSS_MEM_THROTTLED_N_COMMANDS_PER_SLOT getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint16_t +/// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note RCD Mirroring. Used in mss_dram_init and is computed in mss_eff_cnfg. Each -/// memory channel will have a value. creator: mss_eff_cnfg consumer: mss_dram_init -/// firmware notes: -/// none +/// @note This is the throttle numerator setting for +/// cfg_nm_n_per_slot /// -inline fapi2::ReturnCode eff_dimm_rcd_mirror_mode(const fapi2::Target& i_target, - uint8_t& o_value) +inline fapi2::ReturnCode mem_throttled_n_commands_per_slot(const fapi2::Target& i_target, + uint16_t& o_value) { - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); + uint16_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_RCD_MIRROR_MODE, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_MEM_THROTTLED_N_COMMANDS_PER_SLOT, i_target.getParent(), + l_value) ); + o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_RCD_MIRROR_MODE: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_MEM_THROTTLED_N_COMMANDS_PER_SLOT: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_RCD_MIRROR_MODE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) +/// @brief ATTR_MSS_MEM_THROTTLED_N_COMMANDS_PER_SLOT getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint16_t +/// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note RCD Mirroring. Used in mss_dram_init and is computed in mss_eff_cnfg. Each -/// memory channel will have a value. creator: mss_eff_cnfg consumer: mss_dram_init -/// firmware notes: -/// none +/// @note This is the throttle numerator setting for +/// cfg_nm_n_per_slot /// -inline fapi2::ReturnCode eff_dimm_rcd_mirror_mode(const fapi2::Target& i_target, - uint8_t* o_array) +inline fapi2::ReturnCode mem_throttled_n_commands_per_slot(const fapi2::Target& i_target, + uint16_t& o_value) { - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); + uint16_t l_value[2]; + auto l_mca = i_target.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_RCD_MIRROR_MODE, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_MEM_THROTTLED_N_COMMANDS_PER_SLOT, l_mca.getParent(), + l_value) ); + o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_RCD_MIRROR_MODE: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_MEM_THROTTLED_N_COMMANDS_PER_SLOT: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_RCD_MIRROR_MODE getter +/// @brief ATTR_MSS_MEM_THROTTLED_N_COMMANDS_PER_SLOT getter /// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) +/// @param[out] uint16_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note RCD Mirroring. Used in mss_dram_init and is computed in mss_eff_cnfg. Each -/// memory channel will have a value. creator: mss_eff_cnfg consumer: mss_dram_init -/// firmware notes: -/// none +/// @note This is the throttle numerator setting for +/// cfg_nm_n_per_slot /// -inline fapi2::ReturnCode eff_dimm_rcd_mirror_mode(const fapi2::Target& i_target, - uint8_t* o_array) +inline fapi2::ReturnCode mem_throttled_n_commands_per_slot(const fapi2::Target& i_target, + uint16_t* o_array) { if (o_array == nullptr) { @@ -4321,75 +4178,89 @@ inline fapi2::ReturnCode eff_dimm_rcd_mirror_mode(const fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D) +/// @brief ATTR_MSS_MEM_WATT_TARGET getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint32_t +/// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Specifies the schmoo mode to use during -/// draminit_train_adv. +/// @note Total memory power used to throttle for each dimm Used to compute the throttles +/// on the channel and/or dimms for OCC OCC sets after IPL creator: mss_eff_config +/// consumer: mss_bulk_pwr_throttle, mss_utils_to_throttle firmware notes: +/// none. /// -inline fapi2::ReturnCode eff_schmoo_mode(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode mem_watt_target(const fapi2::Target& i_target, uint32_t& o_value) { - uint8_t l_value[2]; + uint32_t l_value[2][2]; + auto l_mca = i_target.getParent(); + auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_SCHMOO_MODE, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_MEM_WATT_TARGET, l_mcs, l_value) ); + o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_SCHMOO_MODE: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_MEM_WATT_TARGET: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_SCHMOO_MODE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) +/// @brief ATTR_MSS_MEM_WATT_TARGET getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] uint32_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Specifies the schmoo mode to use during -/// draminit_train_adv. +/// @note Total memory power used to throttle for each dimm Used to compute the throttles +/// on the channel and/or dimms for OCC OCC sets after IPL creator: mss_eff_config +/// consumer: mss_bulk_pwr_throttle, mss_utils_to_throttle firmware notes: +/// none. /// -inline fapi2::ReturnCode eff_schmoo_mode(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode mem_watt_target(const fapi2::Target& i_target, uint32_t* o_array) { - uint8_t l_value[2]; - auto l_mca = i_target.getParent(); + if (o_array == nullptr) + { + FAPI_ERR("nullptr passed to attribute accessor %s", __func__); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + } - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_SCHMOO_MODE, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; + uint32_t l_value[2][2]; + auto l_mcs = i_target.getParent(); + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_MEM_WATT_TARGET, l_mcs, l_value) ); + memcpy(o_array, &(l_value[mss::index(i_target)][0]), 8); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_SCHMOO_MODE: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_MEM_WATT_TARGET: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_SCHMOO_MODE getter +/// @brief ATTR_MSS_MEM_WATT_TARGET getter /// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) +/// @param[out] uint32_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Specifies the schmoo mode to use during -/// draminit_train_adv. +/// @note Total memory power used to throttle for each dimm Used to compute the throttles +/// on the channel and/or dimms for OCC OCC sets after IPL creator: mss_eff_config +/// consumer: mss_bulk_pwr_throttle, mss_utils_to_throttle firmware notes: +/// none. /// -inline fapi2::ReturnCode eff_schmoo_mode(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode mem_watt_target(const fapi2::Target& i_target, uint32_t* o_array) { if (o_array == nullptr) { @@ -4397,75 +4268,83 @@ inline fapi2::ReturnCode eff_schmoo_mode(const fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D) +/// @brief ATTR_MSS_TOTAL_PWR_SLOPE getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint16_t +/// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Specifies the schmoo mode to use during -/// draminit_train_adv +/// @note VDDR+VPP Power slope value for dimm creator: mss_eff_config consumer: +/// mss_bulk_pwr_throttles /// -inline fapi2::ReturnCode eff_schmoo_addr_mode(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode total_pwr_slope(const fapi2::Target& i_target, uint16_t& o_value) { - uint8_t l_value[2]; + uint16_t l_value[2][2]; + auto l_mca = i_target.getParent(); + auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_SCHMOO_ADDR_MODE, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_TOTAL_PWR_SLOPE, l_mcs, l_value) ); + o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_SCHMOO_ADDR_MODE: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_TOTAL_PWR_SLOPE: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_SCHMOO_ADDR_MODE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) +/// @brief ATTR_MSS_TOTAL_PWR_SLOPE getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] uint16_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Specifies the schmoo mode to use during -/// draminit_train_adv +/// @note VDDR+VPP Power slope value for dimm creator: mss_eff_config consumer: +/// mss_bulk_pwr_throttles /// -inline fapi2::ReturnCode eff_schmoo_addr_mode(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode total_pwr_slope(const fapi2::Target& i_target, uint16_t* o_array) { - uint8_t l_value[2]; - auto l_mca = i_target.getParent(); + if (o_array == nullptr) + { + FAPI_ERR("nullptr passed to attribute accessor %s", __func__); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + } - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_SCHMOO_ADDR_MODE, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; + uint16_t l_value[2][2]; + auto l_mcs = i_target.getParent(); + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_TOTAL_PWR_SLOPE, l_mcs, l_value) ); + memcpy(o_array, &(l_value[mss::index(i_target)][0]), 4); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_SCHMOO_ADDR_MODE: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_TOTAL_PWR_SLOPE: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_SCHMOO_ADDR_MODE getter +/// @brief ATTR_MSS_TOTAL_PWR_SLOPE getter /// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) +/// @param[out] uint16_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Specifies the schmoo mode to use during -/// draminit_train_adv +/// @note VDDR+VPP Power slope value for dimm creator: mss_eff_config consumer: +/// mss_bulk_pwr_throttles /// -inline fapi2::ReturnCode eff_schmoo_addr_mode(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode total_pwr_slope(const fapi2::Target& i_target, uint16_t* o_array) { if (o_array == nullptr) { @@ -4473,75 +4352,83 @@ inline fapi2::ReturnCode eff_schmoo_addr_mode(const fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D) +/// @brief ATTR_MSS_TOTAL_PWR_INTERCEPT getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint16_t +/// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Specifies the schmoo test to run during draminit_train_adv. Bit -/// wise. +/// @note VDDR+VPP Power intercept value for dimm creator: mss_eff_config consumer: +/// mss_bulk_pwr_throttles /// -inline fapi2::ReturnCode eff_schmoo_test_valid(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode total_pwr_intercept(const fapi2::Target& i_target, uint16_t& o_value) { - uint8_t l_value[2]; + uint16_t l_value[2][2]; + auto l_mca = i_target.getParent(); + auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_SCHMOO_TEST_VALID, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_TOTAL_PWR_INTERCEPT, l_mcs, l_value) ); + o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_SCHMOO_TEST_VALID: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_TOTAL_PWR_INTERCEPT: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_SCHMOO_TEST_VALID getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) +/// @brief ATTR_MSS_TOTAL_PWR_INTERCEPT getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] uint16_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Specifies the schmoo test to run during draminit_train_adv. Bit -/// wise. +/// @note VDDR+VPP Power intercept value for dimm creator: mss_eff_config consumer: +/// mss_bulk_pwr_throttles /// -inline fapi2::ReturnCode eff_schmoo_test_valid(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode total_pwr_intercept(const fapi2::Target& i_target, uint16_t* o_array) { - uint8_t l_value[2]; - auto l_mca = i_target.getParent(); + if (o_array == nullptr) + { + FAPI_ERR("nullptr passed to attribute accessor %s", __func__); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + } - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_SCHMOO_TEST_VALID, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; + uint16_t l_value[2][2]; + auto l_mcs = i_target.getParent(); + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_TOTAL_PWR_INTERCEPT, l_mcs, l_value) ); + memcpy(o_array, &(l_value[mss::index(i_target)][0]), 4); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_SCHMOO_TEST_VALID: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_TOTAL_PWR_INTERCEPT: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_SCHMOO_TEST_VALID getter +/// @brief ATTR_MSS_TOTAL_PWR_INTERCEPT getter /// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) +/// @param[out] uint16_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Specifies the schmoo test to run during draminit_train_adv. Bit -/// wise. +/// @note VDDR+VPP Power intercept value for dimm creator: mss_eff_config consumer: +/// mss_bulk_pwr_throttles /// -inline fapi2::ReturnCode eff_schmoo_test_valid(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode total_pwr_intercept(const fapi2::Target& i_target, uint16_t* o_array) { if (o_array == nullptr) { @@ -4549,76 +4436,78 @@ inline fapi2::ReturnCode eff_schmoo_test_valid(const fapi2::Target -/// @param[out] ref to the value uint8_t +/// @param[out] ref to the value uint32_t /// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Specifies the schmoo parameters to use during draminit_train_adv. Bit -/// wise. -/// -inline fapi2::ReturnCode eff_schmoo_param_valid(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; +/// @note Databus utilization per port limit used to calculate memory throttles and power +/// limit creator: OCC consumer: +/// mss_utils_to_throttle +/// +inline fapi2::ReturnCode databus_util(const fapi2::Target& i_target, uint32_t& o_value) +{ + uint32_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_SCHMOO_PARAM_VALID, i_target.getParent(), l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_DATABUS_UTIL, i_target.getParent(), l_value) ); o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_SCHMOO_PARAM_VALID: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_DATABUS_UTIL: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_SCHMOO_PARAM_VALID getter +/// @brief ATTR_MSS_DATABUS_UTIL getter /// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t +/// @param[out] ref to the value uint32_t /// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Specifies the schmoo parameters to use during draminit_train_adv. Bit -/// wise. +/// @note Databus utilization per port limit used to calculate memory throttles and power +/// limit creator: OCC consumer: +/// mss_utils_to_throttle /// -inline fapi2::ReturnCode eff_schmoo_param_valid(const fapi2::Target& i_target, - uint8_t& o_value) +inline fapi2::ReturnCode databus_util(const fapi2::Target& i_target, uint32_t& o_value) { - uint8_t l_value[2]; + uint32_t l_value[2]; auto l_mca = i_target.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_SCHMOO_PARAM_VALID, l_mca.getParent(), l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_DATABUS_UTIL, l_mca.getParent(), l_value) ); o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_SCHMOO_PARAM_VALID: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_DATABUS_UTIL: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_SCHMOO_PARAM_VALID getter +/// @brief ATTR_MSS_DATABUS_UTIL getter /// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value +/// @param[out] uint32_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Specifies the schmoo parameters to use during draminit_train_adv. Bit -/// wise. +/// @note Databus utilization per port limit used to calculate memory throttles and power +/// limit creator: OCC consumer: +/// mss_utils_to_throttle /// -inline fapi2::ReturnCode eff_schmoo_param_valid(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode databus_util(const fapi2::Target& i_target, uint32_t* o_array) { if (o_array == nullptr) { @@ -4626,82 +4515,75 @@ inline fapi2::ReturnCode eff_schmoo_param_valid(const fapi2::Target -/// @param[out] ref to the value uint8_t +/// @param[out] ref to the value uint32_t /// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Specifies the schmoo minimum margin to use during draminit_train_adv. Used to -/// signal possible SI issues in -/// memory. +/// @note Channel Pair Max Power output from thermal +/// procedures /// -inline fapi2::ReturnCode eff_schmoo_wr_eye_min_margin(const fapi2::Target& i_target, - uint8_t& o_value) +inline fapi2::ReturnCode port_maxpower(const fapi2::Target& i_target, uint32_t& o_value) { - uint8_t l_value[2]; + uint32_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_SCHMOO_WR_EYE_MIN_MARGIN, i_target.getParent(), - l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_PORT_MAXPOWER, i_target.getParent(), l_value) ); o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_SCHMOO_WR_EYE_MIN_MARGIN: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_PORT_MAXPOWER: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_SCHMOO_WR_EYE_MIN_MARGIN getter +/// @brief ATTR_MSS_PORT_MAXPOWER getter /// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t +/// @param[out] ref to the value uint32_t /// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Specifies the schmoo minimum margin to use during draminit_train_adv. Used to -/// signal possible SI issues in -/// memory. +/// @note Channel Pair Max Power output from thermal +/// procedures /// -inline fapi2::ReturnCode eff_schmoo_wr_eye_min_margin(const fapi2::Target& i_target, - uint8_t& o_value) +inline fapi2::ReturnCode port_maxpower(const fapi2::Target& i_target, uint32_t& o_value) { - uint8_t l_value[2]; + uint32_t l_value[2]; auto l_mca = i_target.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_SCHMOO_WR_EYE_MIN_MARGIN, l_mca.getParent(), l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_PORT_MAXPOWER, l_mca.getParent(), l_value) ); o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_SCHMOO_WR_EYE_MIN_MARGIN: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_PORT_MAXPOWER: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_SCHMOO_WR_EYE_MIN_MARGIN getter +/// @brief ATTR_MSS_PORT_MAXPOWER getter /// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value +/// @param[out] uint32_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Specifies the schmoo minimum margin to use during draminit_train_adv. Used to -/// signal possible SI issues in -/// memory. +/// @note Channel Pair Max Power output from thermal +/// procedures /// -inline fapi2::ReturnCode eff_schmoo_wr_eye_min_margin(const fapi2::Target& i_target, - uint8_t* o_array) +inline fapi2::ReturnCode port_maxpower(const fapi2::Target& i_target, uint32_t* o_array) { if (o_array == nullptr) { @@ -4709,82 +4591,83 @@ inline fapi2::ReturnCode eff_schmoo_wr_eye_min_margin(const fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D) +/// @brief ATTR_MSS_DIMM_THERMAL_LIMIT getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint32_t +/// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Specifies the schmoo minimum margin to use during draminit_train_adv. Used to -/// signal possible SI issues in -/// memory. +/// @note DIMM Max Power based on a thermal limit Decoded from +/// ATTR_MSS_MRW_THERMAL_POWER_LIMIT /// -inline fapi2::ReturnCode eff_schmoo_rd_eye_min_margin(const fapi2::Target& i_target, - uint8_t& o_value) +inline fapi2::ReturnCode dimm_thermal_limit(const fapi2::Target& i_target, uint32_t& o_value) { - uint8_t l_value[2]; + uint32_t l_value[2][2]; + auto l_mca = i_target.getParent(); + auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_SCHMOO_RD_EYE_MIN_MARGIN, i_target.getParent(), - l_value) ); - o_value = l_value[mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_DIMM_THERMAL_LIMIT, l_mcs, l_value) ); + o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_SCHMOO_RD_EYE_MIN_MARGIN: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_DIMM_THERMAL_LIMIT: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_SCHMOO_RD_EYE_MIN_MARGIN getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) +/// @brief ATTR_MSS_DIMM_THERMAL_LIMIT getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] uint32_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Specifies the schmoo minimum margin to use during draminit_train_adv. Used to -/// signal possible SI issues in -/// memory. +/// @note DIMM Max Power based on a thermal limit Decoded from +/// ATTR_MSS_MRW_THERMAL_POWER_LIMIT /// -inline fapi2::ReturnCode eff_schmoo_rd_eye_min_margin(const fapi2::Target& i_target, - uint8_t& o_value) +inline fapi2::ReturnCode dimm_thermal_limit(const fapi2::Target& i_target, uint32_t* o_array) { - uint8_t l_value[2]; - auto l_mca = i_target.getParent(); + if (o_array == nullptr) + { + FAPI_ERR("nullptr passed to attribute accessor %s", __func__); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + } - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_SCHMOO_RD_EYE_MIN_MARGIN, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; + uint32_t l_value[2][2]; + auto l_mcs = i_target.getParent(); + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_DIMM_THERMAL_LIMIT, l_mcs, l_value) ); + memcpy(o_array, &(l_value[mss::index(i_target)][0]), 8); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_SCHMOO_RD_EYE_MIN_MARGIN: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_DIMM_THERMAL_LIMIT: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_SCHMOO_RD_EYE_MIN_MARGIN getter +/// @brief ATTR_MSS_DIMM_THERMAL_LIMIT getter /// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) +/// @param[out] uint32_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Specifies the schmoo minimum margin to use during draminit_train_adv. Used to -/// signal possible SI issues in -/// memory. +/// @note DIMM Max Power based on a thermal limit Decoded from +/// ATTR_MSS_MRW_THERMAL_POWER_LIMIT /// -inline fapi2::ReturnCode eff_schmoo_rd_eye_min_margin(const fapi2::Target& i_target, - uint8_t* o_array) +inline fapi2::ReturnCode dimm_thermal_limit(const fapi2::Target& i_target, uint32_t* o_array) { if (o_array == nullptr) { @@ -4792,83 +4675,80 @@ inline fapi2::ReturnCode eff_schmoo_rd_eye_min_margin(const fapi2::Target -/// @param[out] ref to the value uint8_t +/// @param[out] ref to the value uint16_t /// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Specifies the schmoo minimum margin to use during draminit_train_adv. Used to -/// signal possible SI issues in -/// memory. +/// @note Runtime throttled N commands per M DRAM clocks setting for +/// cfg_nm_n_per_port. /// -inline fapi2::ReturnCode eff_schmoo_dqs_clk_min_margin(const fapi2::Target& i_target, - uint8_t& o_value) +inline fapi2::ReturnCode runtime_mem_throttled_n_commands_per_port(const fapi2::Target& + i_target, uint16_t& o_value) { - uint8_t l_value[2]; + uint16_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_SCHMOO_DQS_CLK_MIN_MARGIN, i_target.getParent(), - l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_RUNTIME_MEM_THROTTLED_N_COMMANDS_PER_PORT, + i_target.getParent(), l_value) ); o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_SCHMOO_DQS_CLK_MIN_MARGIN: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_RUNTIME_MEM_THROTTLED_N_COMMANDS_PER_PORT: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_SCHMOO_DQS_CLK_MIN_MARGIN getter +/// @brief ATTR_MSS_RUNTIME_MEM_THROTTLED_N_COMMANDS_PER_PORT getter /// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t +/// @param[out] ref to the value uint16_t /// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Specifies the schmoo minimum margin to use during draminit_train_adv. Used to -/// signal possible SI issues in -/// memory. +/// @note Runtime throttled N commands per M DRAM clocks setting for +/// cfg_nm_n_per_port. /// -inline fapi2::ReturnCode eff_schmoo_dqs_clk_min_margin(const fapi2::Target& i_target, - uint8_t& o_value) +inline fapi2::ReturnCode runtime_mem_throttled_n_commands_per_port(const fapi2::Target& + i_target, uint16_t& o_value) { - uint8_t l_value[2]; + uint16_t l_value[2]; auto l_mca = i_target.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_SCHMOO_DQS_CLK_MIN_MARGIN, l_mca.getParent(), - l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_RUNTIME_MEM_THROTTLED_N_COMMANDS_PER_PORT, + l_mca.getParent(), l_value) ); o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_SCHMOO_DQS_CLK_MIN_MARGIN: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_RUNTIME_MEM_THROTTLED_N_COMMANDS_PER_PORT: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_SCHMOO_DQS_CLK_MIN_MARGIN getter +/// @brief ATTR_MSS_RUNTIME_MEM_THROTTLED_N_COMMANDS_PER_PORT getter /// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value +/// @param[out] uint16_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Specifies the schmoo minimum margin to use during draminit_train_adv. Used to -/// signal possible SI issues in -/// memory. +/// @note Runtime throttled N commands per M DRAM clocks setting for +/// cfg_nm_n_per_port. /// -inline fapi2::ReturnCode eff_schmoo_dqs_clk_min_margin(const fapi2::Target& i_target, - uint8_t* o_array) +inline fapi2::ReturnCode runtime_mem_throttled_n_commands_per_port(const fapi2::Target& + i_target, uint16_t* o_array) { if (o_array == nullptr) { @@ -4876,83 +4756,80 @@ inline fapi2::ReturnCode eff_schmoo_dqs_clk_min_margin(const fapi2::Target -/// @param[out] ref to the value uint8_t +/// @param[out] ref to the value uint16_t /// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Specifies the schmoo minimum margin to use during draminit_train_adv. Used to -/// signal possible SI issues in -/// memory. +/// @note Runtime throttle numerator setting for +/// cfg_nm_n_per_slot /// -inline fapi2::ReturnCode eff_schmoo_rd_gate_min_margin(const fapi2::Target& i_target, - uint8_t& o_value) +inline fapi2::ReturnCode runtime_mem_throttled_n_commands_per_slot(const fapi2::Target& + i_target, uint16_t& o_value) { - uint8_t l_value[2]; + uint16_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_SCHMOO_RD_GATE_MIN_MARGIN, i_target.getParent(), - l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_RUNTIME_MEM_THROTTLED_N_COMMANDS_PER_SLOT, + i_target.getParent(), l_value) ); o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_SCHMOO_RD_GATE_MIN_MARGIN: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_RUNTIME_MEM_THROTTLED_N_COMMANDS_PER_SLOT: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_SCHMOO_RD_GATE_MIN_MARGIN getter +/// @brief ATTR_MSS_RUNTIME_MEM_THROTTLED_N_COMMANDS_PER_SLOT getter /// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t +/// @param[out] ref to the value uint16_t /// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Specifies the schmoo minimum margin to use during draminit_train_adv. Used to -/// signal possible SI issues in -/// memory. +/// @note Runtime throttle numerator setting for +/// cfg_nm_n_per_slot /// -inline fapi2::ReturnCode eff_schmoo_rd_gate_min_margin(const fapi2::Target& i_target, - uint8_t& o_value) +inline fapi2::ReturnCode runtime_mem_throttled_n_commands_per_slot(const fapi2::Target& + i_target, uint16_t& o_value) { - uint8_t l_value[2]; + uint16_t l_value[2]; auto l_mca = i_target.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_SCHMOO_RD_GATE_MIN_MARGIN, l_mca.getParent(), - l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_RUNTIME_MEM_THROTTLED_N_COMMANDS_PER_SLOT, + l_mca.getParent(), l_value) ); o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_SCHMOO_RD_GATE_MIN_MARGIN: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_RUNTIME_MEM_THROTTLED_N_COMMANDS_PER_SLOT: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_SCHMOO_RD_GATE_MIN_MARGIN getter +/// @brief ATTR_MSS_RUNTIME_MEM_THROTTLED_N_COMMANDS_PER_SLOT getter /// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value +/// @param[out] uint16_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Specifies the schmoo minimum margin to use during draminit_train_adv. Used to -/// signal possible SI issues in -/// memory. +/// @note Runtime throttle numerator setting for +/// cfg_nm_n_per_slot /// -inline fapi2::ReturnCode eff_schmoo_rd_gate_min_margin(const fapi2::Target& i_target, - uint8_t* o_array) +inline fapi2::ReturnCode runtime_mem_throttled_n_commands_per_slot(const fapi2::Target& + i_target, uint16_t* o_array) { if (o_array == nullptr) { @@ -4960,83 +4837,81 @@ inline fapi2::ReturnCode eff_schmoo_rd_gate_min_margin(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Specifies the schmoo minimum margin to use during draminit_train_adv. Used to -/// signal possible SI issues in -/// memory. +/// @note Low Power Auto Self-Refresh. This is for DDR4 MRS2. Computed in mss_eff_cnfg. +/// Each memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// firmware notes: +/// none /// -inline fapi2::ReturnCode eff_schmoo_addr_cmd_min_margin(const fapi2::Target& i_target, - uint8_t& o_value) +inline fapi2::ReturnCode eff_dram_lpasr(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_SCHMOO_ADDR_CMD_MIN_MARGIN, i_target.getParent(), - l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_LPASR, i_target.getParent(), l_value) ); o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_SCHMOO_ADDR_CMD_MIN_MARGIN: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DRAM_LPASR: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_SCHMOO_ADDR_CMD_MIN_MARGIN getter +/// @brief ATTR_EFF_DRAM_LPASR getter /// @param[in] const ref to the fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Specifies the schmoo minimum margin to use during draminit_train_adv. Used to -/// signal possible SI issues in -/// memory. +/// @note Low Power Auto Self-Refresh. This is for DDR4 MRS2. Computed in mss_eff_cnfg. +/// Each memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// firmware notes: +/// none /// -inline fapi2::ReturnCode eff_schmoo_addr_cmd_min_margin(const fapi2::Target& i_target, - uint8_t& o_value) +inline fapi2::ReturnCode eff_dram_lpasr(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2]; auto l_mca = i_target.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_SCHMOO_ADDR_CMD_MIN_MARGIN, l_mca.getParent(), - l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_LPASR, l_mca.getParent(), l_value) ); o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_SCHMOO_ADDR_CMD_MIN_MARGIN: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DRAM_LPASR: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_SCHMOO_ADDR_CMD_MIN_MARGIN getter +/// @brief ATTR_EFF_DRAM_LPASR getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Specifies the schmoo minimum margin to use during draminit_train_adv. Used to -/// signal possible SI issues in -/// memory. +/// @note Low Power Auto Self-Refresh. This is for DDR4 MRS2. Computed in mss_eff_cnfg. +/// Each memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// firmware notes: +/// none /// -inline fapi2::ReturnCode eff_schmoo_addr_cmd_min_margin(const fapi2::Target& i_target, - uint8_t* o_array) +inline fapi2::ReturnCode eff_dram_lpasr(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -5046,73 +4921,79 @@ inline fapi2::ReturnCode eff_schmoo_addr_cmd_min_margin(const fapi2::Target -/// @param[out] ref to the value uint32_t +/// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Specifies the memcal interval in -/// clocks. +/// @note MPR Page Selection This is for DDR4 MRS3. Computed in mss_eff_cnfg. Each memory +/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware +/// notes: +/// none /// -inline fapi2::ReturnCode eff_memcal_interval(const fapi2::Target& i_target, uint32_t& o_value) +inline fapi2::ReturnCode eff_mpr_page(const fapi2::Target& i_target, uint8_t& o_value) { - uint32_t l_value[2]; + uint8_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_MEMCAL_INTERVAL, i_target.getParent(), l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_MPR_PAGE, i_target.getParent(), l_value) ); o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_MEMCAL_INTERVAL: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_MPR_PAGE: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_MEMCAL_INTERVAL getter +/// @brief ATTR_EFF_MPR_PAGE getter /// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint32_t +/// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Specifies the memcal interval in -/// clocks. +/// @note MPR Page Selection This is for DDR4 MRS3. Computed in mss_eff_cnfg. Each memory +/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware +/// notes: +/// none /// -inline fapi2::ReturnCode eff_memcal_interval(const fapi2::Target& i_target, uint32_t& o_value) +inline fapi2::ReturnCode eff_mpr_page(const fapi2::Target& i_target, uint8_t& o_value) { - uint32_t l_value[2]; + uint8_t l_value[2]; auto l_mca = i_target.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_MEMCAL_INTERVAL, l_mca.getParent(), l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_MPR_PAGE, l_mca.getParent(), l_value) ); o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_MEMCAL_INTERVAL: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_MPR_PAGE: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_MEMCAL_INTERVAL getter +/// @brief ATTR_EFF_MPR_PAGE getter /// @param[in] const ref to the fapi2::Target -/// @param[out] uint32_t* memory to store the value +/// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Specifies the memcal interval in -/// clocks. +/// @note MPR Page Selection This is for DDR4 MRS3. Computed in mss_eff_cnfg. Each memory +/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware +/// notes: +/// none /// -inline fapi2::ReturnCode eff_memcal_interval(const fapi2::Target& i_target, uint32_t* o_array) +inline fapi2::ReturnCode eff_mpr_page(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -5120,75 +5001,81 @@ inline fapi2::ReturnCode eff_memcal_interval(const fapi2::Target -/// @param[out] ref to the value uint32_t +/// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Specifies the zqcal interval in -/// clocks. +/// @note Gear Down Mode. This is for DDR4 MRS3. Computed in mss_eff_cnfg. Each memory +/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware +/// notes: +/// none /// -inline fapi2::ReturnCode eff_zqcal_interval(const fapi2::Target& i_target, uint32_t& o_value) +inline fapi2::ReturnCode eff_geardown_mode(const fapi2::Target& i_target, uint8_t& o_value) { - uint32_t l_value[2]; + uint8_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_ZQCAL_INTERVAL, i_target.getParent(), l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_GEARDOWN_MODE, i_target.getParent(), l_value) ); o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_ZQCAL_INTERVAL: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_GEARDOWN_MODE: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_ZQCAL_INTERVAL getter +/// @brief ATTR_EFF_GEARDOWN_MODE getter /// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint32_t +/// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Specifies the zqcal interval in -/// clocks. +/// @note Gear Down Mode. This is for DDR4 MRS3. Computed in mss_eff_cnfg. Each memory +/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware +/// notes: +/// none /// -inline fapi2::ReturnCode eff_zqcal_interval(const fapi2::Target& i_target, uint32_t& o_value) +inline fapi2::ReturnCode eff_geardown_mode(const fapi2::Target& i_target, uint8_t& o_value) { - uint32_t l_value[2]; + uint8_t l_value[2]; auto l_mca = i_target.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_ZQCAL_INTERVAL, l_mca.getParent(), l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_GEARDOWN_MODE, l_mca.getParent(), l_value) ); o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_ZQCAL_INTERVAL: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_GEARDOWN_MODE: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_ZQCAL_INTERVAL getter +/// @brief ATTR_EFF_GEARDOWN_MODE getter /// @param[in] const ref to the fapi2::Target -/// @param[out] uint32_t* memory to store the value +/// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Specifies the zqcal interval in -/// clocks. +/// @note Gear Down Mode. This is for DDR4 MRS3. Computed in mss_eff_cnfg. Each memory +/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware +/// notes: +/// none /// -inline fapi2::ReturnCode eff_zqcal_interval(const fapi2::Target& i_target, uint32_t* o_array) +inline fapi2::ReturnCode eff_geardown_mode(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -5196,83 +5083,81 @@ inline fapi2::ReturnCode eff_zqcal_interval(const fapi2::Target +/// @brief ATTR_EFF_PER_DRAM_ACCESS getter +/// @param[in] const ref to the fapi2::Target /// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) +/// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Specifies the memory topology type. See centaur -/// workbook. +/// @note Per DRAM accessibility. This is for DDR4 MRS3. Computed in mss_eff_cnfg. Each +/// memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// firmware notes: +/// none /// -inline fapi2::ReturnCode eff_ibm_type(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_per_dram_access(const fapi2::Target& i_target, uint8_t& o_value) { - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); + uint8_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_IBM_TYPE, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_PER_DRAM_ACCESS, i_target.getParent(), l_value) ); + o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_IBM_TYPE: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_PER_DRAM_ACCESS: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_IBM_TYPE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) +/// @brief ATTR_EFF_PER_DRAM_ACCESS getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint8_t +/// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Specifies the memory topology type. See centaur -/// workbook. +/// @note Per DRAM accessibility. This is for DDR4 MRS3. Computed in mss_eff_cnfg. Each +/// memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// firmware notes: +/// none /// -inline fapi2::ReturnCode eff_ibm_type(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_per_dram_access(const fapi2::Target& i_target, uint8_t& o_value) { - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); + uint8_t l_value[2]; + auto l_mca = i_target.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_IBM_TYPE, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_PER_DRAM_ACCESS, l_mca.getParent(), l_value) ); + o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_IBM_TYPE: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_PER_DRAM_ACCESS: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_IBM_TYPE getter +/// @brief ATTR_EFF_PER_DRAM_ACCESS getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) +/// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Specifies the memory topology type. See centaur -/// workbook. +/// @note Per DRAM accessibility. This is for DDR4 MRS3. Computed in mss_eff_cnfg. Each +/// memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// firmware notes: +/// none /// -inline fapi2::ReturnCode eff_ibm_type(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_per_dram_access(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -5280,95 +5165,81 @@ inline fapi2::ReturnCode eff_ibm_type(const fapi2::Target +/// @brief ATTR_EFF_TEMP_READOUT getter +/// @param[in] const ref to the fapi2::Target /// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) +/// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Specifies the number of master ranks per DIMM. Represents the number of physical -/// ranks on a DIMM. From SPD spec JEDEC Standard No. 21-C: Page 4.1.2.L-4. Byte 12 -/// (Bits 5~3) Number of package ranks per DIMM. Package ranks per DIMM refers to -/// the collections of devices on the module sharing common chip select -/// signals. +/// @note Temperature sensor readout. This is for DDR4 MRS3. Computed in mss_eff_cnfg. +/// Each memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// firmware notes: +/// none /// -inline fapi2::ReturnCode eff_num_master_ranks_per_dimm(const fapi2::Target& i_target, - uint8_t& o_value) +inline fapi2::ReturnCode eff_temp_readout(const fapi2::Target& i_target, uint8_t& o_value) { - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); + uint8_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_TEMP_READOUT, i_target.getParent(), l_value) ); + o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_TEMP_READOUT: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) +/// @brief ATTR_EFF_TEMP_READOUT getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint8_t +/// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Specifies the number of master ranks per DIMM. Represents the number of physical -/// ranks on a DIMM. From SPD spec JEDEC Standard No. 21-C: Page 4.1.2.L-4. Byte 12 -/// (Bits 5~3) Number of package ranks per DIMM. Package ranks per DIMM refers to -/// the collections of devices on the module sharing common chip select -/// signals. +/// @note Temperature sensor readout. This is for DDR4 MRS3. Computed in mss_eff_cnfg. +/// Each memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// firmware notes: +/// none /// -inline fapi2::ReturnCode eff_num_master_ranks_per_dimm(const fapi2::Target& i_target, - uint8_t* o_array) +inline fapi2::ReturnCode eff_temp_readout(const fapi2::Target& i_target, uint8_t& o_value) { - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); + uint8_t l_value[2]; + auto l_mca = i_target.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_TEMP_READOUT, l_mca.getParent(), l_value) ); + o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_TEMP_READOUT: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM getter +/// @brief ATTR_EFF_TEMP_READOUT getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) +/// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Specifies the number of master ranks per DIMM. Represents the number of physical -/// ranks on a DIMM. From SPD spec JEDEC Standard No. 21-C: Page 4.1.2.L-4. Byte 12 -/// (Bits 5~3) Number of package ranks per DIMM. Package ranks per DIMM refers to -/// the collections of devices on the module sharing common chip select -/// signals. +/// @note Temperature sensor readout. This is for DDR4 MRS3. Computed in mss_eff_cnfg. +/// Each memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// firmware notes: +/// none /// -inline fapi2::ReturnCode eff_num_master_ranks_per_dimm(const fapi2::Target& i_target, - uint8_t* o_array) +inline fapi2::ReturnCode eff_temp_readout(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -5376,89 +5247,81 @@ inline fapi2::ReturnCode eff_num_master_ranks_per_dimm(const fapi2::Target +/// @brief ATTR_EFF_CRC_WR_LATENCY getter +/// @param[in] const ref to the fapi2::Target /// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) +/// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Bit wise representation of master ranks in each DIMM that are used for reads and -/// writes. Used by -/// PRD. -/// -inline fapi2::ReturnCode eff_dimm_ranks_configed(const fapi2::Target& i_target, - uint8_t& o_value) +/// @note write latency for CRC and DM. This is for DDR4 MRS3. Computed in mss_eff_cnfg. +/// Each memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// firmware notes: +/// none +/// +inline fapi2::ReturnCode eff_crc_wr_latency(const fapi2::Target& i_target, uint8_t& o_value) { - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); + uint8_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_RANKS_CONFIGED, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_CRC_WR_LATENCY, i_target.getParent(), l_value) ); + o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_RANKS_CONFIGED: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_CRC_WR_LATENCY: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_RANKS_CONFIGED getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) +/// @brief ATTR_EFF_CRC_WR_LATENCY getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint8_t +/// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Bit wise representation of master ranks in each DIMM that are used for reads and -/// writes. Used by -/// PRD. +/// @note write latency for CRC and DM. This is for DDR4 MRS3. Computed in mss_eff_cnfg. +/// Each memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// firmware notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ranks_configed(const fapi2::Target& i_target, - uint8_t* o_array) +inline fapi2::ReturnCode eff_crc_wr_latency(const fapi2::Target& i_target, uint8_t& o_value) { - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); + uint8_t l_value[2]; + auto l_mca = i_target.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_RANKS_CONFIGED, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_CRC_WR_LATENCY, l_mca.getParent(), l_value) ); + o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_RANKS_CONFIGED: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_CRC_WR_LATENCY: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_RANKS_CONFIGED getter +/// @brief ATTR_EFF_CRC_WR_LATENCY getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) +/// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Bit wise representation of master ranks in each DIMM that are used for reads and -/// writes. Used by -/// PRD. +/// @note write latency for CRC and DM. This is for DDR4 MRS3. Computed in mss_eff_cnfg. +/// Each memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// firmware notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ranks_configed(const fapi2::Target& i_target, - uint8_t* o_array) +inline fapi2::ReturnCode eff_crc_wr_latency(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -5466,83 +5329,81 @@ inline fapi2::ReturnCode eff_dimm_ranks_configed(const fapi2::Target +/// @brief ATTR_EFF_MPR_RD_FORMAT getter +/// @param[in] const ref to the fapi2::Target /// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) +/// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Specifies the number of DRAM dies per -/// package. +/// @note MPR READ FORMAT. This is for DDR4 MRS3. Computed in mss_eff_cnfg. Each memory +/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware +/// notes: +/// none /// -inline fapi2::ReturnCode eff_prim_die_count(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_mpr_rd_format(const fapi2::Target& i_target, uint8_t& o_value) { - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); + uint8_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_PRIM_DIE_COUNT, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_MPR_RD_FORMAT, i_target.getParent(), l_value) ); + o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_PRIM_DIE_COUNT: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_MPR_RD_FORMAT: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_PRIM_DIE_COUNT getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) +/// @brief ATTR_EFF_MPR_RD_FORMAT getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint8_t +/// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Specifies the number of DRAM dies per -/// package. +/// @note MPR READ FORMAT. This is for DDR4 MRS3. Computed in mss_eff_cnfg. Each memory +/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware +/// notes: +/// none /// -inline fapi2::ReturnCode eff_prim_die_count(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_mpr_rd_format(const fapi2::Target& i_target, uint8_t& o_value) { - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); + uint8_t l_value[2]; + auto l_mca = i_target.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_PRIM_DIE_COUNT, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_MPR_RD_FORMAT, l_mca.getParent(), l_value) ); + o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_PRIM_DIE_COUNT: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_MPR_RD_FORMAT: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_PRIM_DIE_COUNT getter +/// @brief ATTR_EFF_MPR_RD_FORMAT getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) +/// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Specifies the number of DRAM dies per -/// package. +/// @note MPR READ FORMAT. This is for DDR4 MRS3. Computed in mss_eff_cnfg. Each memory +/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware +/// notes: +/// none /// -inline fapi2::ReturnCode eff_prim_die_count(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_mpr_rd_format(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -5550,80 +5411,82 @@ inline fapi2::ReturnCode eff_prim_die_count(const fapi2::Target -/// @param[out] ref to the value uint16_t +/// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note This is the throttled N commands per window of M DRAM clocks setting for -/// cfg_nm_n_per_port. +/// @note Max Power down mode. This is for DDR4 MRS4. Computed in mss_eff_cnfg. Each +/// memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// firmware notes: +/// none /// -inline fapi2::ReturnCode mem_throttled_n_commands_per_port(const fapi2::Target& i_target, - uint16_t& o_value) +inline fapi2::ReturnCode eff_max_powerdown_mode(const fapi2::Target& i_target, uint8_t& o_value) { - uint16_t l_value[2]; + uint8_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_MEM_THROTTLED_N_COMMANDS_PER_PORT, i_target.getParent(), - l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_MAX_POWERDOWN_MODE, i_target.getParent(), l_value) ); o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_MEM_THROTTLED_N_COMMANDS_PER_PORT: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_MAX_POWERDOWN_MODE: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_MSS_MEM_THROTTLED_N_COMMANDS_PER_PORT getter +/// @brief ATTR_EFF_MAX_POWERDOWN_MODE getter /// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint16_t +/// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note This is the throttled N commands per window of M DRAM clocks setting for -/// cfg_nm_n_per_port. +/// @note Max Power down mode. This is for DDR4 MRS4. Computed in mss_eff_cnfg. Each +/// memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// firmware notes: +/// none /// -inline fapi2::ReturnCode mem_throttled_n_commands_per_port(const fapi2::Target& i_target, - uint16_t& o_value) +inline fapi2::ReturnCode eff_max_powerdown_mode(const fapi2::Target& i_target, + uint8_t& o_value) { - uint16_t l_value[2]; + uint8_t l_value[2]; auto l_mca = i_target.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_MEM_THROTTLED_N_COMMANDS_PER_PORT, l_mca.getParent(), - l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_MAX_POWERDOWN_MODE, l_mca.getParent(), l_value) ); o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_MEM_THROTTLED_N_COMMANDS_PER_PORT: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_MAX_POWERDOWN_MODE: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_MSS_MEM_THROTTLED_N_COMMANDS_PER_PORT getter +/// @brief ATTR_EFF_MAX_POWERDOWN_MODE getter /// @param[in] const ref to the fapi2::Target -/// @param[out] uint16_t* memory to store the value +/// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note This is the throttled N commands per window of M DRAM clocks setting for -/// cfg_nm_n_per_port. +/// @note Max Power down mode. This is for DDR4 MRS4. Computed in mss_eff_cnfg. Each +/// memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// firmware notes: +/// none /// -inline fapi2::ReturnCode mem_throttled_n_commands_per_port(const fapi2::Target& i_target, - uint16_t* o_array) +inline fapi2::ReturnCode eff_max_powerdown_mode(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -5631,100 +5494,84 @@ inline fapi2::ReturnCode mem_throttled_n_commands_per_port(const fapi2::Target +/// @param[out] ref to the value uint8_t +/// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note This is the fapi position of the port that failed to calculate memory throttles -/// given the passed in watt target and or -/// utilization +/// @note Internal Vref Monitor. This is for DDR4 MRS4. Computed in mss_eff_cnfg. Each +/// memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// firmware notes: +/// none /// -inline fapi2::ReturnCode mem_port_fail_throttle(uint64_t& o_value) +inline fapi2::ReturnCode eff_internal_vref_monitor(const fapi2::Target& i_target, + uint8_t& o_value) { + uint8_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_MEM_PORT_POS_OF_FAIL_THROTTLE, fapi2::Target(), - o_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_INTERNAL_VREF_MONITOR, i_target.getParent(), l_value) ); + o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_MEM_PORT_POS_OF_FAIL_THROTTLE: 0x%lx (system target)", - uint64_t(fapi2::current_err)); + FAPI_ERR("failed accessing ATTR_EFF_INTERNAL_VREF_MONITOR: 0x%lx (target: %s)", + uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_MSS_MEM_M_DRAM_CLOCKS getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint32_t -/// @note Generated by gen_accessors.pl generateParameters (D) +/// @brief ATTR_EFF_INTERNAL_VREF_MONITOR getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint8_t +/// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note This is the throttled M DRAM clocks setting for cfg_nm_m. creator: mss_eff_cnfg -/// consumer: mss_eff_config_thermal firmware notes: +/// @note Internal Vref Monitor. This is for DDR4 MRS4. Computed in mss_eff_cnfg. Each +/// memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// firmware notes: /// none /// -inline fapi2::ReturnCode mem_m_dram_clocks(const fapi2::Target& i_target, uint32_t& o_value) +inline fapi2::ReturnCode eff_internal_vref_monitor(const fapi2::Target& i_target, + uint8_t& o_value) { - uint32_t l_value[2]; + uint8_t l_value[2]; + auto l_mca = i_target.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_MEM_M_DRAM_CLOCKS, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_INTERNAL_VREF_MONITOR, l_mca.getParent(), l_value) ); + o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_MEM_M_DRAM_CLOCKS: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_INTERNAL_VREF_MONITOR: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_MSS_MEM_M_DRAM_CLOCKS getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint32_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note This is the throttled M DRAM clocks setting for cfg_nm_m. creator: mss_eff_cnfg -/// consumer: mss_eff_config_thermal firmware notes: -/// none -/// -inline fapi2::ReturnCode mem_m_dram_clocks(const fapi2::Target& i_target, uint32_t& o_value) -{ - uint32_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_MEM_M_DRAM_CLOCKS, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_MEM_M_DRAM_CLOCKS: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_MEM_M_DRAM_CLOCKS getter +/// @brief ATTR_EFF_INTERNAL_VREF_MONITOR getter /// @param[in] const ref to the fapi2::Target -/// @param[out] uint32_t* memory to store the value +/// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note This is the throttled M DRAM clocks setting for cfg_nm_m. creator: mss_eff_cnfg -/// consumer: mss_eff_config_thermal firmware notes: +/// @note Internal Vref Monitor. This is for DDR4 MRS4. Computed in mss_eff_cnfg. Each +/// memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// firmware notes: /// none /// -inline fapi2::ReturnCode mem_m_dram_clocks(const fapi2::Target& i_target, uint32_t* o_array) +inline fapi2::ReturnCode eff_internal_vref_monitor(const fapi2::Target& i_target, + uint8_t* o_array) { if (o_array == nullptr) { @@ -5732,7195 +5579,81 @@ inline fapi2::ReturnCode mem_m_dram_clocks(const fapi2::Target -/// @param[out] ref to the value uint16_t +/// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note This is the throttle numerator setting for -/// cfg_nm_n_per_slot +/// @note CS to CMD/ADDR Latency. This is for DDR4 MRS4. Computed in mss_eff_cnfg. Each +/// memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// firmware notes: +/// none /// -inline fapi2::ReturnCode mem_throttled_n_commands_per_slot(const fapi2::Target& i_target, - uint16_t& o_value) +inline fapi2::ReturnCode eff_cs_cmd_latency(const fapi2::Target& i_target, uint8_t& o_value) { - uint16_t l_value[2]; + uint8_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_MEM_THROTTLED_N_COMMANDS_PER_SLOT, i_target.getParent(), - l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_CS_CMD_LATENCY, i_target.getParent(), l_value) ); o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_MEM_THROTTLED_N_COMMANDS_PER_SLOT: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_MEM_THROTTLED_N_COMMANDS_PER_SLOT getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint16_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note This is the throttle numerator setting for -/// cfg_nm_n_per_slot -/// -inline fapi2::ReturnCode mem_throttled_n_commands_per_slot(const fapi2::Target& i_target, - uint16_t& o_value) -{ - uint16_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_MEM_THROTTLED_N_COMMANDS_PER_SLOT, l_mca.getParent(), - l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_MEM_THROTTLED_N_COMMANDS_PER_SLOT: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_MEM_THROTTLED_N_COMMANDS_PER_SLOT getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint16_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note This is the throttle numerator setting for -/// cfg_nm_n_per_slot -/// -inline fapi2::ReturnCode mem_throttled_n_commands_per_slot(const fapi2::Target& i_target, - uint16_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint16_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_MEM_THROTTLED_N_COMMANDS_PER_SLOT, i_target, l_value) ); - memcpy(o_array, &l_value, 4); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_MEM_THROTTLED_N_COMMANDS_PER_SLOT: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_MEM_WATT_TARGET getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint32_t -/// @note Generated by gen_accessors.pl generateParameters (F) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Total memory power used to throttle for each dimm Used to compute the throttles -/// on the channel and/or dimms for OCC OCC sets after IPL creator: mss_eff_config -/// consumer: mss_bulk_pwr_throttle, mss_utils_to_throttle firmware notes: -/// none. -/// -inline fapi2::ReturnCode mem_watt_target(const fapi2::Target& i_target, uint32_t& o_value) -{ - uint32_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_MEM_WATT_TARGET, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_MEM_WATT_TARGET: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_MEM_WATT_TARGET getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint32_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Total memory power used to throttle for each dimm Used to compute the throttles -/// on the channel and/or dimms for OCC OCC sets after IPL creator: mss_eff_config -/// consumer: mss_bulk_pwr_throttle, mss_utils_to_throttle firmware notes: -/// none. -/// -inline fapi2::ReturnCode mem_watt_target(const fapi2::Target& i_target, uint32_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint32_t l_value[2][2]; - auto l_mcs = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_MEM_WATT_TARGET, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 8); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_MEM_WATT_TARGET: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_MEM_WATT_TARGET getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint32_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Total memory power used to throttle for each dimm Used to compute the throttles -/// on the channel and/or dimms for OCC OCC sets after IPL creator: mss_eff_config -/// consumer: mss_bulk_pwr_throttle, mss_utils_to_throttle firmware notes: -/// none. -/// -inline fapi2::ReturnCode mem_watt_target(const fapi2::Target& i_target, uint32_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint32_t l_value[2][2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_MEM_WATT_TARGET, i_target, l_value) ); - memcpy(o_array, &l_value, 16); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_MEM_WATT_TARGET: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_CS_CMD_LATENCY: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_MSS_TOTAL_PWR_SLOPE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint16_t -/// @note Generated by gen_accessors.pl generateParameters (F) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note VDDR+VPP Power slope value for dimm creator: mss_eff_config consumer: -/// mss_bulk_pwr_throttles -/// -inline fapi2::ReturnCode total_pwr_slope(const fapi2::Target& i_target, uint16_t& o_value) -{ - uint16_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_TOTAL_PWR_SLOPE, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_TOTAL_PWR_SLOPE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_TOTAL_PWR_SLOPE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint16_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note VDDR+VPP Power slope value for dimm creator: mss_eff_config consumer: -/// mss_bulk_pwr_throttles -/// -inline fapi2::ReturnCode total_pwr_slope(const fapi2::Target& i_target, uint16_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint16_t l_value[2][2]; - auto l_mcs = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_TOTAL_PWR_SLOPE, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 4); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_TOTAL_PWR_SLOPE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_TOTAL_PWR_SLOPE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint16_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note VDDR+VPP Power slope value for dimm creator: mss_eff_config consumer: -/// mss_bulk_pwr_throttles -/// -inline fapi2::ReturnCode total_pwr_slope(const fapi2::Target& i_target, uint16_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint16_t l_value[2][2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_TOTAL_PWR_SLOPE, i_target, l_value) ); - memcpy(o_array, &l_value, 8); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_TOTAL_PWR_SLOPE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_TOTAL_PWR_INTERCEPT getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint16_t -/// @note Generated by gen_accessors.pl generateParameters (F) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note VDDR+VPP Power intercept value for dimm creator: mss_eff_config consumer: -/// mss_bulk_pwr_throttles -/// -inline fapi2::ReturnCode total_pwr_intercept(const fapi2::Target& i_target, uint16_t& o_value) -{ - uint16_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_TOTAL_PWR_INTERCEPT, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_TOTAL_PWR_INTERCEPT: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_TOTAL_PWR_INTERCEPT getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint16_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note VDDR+VPP Power intercept value for dimm creator: mss_eff_config consumer: -/// mss_bulk_pwr_throttles -/// -inline fapi2::ReturnCode total_pwr_intercept(const fapi2::Target& i_target, uint16_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint16_t l_value[2][2]; - auto l_mcs = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_TOTAL_PWR_INTERCEPT, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 4); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_TOTAL_PWR_INTERCEPT: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_TOTAL_PWR_INTERCEPT getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint16_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note VDDR+VPP Power intercept value for dimm creator: mss_eff_config consumer: -/// mss_bulk_pwr_throttles -/// -inline fapi2::ReturnCode total_pwr_intercept(const fapi2::Target& i_target, uint16_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint16_t l_value[2][2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_TOTAL_PWR_INTERCEPT, i_target, l_value) ); - memcpy(o_array, &l_value, 8); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_TOTAL_PWR_INTERCEPT: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_DIMM_MAXBANDWIDTH_GBS getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint32_t -/// @note Generated by gen_accessors.pl generateParameters (F) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DIMM Max Bandwidth in GBs output from thermal -/// procedures -/// -inline fapi2::ReturnCode dimm_maxbandwidth_gbs(const fapi2::Target& i_target, - uint32_t& o_value) -{ - uint32_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_DIMM_MAXBANDWIDTH_GBS, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_DIMM_MAXBANDWIDTH_GBS: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_DIMM_MAXBANDWIDTH_GBS getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint32_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DIMM Max Bandwidth in GBs output from thermal -/// procedures -/// -inline fapi2::ReturnCode dimm_maxbandwidth_gbs(const fapi2::Target& i_target, uint32_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint32_t l_value[2][2]; - auto l_mcs = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_DIMM_MAXBANDWIDTH_GBS, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 8); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_DIMM_MAXBANDWIDTH_GBS: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_DIMM_MAXBANDWIDTH_GBS getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint32_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DIMM Max Bandwidth in GBs output from thermal -/// procedures -/// -inline fapi2::ReturnCode dimm_maxbandwidth_gbs(const fapi2::Target& i_target, uint32_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint32_t l_value[2][2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_DIMM_MAXBANDWIDTH_GBS, i_target, l_value) ); - memcpy(o_array, &l_value, 16); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_DIMM_MAXBANDWIDTH_GBS: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_DIMM_MAXBANDWIDTH_MRS getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint32_t -/// @note Generated by gen_accessors.pl generateParameters (F) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DIMM Max Bandwidth in MRs output from thermal -/// procedures -/// -inline fapi2::ReturnCode dimm_maxbandwidth_mrs(const fapi2::Target& i_target, - uint32_t& o_value) -{ - uint32_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_DIMM_MAXBANDWIDTH_MRS, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_DIMM_MAXBANDWIDTH_MRS: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_DIMM_MAXBANDWIDTH_MRS getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint32_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DIMM Max Bandwidth in MRs output from thermal -/// procedures -/// -inline fapi2::ReturnCode dimm_maxbandwidth_mrs(const fapi2::Target& i_target, uint32_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint32_t l_value[2][2]; - auto l_mcs = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_DIMM_MAXBANDWIDTH_MRS, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 8); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_DIMM_MAXBANDWIDTH_MRS: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_DIMM_MAXBANDWIDTH_MRS getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint32_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DIMM Max Bandwidth in MRs output from thermal -/// procedures -/// -inline fapi2::ReturnCode dimm_maxbandwidth_mrs(const fapi2::Target& i_target, uint32_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint32_t l_value[2][2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_DIMM_MAXBANDWIDTH_MRS, i_target, l_value) ); - memcpy(o_array, &l_value, 16); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_DIMM_MAXBANDWIDTH_MRS: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_CHANNEL_PAIR_MAXBANDWIDTH_GBS getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint32_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Channel Pair Max Bandwidth in GBs output from thermal -/// procedures -/// -inline fapi2::ReturnCode channel_pair_maxbandwidth_gbs(const fapi2::Target& i_target, - uint32_t& o_value) -{ - uint32_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_CHANNEL_PAIR_MAXBANDWIDTH_GBS, i_target.getParent(), - l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_CHANNEL_PAIR_MAXBANDWIDTH_GBS: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_CHANNEL_PAIR_MAXBANDWIDTH_GBS getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint32_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Channel Pair Max Bandwidth in GBs output from thermal -/// procedures -/// -inline fapi2::ReturnCode channel_pair_maxbandwidth_gbs(const fapi2::Target& i_target, - uint32_t& o_value) -{ - uint32_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_CHANNEL_PAIR_MAXBANDWIDTH_GBS, l_mca.getParent(), - l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_CHANNEL_PAIR_MAXBANDWIDTH_GBS: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_CHANNEL_PAIR_MAXBANDWIDTH_GBS getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint32_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Channel Pair Max Bandwidth in GBs output from thermal -/// procedures -/// -inline fapi2::ReturnCode channel_pair_maxbandwidth_gbs(const fapi2::Target& i_target, - uint32_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint32_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_CHANNEL_PAIR_MAXBANDWIDTH_GBS, i_target, l_value) ); - memcpy(o_array, &l_value, 8); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_CHANNEL_PAIR_MAXBANDWIDTH_GBS: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_CHANNEL_PAIR_MAXBANDWIDTH_MRS getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint32_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Channel Pair Max Bandwidth MRs output from thermal -/// procedures -/// -inline fapi2::ReturnCode channel_pair_maxbandwidth_mrs(const fapi2::Target& i_target, - uint32_t& o_value) -{ - uint32_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_CHANNEL_PAIR_MAXBANDWIDTH_MRS, i_target.getParent(), - l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_CHANNEL_PAIR_MAXBANDWIDTH_MRS: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_CHANNEL_PAIR_MAXBANDWIDTH_MRS getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint32_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Channel Pair Max Bandwidth MRs output from thermal -/// procedures -/// -inline fapi2::ReturnCode channel_pair_maxbandwidth_mrs(const fapi2::Target& i_target, - uint32_t& o_value) -{ - uint32_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_CHANNEL_PAIR_MAXBANDWIDTH_MRS, l_mca.getParent(), - l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_CHANNEL_PAIR_MAXBANDWIDTH_MRS: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_CHANNEL_PAIR_MAXBANDWIDTH_MRS getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint32_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Channel Pair Max Bandwidth MRs output from thermal -/// procedures -/// -inline fapi2::ReturnCode channel_pair_maxbandwidth_mrs(const fapi2::Target& i_target, - uint32_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint32_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_CHANNEL_PAIR_MAXBANDWIDTH_MRS, i_target, l_value) ); - memcpy(o_array, &l_value, 8); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_CHANNEL_PAIR_MAXBANDWIDTH_MRS: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_DIMM_MAXPOWER getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint32_t -/// @note Generated by gen_accessors.pl generateParameters (F) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DIMM Max Power output from thermal -/// procedures -/// -inline fapi2::ReturnCode dimm_maxpower(const fapi2::Target& i_target, uint32_t& o_value) -{ - uint32_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_DIMM_MAXPOWER, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_DIMM_MAXPOWER: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_DIMM_MAXPOWER getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint32_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DIMM Max Power output from thermal -/// procedures -/// -inline fapi2::ReturnCode dimm_maxpower(const fapi2::Target& i_target, uint32_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint32_t l_value[2][2]; - auto l_mcs = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_DIMM_MAXPOWER, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 8); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_DIMM_MAXPOWER: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_DIMM_MAXPOWER getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint32_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DIMM Max Power output from thermal -/// procedures -/// -inline fapi2::ReturnCode dimm_maxpower(const fapi2::Target& i_target, uint32_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint32_t l_value[2][2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_DIMM_MAXPOWER, i_target, l_value) ); - memcpy(o_array, &l_value, 16); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_DIMM_MAXPOWER: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_DATABUS_UTIL getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint32_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Databus utilization per port limit used to calculate memory throttles and power -/// limit creator: OCC consumer: -/// mss_utils_to_throttle -/// -inline fapi2::ReturnCode databus_util(const fapi2::Target& i_target, uint32_t& o_value) -{ - uint32_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_DATABUS_UTIL, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_DATABUS_UTIL: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_DATABUS_UTIL getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint32_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Databus utilization per port limit used to calculate memory throttles and power -/// limit creator: OCC consumer: -/// mss_utils_to_throttle -/// -inline fapi2::ReturnCode databus_util(const fapi2::Target& i_target, uint32_t& o_value) -{ - uint32_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_DATABUS_UTIL, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_DATABUS_UTIL: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_DATABUS_UTIL getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint32_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Databus utilization per port limit used to calculate memory throttles and power -/// limit creator: OCC consumer: -/// mss_utils_to_throttle -/// -inline fapi2::ReturnCode databus_util(const fapi2::Target& i_target, uint32_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint32_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_DATABUS_UTIL, i_target, l_value) ); - memcpy(o_array, &l_value, 8); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_DATABUS_UTIL: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_PORT_MAXPOWER getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint32_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Channel Pair Max Power output from thermal -/// procedures -/// -inline fapi2::ReturnCode port_maxpower(const fapi2::Target& i_target, uint32_t& o_value) -{ - uint32_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_PORT_MAXPOWER, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_PORT_MAXPOWER: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_PORT_MAXPOWER getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint32_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Channel Pair Max Power output from thermal -/// procedures -/// -inline fapi2::ReturnCode port_maxpower(const fapi2::Target& i_target, uint32_t& o_value) -{ - uint32_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_PORT_MAXPOWER, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_PORT_MAXPOWER: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_PORT_MAXPOWER getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint32_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Channel Pair Max Power output from thermal -/// procedures -/// -inline fapi2::ReturnCode port_maxpower(const fapi2::Target& i_target, uint32_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint32_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_PORT_MAXPOWER, i_target, l_value) ); - memcpy(o_array, &l_value, 8); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_PORT_MAXPOWER: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_DIMM_THERMAL_LIMIT getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint32_t -/// @note Generated by gen_accessors.pl generateParameters (F) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DIMM Max Power based on a thermal limit Decoded from -/// ATTR_MSS_MRW_THERMAL_POWER_LIMIT -/// -inline fapi2::ReturnCode dimm_thermal_limit(const fapi2::Target& i_target, uint32_t& o_value) -{ - uint32_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_DIMM_THERMAL_LIMIT, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_DIMM_THERMAL_LIMIT: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_DIMM_THERMAL_LIMIT getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint32_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DIMM Max Power based on a thermal limit Decoded from -/// ATTR_MSS_MRW_THERMAL_POWER_LIMIT -/// -inline fapi2::ReturnCode dimm_thermal_limit(const fapi2::Target& i_target, uint32_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint32_t l_value[2][2]; - auto l_mcs = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_DIMM_THERMAL_LIMIT, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 8); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_DIMM_THERMAL_LIMIT: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_DIMM_THERMAL_LIMIT getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint32_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DIMM Max Power based on a thermal limit Decoded from -/// ATTR_MSS_MRW_THERMAL_POWER_LIMIT -/// -inline fapi2::ReturnCode dimm_thermal_limit(const fapi2::Target& i_target, uint32_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint32_t l_value[2][2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_DIMM_THERMAL_LIMIT, i_target, l_value) ); - memcpy(o_array, &l_value, 16); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_DIMM_THERMAL_LIMIT: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_RUNTIME_MEM_THROTTLED_N_COMMANDS_PER_PORT getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint16_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Runtime throttled N commands per M DRAM clocks setting for -/// cfg_nm_n_per_port. -/// -inline fapi2::ReturnCode runtime_mem_throttled_n_commands_per_port(const fapi2::Target& - i_target, uint16_t& o_value) -{ - uint16_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_RUNTIME_MEM_THROTTLED_N_COMMANDS_PER_PORT, - i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_RUNTIME_MEM_THROTTLED_N_COMMANDS_PER_PORT: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_RUNTIME_MEM_THROTTLED_N_COMMANDS_PER_PORT getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint16_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Runtime throttled N commands per M DRAM clocks setting for -/// cfg_nm_n_per_port. -/// -inline fapi2::ReturnCode runtime_mem_throttled_n_commands_per_port(const fapi2::Target& - i_target, uint16_t& o_value) -{ - uint16_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_RUNTIME_MEM_THROTTLED_N_COMMANDS_PER_PORT, - l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_RUNTIME_MEM_THROTTLED_N_COMMANDS_PER_PORT: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_RUNTIME_MEM_THROTTLED_N_COMMANDS_PER_PORT getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint16_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Runtime throttled N commands per M DRAM clocks setting for -/// cfg_nm_n_per_port. -/// -inline fapi2::ReturnCode runtime_mem_throttled_n_commands_per_port(const fapi2::Target& - i_target, uint16_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint16_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_RUNTIME_MEM_THROTTLED_N_COMMANDS_PER_PORT, i_target, l_value) ); - memcpy(o_array, &l_value, 4); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_RUNTIME_MEM_THROTTLED_N_COMMANDS_PER_PORT: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_RUNTIME_MEM_M_DRAM_CLOCKS getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint32_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Runtime for M DRAM clocks setting for -/// cfg_nm_m -/// -inline fapi2::ReturnCode runtime_mem_m_dram_clocks(const fapi2::Target& i_target, - uint32_t& o_value) -{ - uint32_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_RUNTIME_MEM_M_DRAM_CLOCKS, i_target.getParent(), - l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_RUNTIME_MEM_M_DRAM_CLOCKS: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_RUNTIME_MEM_M_DRAM_CLOCKS getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint32_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Runtime for M DRAM clocks setting for -/// cfg_nm_m -/// -inline fapi2::ReturnCode runtime_mem_m_dram_clocks(const fapi2::Target& i_target, - uint32_t& o_value) -{ - uint32_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_RUNTIME_MEM_M_DRAM_CLOCKS, l_mca.getParent(), - l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_RUNTIME_MEM_M_DRAM_CLOCKS: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_RUNTIME_MEM_M_DRAM_CLOCKS getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint32_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Runtime for M DRAM clocks setting for -/// cfg_nm_m -/// -inline fapi2::ReturnCode runtime_mem_m_dram_clocks(const fapi2::Target& i_target, - uint32_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint32_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_RUNTIME_MEM_M_DRAM_CLOCKS, i_target, l_value) ); - memcpy(o_array, &l_value, 8); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_RUNTIME_MEM_M_DRAM_CLOCKS: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_RUNTIME_MEM_THROTTLED_N_COMMANDS_PER_SLOT getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint16_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Runtime throttle numerator setting for -/// cfg_nm_n_per_slot -/// -inline fapi2::ReturnCode runtime_mem_throttled_n_commands_per_slot(const fapi2::Target& - i_target, uint16_t& o_value) -{ - uint16_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_RUNTIME_MEM_THROTTLED_N_COMMANDS_PER_SLOT, - i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_RUNTIME_MEM_THROTTLED_N_COMMANDS_PER_SLOT: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_RUNTIME_MEM_THROTTLED_N_COMMANDS_PER_SLOT getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint16_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Runtime throttle numerator setting for -/// cfg_nm_n_per_slot -/// -inline fapi2::ReturnCode runtime_mem_throttled_n_commands_per_slot(const fapi2::Target& - i_target, uint16_t& o_value) -{ - uint16_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_RUNTIME_MEM_THROTTLED_N_COMMANDS_PER_SLOT, - l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_RUNTIME_MEM_THROTTLED_N_COMMANDS_PER_SLOT: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_RUNTIME_MEM_THROTTLED_N_COMMANDS_PER_SLOT getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint16_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Runtime throttle numerator setting for -/// cfg_nm_n_per_slot -/// -inline fapi2::ReturnCode runtime_mem_throttled_n_commands_per_slot(const fapi2::Target& - i_target, uint16_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint16_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_RUNTIME_MEM_THROTTLED_N_COMMANDS_PER_SLOT, i_target, l_value) ); - memcpy(o_array, &l_value, 4); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_RUNTIME_MEM_THROTTLED_N_COMMANDS_PER_SLOT: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_EFF_DIMM_FUNCTIONAL_VECTOR getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note A bit vector (per Dean's request) specifying if a DIMM is functional. DIMM -/// attributes, such as SIZE, are qualified by this bit vector. The attribute ANDed -/// 0x80 means port 0, DIMM 0 is functional, 0x40 means port 0, DIMM 1 is -/// functional. 0x08 means port 1, DIMM 0 is functional and 0x04 means port 1 DIMM 1 -/// is functional. A fully populated system would have the value of 0xCC. Used in -/// various locations and is computed in mss_eff_cnfg. Each memory channel will have -/// a value. creator: mss_eff_cnfg consumer: various firmware notes: none This -/// factors in -/// functionality -/// -inline fapi2::ReturnCode eff_dimm_functional_vector(const fapi2::Target& i_target, - uint8_t& o_value) -{ - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_EFF_DIMM_FUNCTIONAL_VECTOR, i_target.getParent(), - l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_EFF_DIMM_FUNCTIONAL_VECTOR: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_EFF_DIMM_FUNCTIONAL_VECTOR getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note A bit vector (per Dean's request) specifying if a DIMM is functional. DIMM -/// attributes, such as SIZE, are qualified by this bit vector. The attribute ANDed -/// 0x80 means port 0, DIMM 0 is functional, 0x40 means port 0, DIMM 1 is -/// functional. 0x08 means port 1, DIMM 0 is functional and 0x04 means port 1 DIMM 1 -/// is functional. A fully populated system would have the value of 0xCC. Used in -/// various locations and is computed in mss_eff_cnfg. Each memory channel will have -/// a value. creator: mss_eff_cnfg consumer: various firmware notes: none This -/// factors in -/// functionality -/// -inline fapi2::ReturnCode eff_dimm_functional_vector(const fapi2::Target& i_target, - uint8_t& o_value) -{ - uint8_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_EFF_DIMM_FUNCTIONAL_VECTOR, l_mca.getParent(), - l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_EFF_DIMM_FUNCTIONAL_VECTOR: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_EFF_DIMM_FUNCTIONAL_VECTOR getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note A bit vector (per Dean's request) specifying if a DIMM is functional. DIMM -/// attributes, such as SIZE, are qualified by this bit vector. The attribute ANDed -/// 0x80 means port 0, DIMM 0 is functional, 0x40 means port 0, DIMM 1 is -/// functional. 0x08 means port 1, DIMM 0 is functional and 0x04 means port 1 DIMM 1 -/// is functional. A fully populated system would have the value of 0xCC. Used in -/// various locations and is computed in mss_eff_cnfg. Each memory channel will have -/// a value. creator: mss_eff_cnfg consumer: various firmware notes: none This -/// factors in -/// functionality -/// -inline fapi2::ReturnCode eff_dimm_functional_vector(const fapi2::Target& i_target, - uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_EFF_DIMM_FUNCTIONAL_VECTOR, i_target, l_value) ); - memcpy(o_array, &l_value, 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_EFF_DIMM_FUNCTIONAL_VECTOR: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DRAM_LPASR getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Low Power Auto Self-Refresh. This is for DDR4 MRS2. Computed in mss_eff_cnfg. -/// Each memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_dram_lpasr(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_LPASR, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_LPASR: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DRAM_LPASR getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Low Power Auto Self-Refresh. This is for DDR4 MRS2. Computed in mss_eff_cnfg. -/// Each memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_dram_lpasr(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_LPASR, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_LPASR: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DRAM_LPASR getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Low Power Auto Self-Refresh. This is for DDR4 MRS2. Computed in mss_eff_cnfg. -/// Each memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_dram_lpasr(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_LPASR, i_target, l_value) ); - memcpy(o_array, &l_value, 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_LPASR: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_MPR_PAGE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note MPR Page Selection This is for DDR4 MRS3. Computed in mss_eff_cnfg. Each memory -/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware -/// notes: -/// none -/// -inline fapi2::ReturnCode eff_mpr_page(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_MPR_PAGE, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_MPR_PAGE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_MPR_PAGE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note MPR Page Selection This is for DDR4 MRS3. Computed in mss_eff_cnfg. Each memory -/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware -/// notes: -/// none -/// -inline fapi2::ReturnCode eff_mpr_page(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_MPR_PAGE, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_MPR_PAGE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_MPR_PAGE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note MPR Page Selection This is for DDR4 MRS3. Computed in mss_eff_cnfg. Each memory -/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware -/// notes: -/// none -/// -inline fapi2::ReturnCode eff_mpr_page(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_MPR_PAGE, i_target, l_value) ); - memcpy(o_array, &l_value, 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_MPR_PAGE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_GEARDOWN_MODE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Gear Down Mode. This is for DDR4 MRS3. Computed in mss_eff_cnfg. Each memory -/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware -/// notes: -/// none -/// -inline fapi2::ReturnCode eff_geardown_mode(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_GEARDOWN_MODE, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_GEARDOWN_MODE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_GEARDOWN_MODE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Gear Down Mode. This is for DDR4 MRS3. Computed in mss_eff_cnfg. Each memory -/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware -/// notes: -/// none -/// -inline fapi2::ReturnCode eff_geardown_mode(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_GEARDOWN_MODE, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_GEARDOWN_MODE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_GEARDOWN_MODE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Gear Down Mode. This is for DDR4 MRS3. Computed in mss_eff_cnfg. Each memory -/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware -/// notes: -/// none -/// -inline fapi2::ReturnCode eff_geardown_mode(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_GEARDOWN_MODE, i_target, l_value) ); - memcpy(o_array, &l_value, 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_GEARDOWN_MODE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_PER_DRAM_ACCESS getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Per DRAM accessibility. This is for DDR4 MRS3. Computed in mss_eff_cnfg. Each -/// memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_per_dram_access(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_PER_DRAM_ACCESS, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_PER_DRAM_ACCESS: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_PER_DRAM_ACCESS getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Per DRAM accessibility. This is for DDR4 MRS3. Computed in mss_eff_cnfg. Each -/// memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_per_dram_access(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_PER_DRAM_ACCESS, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_PER_DRAM_ACCESS: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_PER_DRAM_ACCESS getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Per DRAM accessibility. This is for DDR4 MRS3. Computed in mss_eff_cnfg. Each -/// memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_per_dram_access(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_PER_DRAM_ACCESS, i_target, l_value) ); - memcpy(o_array, &l_value, 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_PER_DRAM_ACCESS: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_TEMP_READOUT getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Temperature sensor readout. This is for DDR4 MRS3. Computed in mss_eff_cnfg. -/// Each memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_temp_readout(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_TEMP_READOUT, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_TEMP_READOUT: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_TEMP_READOUT getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Temperature sensor readout. This is for DDR4 MRS3. Computed in mss_eff_cnfg. -/// Each memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_temp_readout(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_TEMP_READOUT, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_TEMP_READOUT: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_TEMP_READOUT getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Temperature sensor readout. This is for DDR4 MRS3. Computed in mss_eff_cnfg. -/// Each memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_temp_readout(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_TEMP_READOUT, i_target, l_value) ); - memcpy(o_array, &l_value, 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_TEMP_READOUT: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_CRC_WR_LATENCY getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note write latency for CRC and DM. This is for DDR4 MRS3. Computed in mss_eff_cnfg. -/// Each memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_crc_wr_latency(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_CRC_WR_LATENCY, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_CRC_WR_LATENCY: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_CRC_WR_LATENCY getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note write latency for CRC and DM. This is for DDR4 MRS3. Computed in mss_eff_cnfg. -/// Each memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_crc_wr_latency(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_CRC_WR_LATENCY, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_CRC_WR_LATENCY: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_CRC_WR_LATENCY getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note write latency for CRC and DM. This is for DDR4 MRS3. Computed in mss_eff_cnfg. -/// Each memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_crc_wr_latency(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_CRC_WR_LATENCY, i_target, l_value) ); - memcpy(o_array, &l_value, 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_CRC_WR_LATENCY: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_MPR_RD_FORMAT getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note MPR READ FORMAT. This is for DDR4 MRS3. Computed in mss_eff_cnfg. Each memory -/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware -/// notes: -/// none -/// -inline fapi2::ReturnCode eff_mpr_rd_format(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_MPR_RD_FORMAT, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_MPR_RD_FORMAT: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_MPR_RD_FORMAT getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note MPR READ FORMAT. This is for DDR4 MRS3. Computed in mss_eff_cnfg. Each memory -/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware -/// notes: -/// none -/// -inline fapi2::ReturnCode eff_mpr_rd_format(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_MPR_RD_FORMAT, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_MPR_RD_FORMAT: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_MPR_RD_FORMAT getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note MPR READ FORMAT. This is for DDR4 MRS3. Computed in mss_eff_cnfg. Each memory -/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware -/// notes: -/// none -/// -inline fapi2::ReturnCode eff_mpr_rd_format(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_MPR_RD_FORMAT, i_target, l_value) ); - memcpy(o_array, &l_value, 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_MPR_RD_FORMAT: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_MAX_POWERDOWN_MODE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Max Power down mode. This is for DDR4 MRS4. Computed in mss_eff_cnfg. Each -/// memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_max_powerdown_mode(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_MAX_POWERDOWN_MODE, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_MAX_POWERDOWN_MODE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_MAX_POWERDOWN_MODE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Max Power down mode. This is for DDR4 MRS4. Computed in mss_eff_cnfg. Each -/// memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_max_powerdown_mode(const fapi2::Target& i_target, - uint8_t& o_value) -{ - uint8_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_MAX_POWERDOWN_MODE, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_MAX_POWERDOWN_MODE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_MAX_POWERDOWN_MODE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Max Power down mode. This is for DDR4 MRS4. Computed in mss_eff_cnfg. Each -/// memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_max_powerdown_mode(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_MAX_POWERDOWN_MODE, i_target, l_value) ); - memcpy(o_array, &l_value, 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_MAX_POWERDOWN_MODE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_INTERNAL_VREF_MONITOR getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Internal Vref Monitor. This is for DDR4 MRS4. Computed in mss_eff_cnfg. Each -/// memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_internal_vref_monitor(const fapi2::Target& i_target, - uint8_t& o_value) -{ - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_INTERNAL_VREF_MONITOR, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_INTERNAL_VREF_MONITOR: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_INTERNAL_VREF_MONITOR getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Internal Vref Monitor. This is for DDR4 MRS4. Computed in mss_eff_cnfg. Each -/// memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_internal_vref_monitor(const fapi2::Target& i_target, - uint8_t& o_value) -{ - uint8_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_INTERNAL_VREF_MONITOR, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_INTERNAL_VREF_MONITOR: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_INTERNAL_VREF_MONITOR getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Internal Vref Monitor. This is for DDR4 MRS4. Computed in mss_eff_cnfg. Each -/// memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_internal_vref_monitor(const fapi2::Target& i_target, - uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_INTERNAL_VREF_MONITOR, i_target, l_value) ); - memcpy(o_array, &l_value, 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_INTERNAL_VREF_MONITOR: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_CS_CMD_LATENCY getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note CS to CMD/ADDR Latency. This is for DDR4 MRS4. Computed in mss_eff_cnfg. Each -/// memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_cs_cmd_latency(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_CS_CMD_LATENCY, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_CS_CMD_LATENCY: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_CS_CMD_LATENCY getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note CS to CMD/ADDR Latency. This is for DDR4 MRS4. Computed in mss_eff_cnfg. Each -/// memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_cs_cmd_latency(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_CS_CMD_LATENCY, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_CS_CMD_LATENCY: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_CS_CMD_LATENCY getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note CS to CMD/ADDR Latency. This is for DDR4 MRS4. Computed in mss_eff_cnfg. Each -/// memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_cs_cmd_latency(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_CS_CMD_LATENCY, i_target, l_value) ); - memcpy(o_array, &l_value, 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_CS_CMD_LATENCY: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_SELF_REF_ABORT getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Self Refresh Abort. This is for DDR4 MRS4. Computed in mss_eff_cnfg. Each memory -/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware -/// notes: -/// none -/// -inline fapi2::ReturnCode eff_self_ref_abort(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_SELF_REF_ABORT, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_SELF_REF_ABORT: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_SELF_REF_ABORT getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Self Refresh Abort. This is for DDR4 MRS4. Computed in mss_eff_cnfg. Each memory -/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware -/// notes: -/// none -/// -inline fapi2::ReturnCode eff_self_ref_abort(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_SELF_REF_ABORT, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_SELF_REF_ABORT: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_SELF_REF_ABORT getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Self Refresh Abort. This is for DDR4 MRS4. Computed in mss_eff_cnfg. Each memory -/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware -/// notes: -/// none -/// -inline fapi2::ReturnCode eff_self_ref_abort(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_SELF_REF_ABORT, i_target, l_value) ); - memcpy(o_array, &l_value, 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_SELF_REF_ABORT: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_RD_PREAMBLE_TRAIN getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Read Pre amble Training Mode. This is for DDR4 MRS4. Computed in mss_eff_cnfg. -/// Each memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_rd_preamble_train(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_RD_PREAMBLE_TRAIN, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_RD_PREAMBLE_TRAIN: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_RD_PREAMBLE_TRAIN getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Read Pre amble Training Mode. This is for DDR4 MRS4. Computed in mss_eff_cnfg. -/// Each memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_rd_preamble_train(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_RD_PREAMBLE_TRAIN, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_RD_PREAMBLE_TRAIN: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_RD_PREAMBLE_TRAIN getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Read Pre amble Training Mode. This is for DDR4 MRS4. Computed in mss_eff_cnfg. -/// Each memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_rd_preamble_train(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_RD_PREAMBLE_TRAIN, i_target, l_value) ); - memcpy(o_array, &l_value, 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_RD_PREAMBLE_TRAIN: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_RD_PREAMBLE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Read Pre amble. This is for DDR4 MRS4. Computed in mss_eff_cnfg. Each memory -/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware -/// notes: -/// none -/// -inline fapi2::ReturnCode eff_rd_preamble(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_RD_PREAMBLE, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_RD_PREAMBLE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_RD_PREAMBLE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Read Pre amble. This is for DDR4 MRS4. Computed in mss_eff_cnfg. Each memory -/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware -/// notes: -/// none -/// -inline fapi2::ReturnCode eff_rd_preamble(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_RD_PREAMBLE, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_RD_PREAMBLE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_RD_PREAMBLE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Read Pre amble. This is for DDR4 MRS4. Computed in mss_eff_cnfg. Each memory -/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware -/// notes: -/// none -/// -inline fapi2::ReturnCode eff_rd_preamble(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_RD_PREAMBLE, i_target, l_value) ); - memcpy(o_array, &l_value, 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_RD_PREAMBLE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_WR_PREAMBLE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Write Pre amble. This is for DDR4 MRS4. Computed in mss_eff_cnfg. Each memory -/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware -/// notes: -/// none -/// -inline fapi2::ReturnCode eff_wr_preamble(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_WR_PREAMBLE, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_WR_PREAMBLE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_WR_PREAMBLE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Write Pre amble. This is for DDR4 MRS4. Computed in mss_eff_cnfg. Each memory -/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware -/// notes: -/// none -/// -inline fapi2::ReturnCode eff_wr_preamble(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_WR_PREAMBLE, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_WR_PREAMBLE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_WR_PREAMBLE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Write Pre amble. This is for DDR4 MRS4. Computed in mss_eff_cnfg. Each memory -/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware -/// notes: -/// none -/// -inline fapi2::ReturnCode eff_wr_preamble(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_WR_PREAMBLE, i_target, l_value) ); - memcpy(o_array, &l_value, 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_WR_PREAMBLE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_CA_PARITY_LATENCY getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note C/A Parity Latency Mode. This is for DDR4 MRS5. Computed in mss_eff_cnfg. Each -/// memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_ca_parity_latency(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_CA_PARITY_LATENCY, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_CA_PARITY_LATENCY: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_CA_PARITY_LATENCY getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note C/A Parity Latency Mode. This is for DDR4 MRS5. Computed in mss_eff_cnfg. Each -/// memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_ca_parity_latency(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_CA_PARITY_LATENCY, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_CA_PARITY_LATENCY: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_CA_PARITY_LATENCY getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note C/A Parity Latency Mode. This is for DDR4 MRS5. Computed in mss_eff_cnfg. Each -/// memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_ca_parity_latency(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_CA_PARITY_LATENCY, i_target, l_value) ); - memcpy(o_array, &l_value, 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_CA_PARITY_LATENCY: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_CRC_ERROR_CLEAR getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note CRC Error Clear. This is for DDR4 MRS5. Computed in mss_eff_cnfg. Each memory -/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware -/// notes: -/// none -/// -inline fapi2::ReturnCode eff_crc_error_clear(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_CRC_ERROR_CLEAR, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_CRC_ERROR_CLEAR: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_CRC_ERROR_CLEAR getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note CRC Error Clear. This is for DDR4 MRS5. Computed in mss_eff_cnfg. Each memory -/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware -/// notes: -/// none -/// -inline fapi2::ReturnCode eff_crc_error_clear(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_CRC_ERROR_CLEAR, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_CRC_ERROR_CLEAR: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_CRC_ERROR_CLEAR getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note CRC Error Clear. This is for DDR4 MRS5. Computed in mss_eff_cnfg. Each memory -/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware -/// notes: -/// none -/// -inline fapi2::ReturnCode eff_crc_error_clear(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_CRC_ERROR_CLEAR, i_target, l_value) ); - memcpy(o_array, &l_value, 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_CRC_ERROR_CLEAR: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_CA_PARITY_ERROR_STATUS getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note C/A Parity Error Status. This is for DDR4 MRS5. Computed in mss_eff_cnfg. Each -/// memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_ca_parity_error_status(const fapi2::Target& i_target, - uint8_t& o_value) -{ - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_CA_PARITY_ERROR_STATUS, i_target.getParent(), - l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_CA_PARITY_ERROR_STATUS: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_CA_PARITY_ERROR_STATUS getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note C/A Parity Error Status. This is for DDR4 MRS5. Computed in mss_eff_cnfg. Each -/// memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_ca_parity_error_status(const fapi2::Target& i_target, - uint8_t& o_value) -{ - uint8_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_CA_PARITY_ERROR_STATUS, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_CA_PARITY_ERROR_STATUS: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_CA_PARITY_ERROR_STATUS getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note C/A Parity Error Status. This is for DDR4 MRS5. Computed in mss_eff_cnfg. Each -/// memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_ca_parity_error_status(const fapi2::Target& i_target, - uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_CA_PARITY_ERROR_STATUS, i_target, l_value) ); - memcpy(o_array, &l_value, 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_CA_PARITY_ERROR_STATUS: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_ODT_INPUT_BUFF getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note ODT Input Buffer during power down. This is for DDR4 MRS5. Computed in -/// mss_eff_cnfg. Each memory channel will have a value. creator: mss_eff_cnfg -/// consumer: various firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_odt_input_buff(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_ODT_INPUT_BUFF, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_ODT_INPUT_BUFF: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_ODT_INPUT_BUFF getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note ODT Input Buffer during power down. This is for DDR4 MRS5. Computed in -/// mss_eff_cnfg. Each memory channel will have a value. creator: mss_eff_cnfg -/// consumer: various firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_odt_input_buff(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_ODT_INPUT_BUFF, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_ODT_INPUT_BUFF: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_ODT_INPUT_BUFF getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note ODT Input Buffer during power down. This is for DDR4 MRS5. Computed in -/// mss_eff_cnfg. Each memory channel will have a value. creator: mss_eff_cnfg -/// consumer: various firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_odt_input_buff(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_ODT_INPUT_BUFF, i_target, l_value) ); - memcpy(o_array, &l_value, 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_ODT_INPUT_BUFF: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_CA_PARITY getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note CA Parity Persistance Error. This is for DDR4 MRS5. Computed in mss_eff_cnfg. -/// Each memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_ca_parity(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_CA_PARITY, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_CA_PARITY: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_CA_PARITY getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note CA Parity Persistance Error. This is for DDR4 MRS5. Computed in mss_eff_cnfg. -/// Each memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_ca_parity(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_CA_PARITY, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_CA_PARITY: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_CA_PARITY getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note CA Parity Persistance Error. This is for DDR4 MRS5. Computed in mss_eff_cnfg. -/// Each memory channel will have a value. creator: mss_eff_cnfg consumer: various -/// firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_ca_parity(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_CA_PARITY, i_target, l_value) ); - memcpy(o_array, &l_value, 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_CA_PARITY: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DATA_MASK getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Data Mask. This is for DDR4 MRS5. Computed in mss_eff_cnfg. Each memory channel -/// will have a value. creator: mss_eff_cnfg consumer: various firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_data_mask(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DATA_MASK, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DATA_MASK: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DATA_MASK getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Data Mask. This is for DDR4 MRS5. Computed in mss_eff_cnfg. Each memory channel -/// will have a value. creator: mss_eff_cnfg consumer: various firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_data_mask(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DATA_MASK, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DATA_MASK: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DATA_MASK getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Data Mask. This is for DDR4 MRS5. Computed in mss_eff_cnfg. Each memory channel -/// will have a value. creator: mss_eff_cnfg consumer: various firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_data_mask(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DATA_MASK, i_target, l_value) ); - memcpy(o_array, &l_value, 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DATA_MASK: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_WRITE_DBI getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Write DBI. This is for DDR4 MRS5. Computed in mss_eff_cnfg. Each memory channel -/// will have a value. creator: mss_eff_cnfg consumer: various firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_write_dbi(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_WRITE_DBI, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_WRITE_DBI: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_WRITE_DBI getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Write DBI. This is for DDR4 MRS5. Computed in mss_eff_cnfg. Each memory channel -/// will have a value. creator: mss_eff_cnfg consumer: various firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_write_dbi(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_WRITE_DBI, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_WRITE_DBI: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_WRITE_DBI getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Write DBI. This is for DDR4 MRS5. Computed in mss_eff_cnfg. Each memory channel -/// will have a value. creator: mss_eff_cnfg consumer: various firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_write_dbi(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_WRITE_DBI, i_target, l_value) ); - memcpy(o_array, &l_value, 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_WRITE_DBI: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_READ_DBI getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Read DBI. This is for DDR4 MRS5. Computed in mss_eff_cnfg. Each memory channel -/// will have a value. creator: mss_eff_cnfg consumer: various firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_read_dbi(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_READ_DBI, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_READ_DBI: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_READ_DBI getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Read DBI. This is for DDR4 MRS5. Computed in mss_eff_cnfg. Each memory channel -/// will have a value. creator: mss_eff_cnfg consumer: various firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_read_dbi(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_READ_DBI, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_READ_DBI: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_READ_DBI getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Read DBI. This is for DDR4 MRS5. Computed in mss_eff_cnfg. Each memory channel -/// will have a value. creator: mss_eff_cnfg consumer: various firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_read_dbi(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_READ_DBI, i_target, l_value) ); - memcpy(o_array, &l_value, 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_READ_DBI: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_VREF_DQ_TRAIN_VALUE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (A) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note vrefdq_train value. This is for DDR4 MRS6. Computed in mss_eff_cnfg. Each memory -/// channel will have a value. Creator: mss_eff_cnfg Consumer:various Firmware -/// notes: -/// none -/// -inline fapi2::ReturnCode eff_vref_dq_train_value(const fapi2::Target& i_target, - uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2][4]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_VREF_DQ_TRAIN_VALUE, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(l_mca)][mss::index(i_target)][0]), 4); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_VREF_DQ_TRAIN_VALUE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_VREF_DQ_TRAIN_VALUE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (B) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note vrefdq_train value. This is for DDR4 MRS6. Computed in mss_eff_cnfg. Each memory -/// channel will have a value. Creator: mss_eff_cnfg Consumer:various Firmware -/// notes: -/// none -/// -inline fapi2::ReturnCode eff_vref_dq_train_value(const fapi2::Target& i_target, - uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2][4]; - auto l_mcs = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_VREF_DQ_TRAIN_VALUE, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 8); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_VREF_DQ_TRAIN_VALUE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_VREF_DQ_TRAIN_VALUE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (C) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note vrefdq_train value. This is for DDR4 MRS6. Computed in mss_eff_cnfg. Each memory -/// channel will have a value. Creator: mss_eff_cnfg Consumer:various Firmware -/// notes: -/// none -/// -inline fapi2::ReturnCode eff_vref_dq_train_value(const fapi2::Target& i_target, - uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2][4]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_VREF_DQ_TRAIN_VALUE, i_target, l_value) ); - memcpy(o_array, &l_value, 16); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_VREF_DQ_TRAIN_VALUE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_VREF_DQ_TRAIN_RANGE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (A) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note vrefdq_train range. This is for DDR4 MRS6. Computed in mss_eff_cnfg. Each memory -/// channel will have a value. Creator: mss_eff_cnfg Consumer:various Firmware -/// notes: -/// none -/// -inline fapi2::ReturnCode eff_vref_dq_train_range(const fapi2::Target& i_target, - uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2][4]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_VREF_DQ_TRAIN_RANGE, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(l_mca)][mss::index(i_target)][0]), 4); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_VREF_DQ_TRAIN_RANGE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_VREF_DQ_TRAIN_RANGE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (B) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note vrefdq_train range. This is for DDR4 MRS6. Computed in mss_eff_cnfg. Each memory -/// channel will have a value. Creator: mss_eff_cnfg Consumer:various Firmware -/// notes: -/// none -/// -inline fapi2::ReturnCode eff_vref_dq_train_range(const fapi2::Target& i_target, - uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2][4]; - auto l_mcs = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_VREF_DQ_TRAIN_RANGE, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 8); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_VREF_DQ_TRAIN_RANGE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_VREF_DQ_TRAIN_RANGE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (C) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note vrefdq_train range. This is for DDR4 MRS6. Computed in mss_eff_cnfg. Each memory -/// channel will have a value. Creator: mss_eff_cnfg Consumer:various Firmware -/// notes: -/// none -/// -inline fapi2::ReturnCode eff_vref_dq_train_range(const fapi2::Target& i_target, - uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2][4]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_VREF_DQ_TRAIN_RANGE, i_target, l_value) ); - memcpy(o_array, &l_value, 16); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_VREF_DQ_TRAIN_RANGE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_VREF_DQ_TRAIN_ENABLE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (A) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note vrefdq_train enable. This is for DDR4 MRS6. Computed in mss_eff_cnfg. Each -/// memory channel will have a value. Creator: mss_eff_cnfg Consumer:various -/// Firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_vref_dq_train_enable(const fapi2::Target& i_target, - uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2][4]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_VREF_DQ_TRAIN_ENABLE, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(l_mca)][mss::index(i_target)][0]), 4); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_VREF_DQ_TRAIN_ENABLE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_VREF_DQ_TRAIN_ENABLE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (B) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note vrefdq_train enable. This is for DDR4 MRS6. Computed in mss_eff_cnfg. Each -/// memory channel will have a value. Creator: mss_eff_cnfg Consumer:various -/// Firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_vref_dq_train_enable(const fapi2::Target& i_target, - uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2][4]; - auto l_mcs = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_VREF_DQ_TRAIN_ENABLE, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 8); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_VREF_DQ_TRAIN_ENABLE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_VREF_DQ_TRAIN_ENABLE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (C) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note vrefdq_train enable. This is for DDR4 MRS6. Computed in mss_eff_cnfg. Each -/// memory channel will have a value. Creator: mss_eff_cnfg Consumer:various -/// Firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_vref_dq_train_enable(const fapi2::Target& i_target, - uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2][4]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_VREF_DQ_TRAIN_ENABLE, i_target, l_value) ); - memcpy(o_array, &l_value, 16); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_VREF_DQ_TRAIN_ENABLE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_WRITE_CRC getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Write CRC control for DDR4 in MRS2. Set in mss_eff_cnfg. Each memory channel -/// will have a value. Creator: mss_eff_cnfg Consumer:various Firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_write_crc(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_WRITE_CRC, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_WRITE_CRC: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_WRITE_CRC getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Write CRC control for DDR4 in MRS2. Set in mss_eff_cnfg. Each memory channel -/// will have a value. Creator: mss_eff_cnfg Consumer:various Firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_write_crc(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_WRITE_CRC, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_WRITE_CRC: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_WRITE_CRC getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Write CRC control for DDR4 in MRS2. Set in mss_eff_cnfg. Each memory channel -/// will have a value. Creator: mss_eff_cnfg Consumer:various Firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_write_crc(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_WRITE_CRC, i_target, l_value) ); - memcpy(o_array, &l_value, 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_WRITE_CRC: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_CAL_STEP_ENABLE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint32_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note A bit map of vector denoting valid steps to run (0 is left most bit) [0] -/// DRAM_ZQCAL [1] DB_ZQCAL (LRDIMM) [2] MREP (LRDIMM) [3] MRD - Coarse (LRDIMM) [4] -/// MRD - Fine (LRDIMM) [5] WR_LEVEL [6] INITIAL_PAT_WR [7] WR_VREF_LATCH [8] DWL -/// (LRDIMM) [9] MWD - Coarse (LRDIMM) [10] MWD - Fine (LRDIMM) [11] HWL (LRDIMM) -/// [12] DQS_ALIGN [13] RDCLK_ALIGN [14] READ_CTR_2D_VREF [15] READ_CTR [16] -/// WRITE_CTR_2D_VREF [17] WRITE_CTR [18] COARSE_WR [19] COARSE_RD [20] -/// TRAINING_ADV_RD Only set for DD2.* machines [21] TRAINING_ADV_WR Only set for -/// DD2.* machines [22]:[31] Reserved for future use COARSE_WR and COARSE_RD will be -/// consumed together to form COARSE_LVL. WRITE_CTR will be run, even if only -/// WRITE_CTR_2D_VREF is enabled, as the WR 2D VREF HW cal depends upon WRITE_CTR 1D -/// to function. Note: LRDIMM steps will only be enabled for LRDIMMs and won't run -/// on -/// RDIMMs. -/// -inline fapi2::ReturnCode cal_step_enable(const fapi2::Target& i_target, uint32_t& o_value) -{ - uint32_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_CAL_STEP_ENABLE, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_CAL_STEP_ENABLE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_CAL_STEP_ENABLE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint32_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note A bit map of vector denoting valid steps to run (0 is left most bit) [0] -/// DRAM_ZQCAL [1] DB_ZQCAL (LRDIMM) [2] MREP (LRDIMM) [3] MRD - Coarse (LRDIMM) [4] -/// MRD - Fine (LRDIMM) [5] WR_LEVEL [6] INITIAL_PAT_WR [7] WR_VREF_LATCH [8] DWL -/// (LRDIMM) [9] MWD - Coarse (LRDIMM) [10] MWD - Fine (LRDIMM) [11] HWL (LRDIMM) -/// [12] DQS_ALIGN [13] RDCLK_ALIGN [14] READ_CTR_2D_VREF [15] READ_CTR [16] -/// WRITE_CTR_2D_VREF [17] WRITE_CTR [18] COARSE_WR [19] COARSE_RD [20] -/// TRAINING_ADV_RD Only set for DD2.* machines [21] TRAINING_ADV_WR Only set for -/// DD2.* machines [22]:[31] Reserved for future use COARSE_WR and COARSE_RD will be -/// consumed together to form COARSE_LVL. WRITE_CTR will be run, even if only -/// WRITE_CTR_2D_VREF is enabled, as the WR 2D VREF HW cal depends upon WRITE_CTR 1D -/// to function. Note: LRDIMM steps will only be enabled for LRDIMMs and won't run -/// on -/// RDIMMs. -/// -inline fapi2::ReturnCode cal_step_enable(const fapi2::Target& i_target, uint32_t& o_value) -{ - uint32_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_CAL_STEP_ENABLE, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_CAL_STEP_ENABLE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_CAL_STEP_ENABLE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint32_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note A bit map of vector denoting valid steps to run (0 is left most bit) [0] -/// DRAM_ZQCAL [1] DB_ZQCAL (LRDIMM) [2] MREP (LRDIMM) [3] MRD - Coarse (LRDIMM) [4] -/// MRD - Fine (LRDIMM) [5] WR_LEVEL [6] INITIAL_PAT_WR [7] WR_VREF_LATCH [8] DWL -/// (LRDIMM) [9] MWD - Coarse (LRDIMM) [10] MWD - Fine (LRDIMM) [11] HWL (LRDIMM) -/// [12] DQS_ALIGN [13] RDCLK_ALIGN [14] READ_CTR_2D_VREF [15] READ_CTR [16] -/// WRITE_CTR_2D_VREF [17] WRITE_CTR [18] COARSE_WR [19] COARSE_RD [20] -/// TRAINING_ADV_RD Only set for DD2.* machines [21] TRAINING_ADV_WR Only set for -/// DD2.* machines [22]:[31] Reserved for future use COARSE_WR and COARSE_RD will be -/// consumed together to form COARSE_LVL. WRITE_CTR will be run, even if only -/// WRITE_CTR_2D_VREF is enabled, as the WR 2D VREF HW cal depends upon WRITE_CTR 1D -/// to function. Note: LRDIMM steps will only be enabled for LRDIMMs and won't run -/// on -/// RDIMMs. -/// -inline fapi2::ReturnCode cal_step_enable(const fapi2::Target& i_target, uint32_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint32_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_CAL_STEP_ENABLE, i_target, l_value) ); - memcpy(o_array, &l_value, 8); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_CAL_STEP_ENABLE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_CUSTOM_TRAINING_ADV_PATTERNS getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint32_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Special training pattern used in draminit_training_advance. Used for custom -/// pattern read There can be two patterns used here. This attribute is before -/// swizzling for endianness of the registers. CODE WILL SWIZZLE FOR THE SYSTEM The -/// first 0-15 bits are for PATTERN0, bits 16-32 are for PATTERN1. If this attribute -/// is set to 0, using the default values of: 0x8E94 for PATTERN0 0x2BC6 for -/// PATTERN1 Set to default in -/// eff_config -/// -inline fapi2::ReturnCode custom_training_adv_patterns(const fapi2::Target& i_target, - uint32_t& o_value) -{ - uint32_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_CUSTOM_TRAINING_ADV_PATTERNS, i_target.getParent(), - l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_CUSTOM_TRAINING_ADV_PATTERNS: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_CUSTOM_TRAINING_ADV_PATTERNS getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint32_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Special training pattern used in draminit_training_advance. Used for custom -/// pattern read There can be two patterns used here. This attribute is before -/// swizzling for endianness of the registers. CODE WILL SWIZZLE FOR THE SYSTEM The -/// first 0-15 bits are for PATTERN0, bits 16-32 are for PATTERN1. If this attribute -/// is set to 0, using the default values of: 0x8E94 for PATTERN0 0x2BC6 for -/// PATTERN1 Set to default in -/// eff_config -/// -inline fapi2::ReturnCode custom_training_adv_patterns(const fapi2::Target& i_target, - uint32_t& o_value) -{ - uint32_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_CUSTOM_TRAINING_ADV_PATTERNS, l_mca.getParent(), - l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_CUSTOM_TRAINING_ADV_PATTERNS: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_CUSTOM_TRAINING_ADV_PATTERNS getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint32_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Special training pattern used in draminit_training_advance. Used for custom -/// pattern read There can be two patterns used here. This attribute is before -/// swizzling for endianness of the registers. CODE WILL SWIZZLE FOR THE SYSTEM The -/// first 0-15 bits are for PATTERN0, bits 16-32 are for PATTERN1. If this attribute -/// is set to 0, using the default values of: 0x8E94 for PATTERN0 0x2BC6 for -/// PATTERN1 Set to default in -/// eff_config -/// -inline fapi2::ReturnCode custom_training_adv_patterns(const fapi2::Target& i_target, - uint32_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint32_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_CUSTOM_TRAINING_ADV_PATTERNS, i_target, l_value) ); - memcpy(o_array, &l_value, 8); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_CUSTOM_TRAINING_ADV_PATTERNS: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_CUSTOM_TRAINING_ADV_BACKUP_PATTERNS getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint32_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Special training backup pattern Used for custom_pattern_read in -/// draminit_training_advance. If the main patterns fail, the code will try running -/// this pattern Used for read centering There can be two patterns used here. This -/// attribute is before swizzling for endianness of the registers. CODE WILL SWIZZLE -/// FOR THE SYSTEM The first 0-15 bits are for PATTERN0, bits 16-32 are for -/// PATTERN1. If this attribute is set to 0, using the default values of: 0xEA0C for -/// PATTERN0 0xA6C9 for PATTERN1 Set to default in -/// eff_config -/// -inline fapi2::ReturnCode custom_training_adv_backup_patterns(const fapi2::Target& i_target, - uint32_t& o_value) -{ - uint32_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_CUSTOM_TRAINING_ADV_BACKUP_PATTERNS, - i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_CUSTOM_TRAINING_ADV_BACKUP_PATTERNS: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_CUSTOM_TRAINING_ADV_BACKUP_PATTERNS getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint32_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Special training backup pattern Used for custom_pattern_read in -/// draminit_training_advance. If the main patterns fail, the code will try running -/// this pattern Used for read centering There can be two patterns used here. This -/// attribute is before swizzling for endianness of the registers. CODE WILL SWIZZLE -/// FOR THE SYSTEM The first 0-15 bits are for PATTERN0, bits 16-32 are for -/// PATTERN1. If this attribute is set to 0, using the default values of: 0xEA0C for -/// PATTERN0 0xA6C9 for PATTERN1 Set to default in -/// eff_config -/// -inline fapi2::ReturnCode custom_training_adv_backup_patterns(const fapi2::Target& i_target, - uint32_t& o_value) -{ - uint32_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_CUSTOM_TRAINING_ADV_BACKUP_PATTERNS, l_mca.getParent(), - l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_CUSTOM_TRAINING_ADV_BACKUP_PATTERNS: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_CUSTOM_TRAINING_ADV_BACKUP_PATTERNS getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint32_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Special training backup pattern Used for custom_pattern_read in -/// draminit_training_advance. If the main patterns fail, the code will try running -/// this pattern Used for read centering There can be two patterns used here. This -/// attribute is before swizzling for endianness of the registers. CODE WILL SWIZZLE -/// FOR THE SYSTEM The first 0-15 bits are for PATTERN0, bits 16-32 are for -/// PATTERN1. If this attribute is set to 0, using the default values of: 0xEA0C for -/// PATTERN0 0xA6C9 for PATTERN1 Set to default in -/// eff_config -/// -inline fapi2::ReturnCode custom_training_adv_backup_patterns(const fapi2::Target& i_target, - uint32_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint32_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_CUSTOM_TRAINING_ADV_BACKUP_PATTERNS, i_target, l_value) ); - memcpy(o_array, &l_value, 8); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_CUSTOM_TRAINING_ADV_BACKUP_PATTERNS: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_CUSTOM_TRAINING_ADV_BACKUP_PATTERNS2 getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint32_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Special training backup pattern number 2 Used for custom_pattern_read in -/// draminit_training_advance. If the main patterns fail, the code will try running -/// this pattern Used for read centering There can be two patterns used here. This -/// attribute is before swizzling for endianness of the registers. CODE WILL SWIZZLE -/// FOR THE SYSTEM The first 0-15 bits are for PATTERN0, bits 16-32 are for -/// PATTERN1. If this attribute is set to 0, using the default values of: 0x13EC for -/// PATTERN0 0x02FD for PATTERN1 Set to default in -/// eff_config -/// -inline fapi2::ReturnCode custom_training_adv_backup_patterns2(const fapi2::Target& i_target, - uint32_t& o_value) -{ - uint32_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_CUSTOM_TRAINING_ADV_BACKUP_PATTERNS2, - i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_CUSTOM_TRAINING_ADV_BACKUP_PATTERNS2: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_CUSTOM_TRAINING_ADV_BACKUP_PATTERNS2 getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint32_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Special training backup pattern number 2 Used for custom_pattern_read in -/// draminit_training_advance. If the main patterns fail, the code will try running -/// this pattern Used for read centering There can be two patterns used here. This -/// attribute is before swizzling for endianness of the registers. CODE WILL SWIZZLE -/// FOR THE SYSTEM The first 0-15 bits are for PATTERN0, bits 16-32 are for -/// PATTERN1. If this attribute is set to 0, using the default values of: 0x13EC for -/// PATTERN0 0x02FD for PATTERN1 Set to default in -/// eff_config -/// -inline fapi2::ReturnCode custom_training_adv_backup_patterns2(const fapi2::Target& i_target, - uint32_t& o_value) -{ - uint32_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_CUSTOM_TRAINING_ADV_BACKUP_PATTERNS2, l_mca.getParent(), - l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_CUSTOM_TRAINING_ADV_BACKUP_PATTERNS2: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_CUSTOM_TRAINING_ADV_BACKUP_PATTERNS2 getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint32_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Special training backup pattern number 2 Used for custom_pattern_read in -/// draminit_training_advance. If the main patterns fail, the code will try running -/// this pattern Used for read centering There can be two patterns used here. This -/// attribute is before swizzling for endianness of the registers. CODE WILL SWIZZLE -/// FOR THE SYSTEM The first 0-15 bits are for PATTERN0, bits 16-32 are for -/// PATTERN1. If this attribute is set to 0, using the default values of: 0x13EC for -/// PATTERN0 0x02FD for PATTERN1 Set to default in -/// eff_config -/// -inline fapi2::ReturnCode custom_training_adv_backup_patterns2(const fapi2::Target& i_target, - uint32_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint32_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_CUSTOM_TRAINING_ADV_BACKUP_PATTERNS2, i_target, l_value) ); - memcpy(o_array, &l_value, 8); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_CUSTOM_TRAINING_ADV_BACKUP_PATTERNS2: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_CUSTOM_TRAINING_ADV_WR_PATTERN getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Special training pattern used in draminit_training_advance. Used for custom -/// pattern write Due to hardware limitations, only one 8-bit pattern can be used -/// This attribute is before swizzling for endianness of the registers. CODE WILL -/// SWIZZLE FOR THE SYSTEM If this attribute is set to 0, using the default values -/// of: 0x9A Set to default in -/// eff_config -/// -inline fapi2::ReturnCode custom_training_adv_wr_pattern(const fapi2::Target& i_target, - uint8_t& o_value) -{ - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_CUSTOM_TRAINING_ADV_WR_PATTERN, i_target.getParent(), - l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_CUSTOM_TRAINING_ADV_WR_PATTERN: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_CUSTOM_TRAINING_ADV_WR_PATTERN getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Special training pattern used in draminit_training_advance. Used for custom -/// pattern write Due to hardware limitations, only one 8-bit pattern can be used -/// This attribute is before swizzling for endianness of the registers. CODE WILL -/// SWIZZLE FOR THE SYSTEM If this attribute is set to 0, using the default values -/// of: 0x9A Set to default in -/// eff_config -/// -inline fapi2::ReturnCode custom_training_adv_wr_pattern(const fapi2::Target& i_target, - uint8_t& o_value) -{ - uint8_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_CUSTOM_TRAINING_ADV_WR_PATTERN, l_mca.getParent(), - l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_CUSTOM_TRAINING_ADV_WR_PATTERN: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_CUSTOM_TRAINING_ADV_WR_PATTERN getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Special training pattern used in draminit_training_advance. Used for custom -/// pattern write Due to hardware limitations, only one 8-bit pattern can be used -/// This attribute is before swizzling for endianness of the registers. CODE WILL -/// SWIZZLE FOR THE SYSTEM If this attribute is set to 0, using the default values -/// of: 0x9A Set to default in -/// eff_config -/// -inline fapi2::ReturnCode custom_training_adv_wr_pattern(const fapi2::Target& i_target, - uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_CUSTOM_TRAINING_ADV_WR_PATTERN, i_target, l_value) ); - memcpy(o_array, &l_value, 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_CUSTOM_TRAINING_ADV_WR_PATTERN: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_VREF_CAL_ENABLE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint16_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note A bit vector denoting bits in every DP16 on the port to be calibrated. That is, -/// all of the set bits will be calibrated for all DP16. A value of zero indicates -/// the calibration should not be -/// run. -/// -inline fapi2::ReturnCode vref_cal_enable(const fapi2::Target& i_target, uint16_t& o_value) -{ - uint16_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_VREF_CAL_ENABLE, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_VREF_CAL_ENABLE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_VREF_CAL_ENABLE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint16_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note A bit vector denoting bits in every DP16 on the port to be calibrated. That is, -/// all of the set bits will be calibrated for all DP16. A value of zero indicates -/// the calibration should not be -/// run. -/// -inline fapi2::ReturnCode vref_cal_enable(const fapi2::Target& i_target, uint16_t& o_value) -{ - uint16_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_VREF_CAL_ENABLE, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_VREF_CAL_ENABLE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_VREF_CAL_ENABLE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint16_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note A bit vector denoting bits in every DP16 on the port to be calibrated. That is, -/// all of the set bits will be calibrated for all DP16. A value of zero indicates -/// the calibration should not be -/// run. -/// -inline fapi2::ReturnCode vref_cal_enable(const fapi2::Target& i_target, uint16_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint16_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_VREF_CAL_ENABLE, i_target, l_value) ); - memcpy(o_array, &l_value, 4); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_VREF_CAL_ENABLE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_RDVREF_CAL_ENABLE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint16_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note A bit vector denoting bits in every DP16 on the port to be calibrated. That is, -/// all of the set bits will be calibrated for all DP16. A value of zero indicates -/// the calibration should not be -/// run. -/// -inline fapi2::ReturnCode rdvref_cal_enable(const fapi2::Target& i_target, uint16_t& o_value) -{ - uint16_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_RDVREF_CAL_ENABLE, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_RDVREF_CAL_ENABLE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_RDVREF_CAL_ENABLE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint16_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note A bit vector denoting bits in every DP16 on the port to be calibrated. That is, -/// all of the set bits will be calibrated for all DP16. A value of zero indicates -/// the calibration should not be -/// run. -/// -inline fapi2::ReturnCode rdvref_cal_enable(const fapi2::Target& i_target, uint16_t& o_value) -{ - uint16_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_RDVREF_CAL_ENABLE, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_RDVREF_CAL_ENABLE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_RDVREF_CAL_ENABLE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint16_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note A bit vector denoting bits in every DP16 on the port to be calibrated. That is, -/// all of the set bits will be calibrated for all DP16. A value of zero indicates -/// the calibration should not be -/// run. -/// -inline fapi2::ReturnCode rdvref_cal_enable(const fapi2::Target& i_target, uint16_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint16_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_RDVREF_CAL_ENABLE, i_target, l_value) ); - memcpy(o_array, &l_value, 4); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_RDVREF_CAL_ENABLE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_CAL_ABORT_ON_ERROR getter -/// @param[out] uint8_t& reference to store the value -/// @note Generated by gen_accessors.pl generateParameters (SYSTEM) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Whether or not to abort on the first DDR PHY calibration error. Firmware should -/// always have this set to NO. YES can be used in the lab for troubleshooting, -/// screening, -/// etc. -/// -inline fapi2::ReturnCode cal_abort_on_error(uint8_t& o_value) -{ - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_CAL_ABORT_ON_ERROR, fapi2::Target(), o_value) ); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_CAL_ABORT_ON_ERROR: 0x%lx (system target)", - uint64_t(fapi2::current_err)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_SLEW_RATE_DATA getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (A) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note The 4 bit result of running the slew calibration algorithm at various rates and -/// impedances. The first dimension is port, the second is the impedance of -/// 24,30,34, and 40 Ohms. The 3rd dimension is the rate: 3,4,5 or 6 V/ns. Computed -/// and sent to the correct data blocks in phy_reset. Also used in advanced -/// training -/// -inline fapi2::ReturnCode slew_rate_data(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][4][4]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_SLEW_RATE_DATA, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(l_mca)][mss::index(i_target)][0]), 4); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_SLEW_RATE_DATA: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_SLEW_RATE_DATA getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (B) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note The 4 bit result of running the slew calibration algorithm at various rates and -/// impedances. The first dimension is port, the second is the impedance of -/// 24,30,34, and 40 Ohms. The 3rd dimension is the rate: 3,4,5 or 6 V/ns. Computed -/// and sent to the correct data blocks in phy_reset. Also used in advanced -/// training -/// -inline fapi2::ReturnCode slew_rate_data(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][4][4]; - auto l_mcs = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_SLEW_RATE_DATA, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 16); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_SLEW_RATE_DATA: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_SLEW_RATE_DATA getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (C) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note The 4 bit result of running the slew calibration algorithm at various rates and -/// impedances. The first dimension is port, the second is the impedance of -/// 24,30,34, and 40 Ohms. The 3rd dimension is the rate: 3,4,5 or 6 V/ns. Computed -/// and sent to the correct data blocks in phy_reset. Also used in advanced -/// training -/// -inline fapi2::ReturnCode slew_rate_data(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][4][4]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_SLEW_RATE_DATA, i_target, l_value) ); - memcpy(o_array, &l_value, 32); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_SLEW_RATE_DATA: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_SLEW_RATE_ADR getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (A) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note The 4 bit result of running the slew calibration algorithm at various rates and -/// impedances. The first dimension is the port. The second is the impedance of 15, -/// 20, 30 and 40 Ohms. The 3rd dimension is the rate:3, 4,5 or 6 V/ns. Computed and -/// sent to the correct data blocks in phy_reset. Also used in advanced -/// training -/// -inline fapi2::ReturnCode slew_rate_adr(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][4][4]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_SLEW_RATE_ADR, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(l_mca)][mss::index(i_target)][0]), 4); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_SLEW_RATE_ADR: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_SLEW_RATE_ADR getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (B) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note The 4 bit result of running the slew calibration algorithm at various rates and -/// impedances. The first dimension is the port. The second is the impedance of 15, -/// 20, 30 and 40 Ohms. The 3rd dimension is the rate:3, 4,5 or 6 V/ns. Computed and -/// sent to the correct data blocks in phy_reset. Also used in advanced -/// training -/// -inline fapi2::ReturnCode slew_rate_adr(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][4][4]; - auto l_mcs = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_SLEW_RATE_ADR, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 16); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_SLEW_RATE_ADR: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_SLEW_RATE_ADR getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (C) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note The 4 bit result of running the slew calibration algorithm at various rates and -/// impedances. The first dimension is the port. The second is the impedance of 15, -/// 20, 30 and 40 Ohms. The 3rd dimension is the rate:3, 4,5 or 6 V/ns. Computed and -/// sent to the correct data blocks in phy_reset. Also used in advanced -/// training -/// -inline fapi2::ReturnCode slew_rate_adr(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][4][4]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_SLEW_RATE_ADR, i_target, l_value) ); - memcpy(o_array, &l_value, 32); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_SLEW_RATE_ADR: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_SCHMOO_MULTIPLE_SETUP_CALL getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note MCBIST for multiple -/// setup -/// -inline fapi2::ReturnCode schmoo_multiple_setup_call(const fapi2::Target& i_target, - uint8_t& o_value) -{ - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_SCHMOO_MULTIPLE_SETUP_CALL, i_target.getParent(), - l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_SCHMOO_MULTIPLE_SETUP_CALL: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_SCHMOO_MULTIPLE_SETUP_CALL getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note MCBIST for multiple -/// setup -/// -inline fapi2::ReturnCode schmoo_multiple_setup_call(const fapi2::Target& i_target, - uint8_t& o_value) -{ - uint8_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_SCHMOO_MULTIPLE_SETUP_CALL, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_SCHMOO_MULTIPLE_SETUP_CALL: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_SCHMOO_MULTIPLE_SETUP_CALL getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note MCBIST for multiple -/// setup -/// -inline fapi2::ReturnCode schmoo_multiple_setup_call(const fapi2::Target& i_target, - uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_SCHMOO_MULTIPLE_SETUP_CALL, i_target, l_value) ); - memcpy(o_array, &l_value, 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_SCHMOO_MULTIPLE_SETUP_CALL: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_BUFFER_LATENCY getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Additional buffer latency in the case of RDIMMs and LRDIMMs. It is expected that -/// this value will come from the -/// VPD -/// -inline fapi2::ReturnCode eff_buffer_latency(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_BUFFER_LATENCY, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_BUFFER_LATENCY: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_BUFFER_LATENCY getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Additional buffer latency in the case of RDIMMs and LRDIMMs. It is expected that -/// this value will come from the -/// VPD -/// -inline fapi2::ReturnCode eff_buffer_latency(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_BUFFER_LATENCY, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_BUFFER_LATENCY: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_BUFFER_LATENCY getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Additional buffer latency in the case of RDIMMs and LRDIMMs. It is expected that -/// this value will come from the -/// VPD -/// -inline fapi2::ReturnCode eff_buffer_latency(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_BUFFER_LATENCY, i_target, l_value) ); - memcpy(o_array, &l_value, 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_BUFFER_LATENCY: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_LRDIMM_WORD_X getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint64_t -/// @note Generated by gen_accessors.pl generateParameters (F) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Additional buffer control word for LRDIMM building of the -/// BCW -/// -inline fapi2::ReturnCode eff_lrdimm_word_x(const fapi2::Target& i_target, uint64_t& o_value) -{ - uint64_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_LRDIMM_WORD_X, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_LRDIMM_WORD_X: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_LRDIMM_WORD_X getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint64_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Additional buffer control word for LRDIMM building of the -/// BCW -/// -inline fapi2::ReturnCode eff_lrdimm_word_x(const fapi2::Target& i_target, uint64_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint64_t l_value[2][2]; - auto l_mcs = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_LRDIMM_WORD_X, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 16); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_LRDIMM_WORD_X: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_LRDIMM_WORD_X getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint64_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Additional buffer control word for LRDIMM building of the -/// BCW -/// -inline fapi2::ReturnCode eff_lrdimm_word_x(const fapi2::Target& i_target, uint64_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint64_t l_value[2][2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_LRDIMM_WORD_X, i_target, l_value) ); - memcpy(o_array, &l_value, 32); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_LRDIMM_WORD_X: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_LRDIMM_MR12_REG getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note LRDIMM MR1,2 register. DRAM Rtt_WR for all ranks, DRAM Rtt_Nom for ranks 0 and -/// 1, DRAM driver impedance for all ranks. Eff config should set this -/// up. -/// -inline fapi2::ReturnCode lrdimm_mr12_reg(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_LRDIMM_MR12_REG, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_LRDIMM_MR12_REG: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_LRDIMM_MR12_REG getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note LRDIMM MR1,2 register. DRAM Rtt_WR for all ranks, DRAM Rtt_Nom for ranks 0 and -/// 1, DRAM driver impedance for all ranks. Eff config should set this -/// up. -/// -inline fapi2::ReturnCode lrdimm_mr12_reg(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_LRDIMM_MR12_REG, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_LRDIMM_MR12_REG: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_LRDIMM_MR12_REG getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note LRDIMM MR1,2 register. DRAM Rtt_WR for all ranks, DRAM Rtt_Nom for ranks 0 and -/// 1, DRAM driver impedance for all ranks. Eff config should set this -/// up. -/// -inline fapi2::ReturnCode lrdimm_mr12_reg(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_LRDIMM_MR12_REG, i_target, l_value) ); - memcpy(o_array, &l_value, 4); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_LRDIMM_MR12_REG: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_LRDIMM_ADDITIONAL_CNTL_WORDS getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint64_t -/// @note Generated by gen_accessors.pl generateParameters (F) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note LRDIMM additional RCD control words as set by DIMM SPD: F[3,4]RC0A, F[3,4]RC0B, -/// F[5,6]RC0A, F[5,6]RC0B, F[7,8]RC0A, F[7,8]RC0B, F[9,10]RC0A, F[9,10]RC0B, -/// F[1]RC8, F[3]RC9, F[3]RC8, F[1]RC0B, F[1]RC0C, F[1]RC0D, F[1]RC0E, F[1]RC0F. Eff -/// config should set this -/// up -/// -inline fapi2::ReturnCode lrdimm_additional_cntl_words(const fapi2::Target& i_target, - uint64_t& o_value) -{ - uint64_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_LRDIMM_ADDITIONAL_CNTL_WORDS, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_LRDIMM_ADDITIONAL_CNTL_WORDS: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_LRDIMM_ADDITIONAL_CNTL_WORDS getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint64_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note LRDIMM additional RCD control words as set by DIMM SPD: F[3,4]RC0A, F[3,4]RC0B, -/// F[5,6]RC0A, F[5,6]RC0B, F[7,8]RC0A, F[7,8]RC0B, F[9,10]RC0A, F[9,10]RC0B, -/// F[1]RC8, F[3]RC9, F[3]RC8, F[1]RC0B, F[1]RC0C, F[1]RC0D, F[1]RC0E, F[1]RC0F. Eff -/// config should set this -/// up -/// -inline fapi2::ReturnCode lrdimm_additional_cntl_words(const fapi2::Target& i_target, - uint64_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint64_t l_value[2][2]; - auto l_mcs = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_LRDIMM_ADDITIONAL_CNTL_WORDS, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 16); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_LRDIMM_ADDITIONAL_CNTL_WORDS: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_LRDIMM_ADDITIONAL_CNTL_WORDS getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint64_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note LRDIMM additional RCD control words as set by DIMM SPD: F[3,4]RC0A, F[3,4]RC0B, -/// F[5,6]RC0A, F[5,6]RC0B, F[7,8]RC0A, F[7,8]RC0B, F[9,10]RC0A, F[9,10]RC0B, -/// F[1]RC8, F[3]RC9, F[3]RC8, F[1]RC0B, F[1]RC0C, F[1]RC0D, F[1]RC0E, F[1]RC0F. Eff -/// config should set this -/// up -/// -inline fapi2::ReturnCode lrdimm_additional_cntl_words(const fapi2::Target& i_target, - uint64_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint64_t l_value[2][2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_LRDIMM_ADDITIONAL_CNTL_WORDS, i_target, l_value) ); - memcpy(o_array, &l_value, 32); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_LRDIMM_ADDITIONAL_CNTL_WORDS: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_LRDIMM_RANK_MULT_MODE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note LRDIMM rank multiplication -/// mode. -/// -inline fapi2::ReturnCode lrdimm_rank_mult_mode(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_LRDIMM_RANK_MULT_MODE, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_LRDIMM_RANK_MULT_MODE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_LRDIMM_RANK_MULT_MODE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note LRDIMM rank multiplication -/// mode. -/// -inline fapi2::ReturnCode lrdimm_rank_mult_mode(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_LRDIMM_RANK_MULT_MODE, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_LRDIMM_RANK_MULT_MODE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_LRDIMM_RANK_MULT_MODE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note LRDIMM rank multiplication -/// mode. -/// -inline fapi2::ReturnCode lrdimm_rank_mult_mode(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_LRDIMM_RANK_MULT_MODE, i_target, l_value) ); - memcpy(o_array, &l_value, 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_LRDIMM_RANK_MULT_MODE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_EFF_VPD_VERSION getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint32_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note The lowest VPD Version of the DIMMs attached to the MBA. Comes directly (in -/// ASCII) of the VINI VZ -/// keyword -/// -inline fapi2::ReturnCode eff_vpd_version(const fapi2::Target& i_target, uint32_t& o_value) -{ - uint32_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_EFF_VPD_VERSION, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_EFF_VPD_VERSION: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_EFF_VPD_VERSION getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint32_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note The lowest VPD Version of the DIMMs attached to the MBA. Comes directly (in -/// ASCII) of the VINI VZ -/// keyword -/// -inline fapi2::ReturnCode eff_vpd_version(const fapi2::Target& i_target, uint32_t& o_value) -{ - uint32_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_EFF_VPD_VERSION, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_EFF_VPD_VERSION: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_EFF_VPD_VERSION getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint32_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note The lowest VPD Version of the DIMMs attached to the MBA. Comes directly (in -/// ASCII) of the VINI VZ -/// keyword -/// -inline fapi2::ReturnCode eff_vpd_version(const fapi2::Target& i_target, uint32_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint32_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_EFF_VPD_VERSION, i_target, l_value) ); - memcpy(o_array, &l_value, 8); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_EFF_VPD_VERSION: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_VOLT_OVERRIDE getter -/// @param[in] const ref to the TARGET_TYPE_MCBIST -/// @param[out] uint8_t& reference to store the value -/// @note Generated by gen_accessors.pl generateParameters (NODIM A) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Possible DRAM voltage override. Firmware notes: Default should be NONE -/// (0x00). -/// -inline fapi2::ReturnCode volt_override(const fapi2::Target& i_target, uint8_t& o_value) -{ - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_VOLT_OVERRIDE, i_target, o_value) ); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_VOLT_OVERRIDE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_VDDR_OVERIDE_SPD getter -/// @param[out] uint8_t& reference to store the value -/// @note Generated by gen_accessors.pl generateParameters (SYSTEM) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Possible VDDR voltage -/// override. -/// -inline fapi2::ReturnCode vddr_overide_spd(uint8_t& o_value) -{ - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_VDDR_OVERIDE_SPD, fapi2::Target(), o_value) ); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_VDDR_OVERIDE_SPD: 0x%lx (system target)", - uint64_t(fapi2::current_err)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_VMEM_REGULATOR_MAX_DIMM_COUNT getter -/// @param[out] uint8_t& reference to store the value -/// @note Generated by gen_accessors.pl generateParameters (SYSTEM) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Maximum number of installed DIMMs per VMEM regulator for all VMEM regulators in -/// the -/// system. -/// -inline fapi2::ReturnCode vmem_regulator_max_dimm_count(uint8_t& o_value) -{ - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_VMEM_REGULATOR_MAX_DIMM_COUNT, fapi2::Target(), - o_value) ); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_VMEM_REGULATOR_MAX_DIMM_COUNT: 0x%lx (system target)", - uint64_t(fapi2::current_err)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_VREF_DAC_NIBBLE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Value for VREF DAC -/// nibble -/// -inline fapi2::ReturnCode vref_dac_nibble(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_VREF_DAC_NIBBLE, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_VREF_DAC_NIBBLE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_VREF_DAC_NIBBLE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Value for VREF DAC -/// nibble -/// -inline fapi2::ReturnCode vref_dac_nibble(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_VREF_DAC_NIBBLE, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_VREF_DAC_NIBBLE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_VREF_DAC_NIBBLE getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Value for VREF DAC -/// nibble -/// -inline fapi2::ReturnCode vref_dac_nibble(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_VREF_DAC_NIBBLE, i_target, l_value) ); - memcpy(o_array, &l_value, 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_VREF_DAC_NIBBLE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_VCCD_OVERRIDE getter -/// @param[out] uint8_t& reference to store the value -/// @note Generated by gen_accessors.pl generateParameters (SYSTEM) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Whether or not to override VCCD. Defaults to -/// no. -/// -inline fapi2::ReturnCode vccd_override(uint8_t& o_value) -{ - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_VCCD_OVERRIDE, fapi2::Target(), o_value) ); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_VCCD_OVERRIDE: 0x%lx (system target)", - uint64_t(fapi2::current_err)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DRAM_MAC getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint16_t -/// @note Generated by gen_accessors.pl generateParameters (F) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Maximum Activate Count. Used in various locations and is computed in -/// mss_eff_cnfg. creator: mss_eff_cnfg consumer: various firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_dram_mac(const fapi2::Target& i_target, uint16_t& o_value) -{ - uint16_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_MAC, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_MAC: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DRAM_MAC getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint16_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Maximum Activate Count. Used in various locations and is computed in -/// mss_eff_cnfg. creator: mss_eff_cnfg consumer: various firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_dram_mac(const fapi2::Target& i_target, uint16_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint16_t l_value[2][2]; - auto l_mcs = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_MAC, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 4); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_MAC: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DRAM_MAC getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint16_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Maximum Activate Count. Used in various locations and is computed in -/// mss_eff_cnfg. creator: mss_eff_cnfg consumer: various firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_dram_mac(const fapi2::Target& i_target, uint16_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint16_t l_value[2][2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_MAC, i_target, l_value) ); - memcpy(o_array, &l_value, 8); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_MAC: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DRAM_MODULE_BUS_WIDTH getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Module Memory Bus Width. Used in various locations and is evaluated in -/// mss_eff_cnfg. creator: mss_eff_cnfg consumer: various firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_dram_module_bus_width(const fapi2::Target& i_target, - uint8_t& o_value) -{ - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_MODULE_BUS_WIDTH, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_MODULE_BUS_WIDTH: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DRAM_MODULE_BUS_WIDTH getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Module Memory Bus Width. Used in various locations and is evaluated in -/// mss_eff_cnfg. creator: mss_eff_cnfg consumer: various firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_dram_module_bus_width(const fapi2::Target& i_target, - uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_MODULE_BUS_WIDTH, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_MODULE_BUS_WIDTH: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DRAM_MODULE_BUS_WIDTH getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Module Memory Bus Width. Used in various locations and is evaluated in -/// mss_eff_cnfg. creator: mss_eff_cnfg consumer: various firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_dram_module_bus_width(const fapi2::Target& i_target, - uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_MODULE_BUS_WIDTH, i_target, l_value) ); - memcpy(o_array, &l_value, 4); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_MODULE_BUS_WIDTH: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DRAM_RTT_NOM getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (A) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note RTT_NOM value read to be programmed into MRS02 For RDIMMS, this is based off of -/// the VPD For LRDIMMS, this comes from the -/// SPD -/// -inline fapi2::ReturnCode eff_dram_rtt_nom(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2][4]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_RTT_NOM, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(l_mca)][mss::index(i_target)][0]), 4); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_RTT_NOM: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DRAM_RTT_NOM getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (B) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note RTT_NOM value read to be programmed into MRS02 For RDIMMS, this is based off of -/// the VPD For LRDIMMS, this comes from the -/// SPD -/// -inline fapi2::ReturnCode eff_dram_rtt_nom(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2][4]; - auto l_mcs = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_RTT_NOM, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 8); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_RTT_NOM: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DRAM_RTT_NOM getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (C) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note RTT_NOM value read to be programmed into MRS02 For RDIMMS, this is based off of -/// the VPD For LRDIMMS, this comes from the -/// SPD -/// -inline fapi2::ReturnCode eff_dram_rtt_nom(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2][4]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_RTT_NOM, i_target, l_value) ); - memcpy(o_array, &l_value, 16); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_RTT_NOM: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DRAM_RTT_WR getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (A) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note RTT_WR value read to be programmed into MRS02 For RDIMMS, this is based off of -/// the VPD For LRDIMMS, this comes from the -/// SPD -/// -inline fapi2::ReturnCode eff_dram_rtt_wr(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2][4]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_RTT_WR, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(l_mca)][mss::index(i_target)][0]), 4); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_RTT_WR: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DRAM_RTT_WR getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (B) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note RTT_WR value read to be programmed into MRS02 For RDIMMS, this is based off of -/// the VPD For LRDIMMS, this comes from the -/// SPD -/// -inline fapi2::ReturnCode eff_dram_rtt_wr(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2][4]; - auto l_mcs = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_RTT_WR, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 8); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_RTT_WR: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DRAM_RTT_WR getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (C) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note RTT_WR value read to be programmed into MRS02 For RDIMMS, this is based off of -/// the VPD For LRDIMMS, this comes from the -/// SPD -/// -inline fapi2::ReturnCode eff_dram_rtt_wr(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2][4]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_RTT_WR, i_target, l_value) ); - memcpy(o_array, &l_value, 16); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_RTT_WR: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DRAM_RTT_PARK getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (A) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note RTT_PARK value read to be programmed into MRS05 For RDIMMS, this is based off of -/// the VPD For LRDIMMS, this comes from the -/// SPD -/// -inline fapi2::ReturnCode eff_dram_rtt_park(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2][4]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_RTT_PARK, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(l_mca)][mss::index(i_target)][0]), 4); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_RTT_PARK: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DRAM_RTT_PARK getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (B) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note RTT_PARK value read to be programmed into MRS05 For RDIMMS, this is based off of -/// the VPD For LRDIMMS, this comes from the -/// SPD -/// -inline fapi2::ReturnCode eff_dram_rtt_park(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2][4]; - auto l_mcs = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_RTT_PARK, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 8); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_RTT_PARK: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DRAM_RTT_PARK getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (C) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note RTT_PARK value read to be programmed into MRS05 For RDIMMS, this is based off of -/// the VPD For LRDIMMS, this comes from the -/// SPD -/// -inline fapi2::ReturnCode eff_dram_rtt_park(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2][4]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_RTT_PARK, i_target, l_value) ); - memcpy(o_array, &l_value, 16); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_RTT_PARK: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC00 getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW00 Host Interface DQ RTT_NOM -/// Control -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc00(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC00, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC00: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC00 getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW00 Host Interface DQ RTT_NOM -/// Control -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc00(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC00, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC00: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC00 getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW00 Host Interface DQ RTT_NOM -/// Control -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc00(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC00, i_target, l_value) ); - memcpy(o_array, &l_value, 4); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC00: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC01 getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW01 Host Interface DQ RTT_WR -/// Control -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc01(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC01, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC01: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC01 getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW01 Host Interface DQ RTT_WR -/// Control -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc01(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC01, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC01: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC01 getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW01 Host Interface DQ RTT_WR -/// Control -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc01(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC01, i_target, l_value) ); - memcpy(o_array, &l_value, 4); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC01: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC02 getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW02 Host Interface DQ RTT_PARK -/// Control -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc02(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC02, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC02: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC02 getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW02 Host Interface DQ RTT_PARK -/// Control -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc02(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC02, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC02: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC02 getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW02 Host Interface DQ RTT_PARK -/// Control -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc02(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC02, i_target, l_value) ); - memcpy(o_array, &l_value, 4); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC02: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC03 getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW03 Host Interface DQ Driver Control -/// Word -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc03(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC03, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC03: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC03 getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW03 Host Interface DQ Driver Control -/// Word -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc03(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC03, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC03: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC03 getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW03 Host Interface DQ Driver Control -/// Word -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc03(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC03, i_target, l_value) ); - memcpy(o_array, &l_value, 4); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC03: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC04 getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW04 DRAM Interface MDQ RTT Control -/// Word -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc04(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC04, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC04: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC04 getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW04 DRAM Interface MDQ RTT Control -/// Word -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc04(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC04, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC04: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC04 getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW04 DRAM Interface MDQ RTT Control -/// Word -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc04(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC04, i_target, l_value) ); - memcpy(o_array, &l_value, 4); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC04: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC05 getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW05 DRAM Interface MDQ Driver Control -/// Word -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc05(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC05, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC05: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC05 getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW05 DRAM Interface MDQ Driver Control -/// Word -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc05(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC05, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC05: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC05 getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW05 DRAM Interface MDQ Driver Control -/// Word -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc05(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC05, i_target, l_value) ); - memcpy(o_array, &l_value, 4); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC05: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC06 getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW06 Command Space Control -/// Word -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc06(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC06, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC06: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC06 getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW06 Command Space Control -/// Word -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc06(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC06, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC06: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC06 getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW06 Command Space Control -/// Word -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc06(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC06, i_target, l_value) ); - memcpy(o_array, &l_value, 4); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC06: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC07 getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW07 Rank Presence Control -/// Word -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc07(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC07, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC07: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC07 getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW07 Rank Presence Control -/// Word -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc07(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC07, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC07: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC07 getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW07 Rank Presence Control -/// Word -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc07(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC07, i_target, l_value) ); - memcpy(o_array, &l_value, 4); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC07: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC08 getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW08 RankSelection Control -/// Word -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc08(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC08, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC08: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC08 getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW08 RankSelection Control -/// Word -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc08(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC08, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC08: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC08 getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW08 RankSelection Control -/// Word -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc08(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC08, i_target, l_value) ); - memcpy(o_array, &l_value, 4); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC08: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC09 getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW09 Power Saving Settings Control -/// Word -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc09(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC09, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC09: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC09 getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW09 Power Saving Settings Control -/// Word -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc09(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC09, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC09: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC09 getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW09 Power Saving Settings Control -/// Word -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc09(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC09, i_target, l_value) ); - memcpy(o_array, &l_value, 4); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC09: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC0A getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW0A LRDIMM Operating -/// Speed -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc0a(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC0A, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC0A: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC0A getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW0A LRDIMM Operating -/// Speed -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc0a(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC0A, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC0A: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC0A getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW0A LRDIMM Operating -/// Speed -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc0a(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC0A, i_target, l_value) ); - memcpy(o_array, &l_value, 4); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC0A: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC0B getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW0B Operating Voltage Control -/// Word -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc0b(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC0B, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC0B: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC0B getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW0B Operating Voltage Control -/// Word -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc0b(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC0B, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC0B: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC0B getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW0B Operating Voltage Control -/// Word -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc0b(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC0B, i_target, l_value) ); - memcpy(o_array, &l_value, 4); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC0B: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC0C getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW0C Buffer Training Mode Control -/// Word -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc0c(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC0C, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC0C: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC0C getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW0C Buffer Training Mode Control -/// Word -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc0c(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC0C, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC0C: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC0C getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW0C Buffer Training Mode Control -/// Word -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc0c(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC0C, i_target, l_value) ); - memcpy(o_array, &l_value, 4); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC0C: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC0D getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW0D Reserved for future -/// use -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc0d(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC0D, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC0D: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC0D getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW0D Reserved for future -/// use -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc0d(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC0D, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC0D: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC0D getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW0D Reserved for future -/// use -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc0d(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC0D, i_target, l_value) ); - memcpy(o_array, &l_value, 4); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC0D: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC0E getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW0E Parity Control -/// Word -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc0e(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC0E, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC0E: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC0E getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW0E Parity Control -/// Word -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc0e(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC0E, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC0E: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC0E getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW0E Parity Control -/// Word -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc0e(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC0E, i_target, l_value) ); - memcpy(o_array, &l_value, 4); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC0E: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC0F getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW0F Error Status -/// Word -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc0f(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC0F, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC0F: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC0F getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW0F Error Status -/// Word -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc0f(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC0F, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC0F: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_BC0F getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW0F Error Status -/// Word -/// -inline fapi2::ReturnCode eff_dimm_ddr4_bc0f(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC0F, i_target, l_value) ); - memcpy(o_array, &l_value, 4); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC0F: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_F0BC1x getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW1x Buffer Configuration Control -/// Word -/// -inline fapi2::ReturnCode eff_dimm_ddr4_f0bc1x(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F0BC1x, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F0BC1x: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_F0BC1x getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW1x Buffer Configuration Control -/// Word -/// -inline fapi2::ReturnCode eff_dimm_ddr4_f0bc1x(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F0BC1x, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F0BC1x: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_F0BC1x getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW1x Buffer Configuration Control -/// Word -/// -inline fapi2::ReturnCode eff_dimm_ddr4_f0bc1x(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F0BC1x, i_target, l_value) ); - memcpy(o_array, &l_value, 4); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F0BC1x: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_F30BC2x getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F30BCW2x Lower Nibble DRAM Interface Receive Enable Training Control Word for -/// ranks 0 to -/// 3 -/// -inline fapi2::ReturnCode eff_dimm_ddr4_f30bc2x(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F30BC2x, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F30BC2x: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_F30BC2x getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F30BCW2x Lower Nibble DRAM Interface Receive Enable Training Control Word for -/// ranks 0 to -/// 3 -/// -inline fapi2::ReturnCode eff_dimm_ddr4_f30bc2x(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F30BC2x, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F30BC2x: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_F30BC2x getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F30BCW2x Lower Nibble DRAM Interface Receive Enable Training Control Word for -/// ranks 0 to -/// 3 -/// -inline fapi2::ReturnCode eff_dimm_ddr4_f30bc2x(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F30BC2x, i_target, l_value) ); - memcpy(o_array, &l_value, 4); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F30BC2x: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_F30BC3x getter +/// @brief ATTR_EFF_CS_CMD_LATENCY getter /// @param[in] const ref to the fapi2::Target /// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F30BCW3x Lower Nibble DRAM Interface Receive Enable Training Control Word for -/// ranks 0 to -/// 3 -/// -inline fapi2::ReturnCode eff_dimm_ddr4_f30bc3x(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F30BC3x, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F30BC3x: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DIMM_DDR4_F30BC3x getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) +/// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F30BCW3x Lower Nibble DRAM Interface Receive Enable Training Control Word for -/// ranks 0 to -/// 3 +/// @note CS to CMD/ADDR Latency. This is for DDR4 MRS4. Computed in mss_eff_cnfg. Each +/// memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// firmware notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f30bc3x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_cs_cmd_latency(const fapi2::Target& i_target, uint8_t& o_value) { - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); + uint8_t l_value[2]; + auto l_mca = i_target.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F30BC3x, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_CS_CMD_LATENCY, l_mca.getParent(), l_value) ); + o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F30BC3x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_CS_CMD_LATENCY: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F30BC3x getter +/// @brief ATTR_EFF_CS_CMD_LATENCY getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) +/// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F30BCW3x Lower Nibble DRAM Interface Receive Enable Training Control Word for -/// ranks 0 to -/// 3 +/// @note CS to CMD/ADDR Latency. This is for DDR4 MRS4. Computed in mss_eff_cnfg. Each +/// memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// firmware notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f30bc3x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_cs_cmd_latency(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -12928,83 +5661,81 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f30bc3x(const fapi2::Target +/// @brief ATTR_EFF_SELF_REF_ABORT getter +/// @param[in] const ref to the fapi2::Target /// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) +/// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F30BCW4x Lower Nibble MDQS Read Delay Control Word for ranks 0 to -/// 3 +/// @note Self Refresh Abort. This is for DDR4 MRS4. Computed in mss_eff_cnfg. Each memory +/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware +/// notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f30bc4x(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_self_ref_abort(const fapi2::Target& i_target, uint8_t& o_value) { - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); + uint8_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F30BC4x, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_SELF_REF_ABORT, i_target.getParent(), l_value) ); + o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F30BC4x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_SELF_REF_ABORT: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F30BC4x getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) +/// @brief ATTR_EFF_SELF_REF_ABORT getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint8_t +/// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F30BCW4x Lower Nibble MDQS Read Delay Control Word for ranks 0 to -/// 3 +/// @note Self Refresh Abort. This is for DDR4 MRS4. Computed in mss_eff_cnfg. Each memory +/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware +/// notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f30bc4x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_self_ref_abort(const fapi2::Target& i_target, uint8_t& o_value) { - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); + uint8_t l_value[2]; + auto l_mca = i_target.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F30BC4x, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_SELF_REF_ABORT, l_mca.getParent(), l_value) ); + o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F30BC4x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_SELF_REF_ABORT: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F30BC4x getter +/// @brief ATTR_EFF_SELF_REF_ABORT getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) +/// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F30BCW4x Lower Nibble MDQS Read Delay Control Word for ranks 0 to -/// 3 +/// @note Self Refresh Abort. This is for DDR4 MRS4. Computed in mss_eff_cnfg. Each memory +/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware +/// notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f30bc4x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_self_ref_abort(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -13012,83 +5743,81 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f30bc4x(const fapi2::Target +/// @brief ATTR_EFF_RD_PREAMBLE_TRAIN getter +/// @param[in] const ref to the fapi2::Target /// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) +/// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F30BCW5x Upper Nibble MDQS Read Delay Control Word for ranks 0 to -/// 3 +/// @note Read Pre amble Training Mode. This is for DDR4 MRS4. Computed in mss_eff_cnfg. +/// Each memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// firmware notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f30bc5x(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_rd_preamble_train(const fapi2::Target& i_target, uint8_t& o_value) { - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); + uint8_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F30BC5x, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_RD_PREAMBLE_TRAIN, i_target.getParent(), l_value) ); + o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F30BC5x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_RD_PREAMBLE_TRAIN: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F30BC5x getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) +/// @brief ATTR_EFF_RD_PREAMBLE_TRAIN getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint8_t +/// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F30BCW5x Upper Nibble MDQS Read Delay Control Word for ranks 0 to -/// 3 +/// @note Read Pre amble Training Mode. This is for DDR4 MRS4. Computed in mss_eff_cnfg. +/// Each memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// firmware notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f30bc5x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_rd_preamble_train(const fapi2::Target& i_target, uint8_t& o_value) { - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); + uint8_t l_value[2]; + auto l_mca = i_target.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F30BC5x, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_RD_PREAMBLE_TRAIN, l_mca.getParent(), l_value) ); + o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F30BC5x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_RD_PREAMBLE_TRAIN: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F30BC5x getter +/// @brief ATTR_EFF_RD_PREAMBLE_TRAIN getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) +/// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F30BCW5x Upper Nibble MDQS Read Delay Control Word for ranks 0 to -/// 3 +/// @note Read Pre amble Training Mode. This is for DDR4 MRS4. Computed in mss_eff_cnfg. +/// Each memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// firmware notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f30bc5x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_rd_preamble_train(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -13096,83 +5825,81 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f30bc5x(const fapi2::Target +/// @brief ATTR_EFF_RD_PREAMBLE getter +/// @param[in] const ref to the fapi2::Target /// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) +/// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW6x Fine Granularity Frequency Operating Speed Control -/// Word +/// @note Read Pre amble. This is for DDR4 MRS4. Computed in mss_eff_cnfg. Each memory +/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware +/// notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f0bc6x(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_rd_preamble(const fapi2::Target& i_target, uint8_t& o_value) { - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); + uint8_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F0BC6x, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_RD_PREAMBLE, i_target.getParent(), l_value) ); + o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F0BC6x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_RD_PREAMBLE: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F0BC6x getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) +/// @brief ATTR_EFF_RD_PREAMBLE getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint8_t +/// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW6x Fine Granularity Frequency Operating Speed Control -/// Word +/// @note Read Pre amble. This is for DDR4 MRS4. Computed in mss_eff_cnfg. Each memory +/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware +/// notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f0bc6x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_rd_preamble(const fapi2::Target& i_target, uint8_t& o_value) { - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); + uint8_t l_value[2]; + auto l_mca = i_target.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F0BC6x, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_RD_PREAMBLE, l_mca.getParent(), l_value) ); + o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F0BC6x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_RD_PREAMBLE: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F0BC6x getter +/// @brief ATTR_EFF_RD_PREAMBLE getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) +/// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCW6x Fine Granularity Frequency Operating Speed Control -/// Word +/// @note Read Pre amble. This is for DDR4 MRS4. Computed in mss_eff_cnfg. Each memory +/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware +/// notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f0bc6x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_rd_preamble(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -13180,83 +5907,81 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f0bc6x(const fapi2::Target +/// @brief ATTR_EFF_WR_PREAMBLE getter +/// @param[in] const ref to the fapi2::Target /// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) +/// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F70BCW7x Function Space Selector Control -/// Word +/// @note Write Pre amble. This is for DDR4 MRS4. Computed in mss_eff_cnfg. Each memory +/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware +/// notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f70bc7x(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_wr_preamble(const fapi2::Target& i_target, uint8_t& o_value) { - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); + uint8_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F70BC7x, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_WR_PREAMBLE, i_target.getParent(), l_value) ); + o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F70BC7x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_WR_PREAMBLE: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F70BC7x getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) +/// @brief ATTR_EFF_WR_PREAMBLE getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint8_t +/// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F70BCW7x Function Space Selector Control -/// Word -/// -inline fapi2::ReturnCode eff_dimm_ddr4_f70bc7x(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); +/// @note Write Pre amble. This is for DDR4 MRS4. Computed in mss_eff_cnfg. Each memory +/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware +/// notes: +/// none +/// +inline fapi2::ReturnCode eff_wr_preamble(const fapi2::Target& i_target, uint8_t& o_value) +{ + uint8_t l_value[2]; + auto l_mca = i_target.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F70BC7x, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_WR_PREAMBLE, l_mca.getParent(), l_value) ); + o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F70BC7x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_WR_PREAMBLE: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F70BC7x getter +/// @brief ATTR_EFF_WR_PREAMBLE getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) +/// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F70BCW7x Function Space Selector Control -/// Word +/// @note Write Pre amble. This is for DDR4 MRS4. Computed in mss_eff_cnfg. Each memory +/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware +/// notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f70bc7x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_wr_preamble(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -13264,83 +5989,81 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f70bc7x(const fapi2::Target +/// @brief ATTR_EFF_CA_PARITY_LATENCY getter +/// @param[in] const ref to the fapi2::Target /// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) +/// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F30BCW8x Lower Nibble MDQ-MDQS Write Delay Control Word for ranks 0 to -/// 3 +/// @note C/A Parity Latency Mode. This is for DDR4 MRS5. Computed in mss_eff_cnfg. Each +/// memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// firmware notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f30bc8x(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_ca_parity_latency(const fapi2::Target& i_target, uint8_t& o_value) { - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); + uint8_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F30BC8x, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_CA_PARITY_LATENCY, i_target.getParent(), l_value) ); + o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F30BC8x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_CA_PARITY_LATENCY: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F30BC8x getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) +/// @brief ATTR_EFF_CA_PARITY_LATENCY getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint8_t +/// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F30BCW8x Lower Nibble MDQ-MDQS Write Delay Control Word for ranks 0 to -/// 3 +/// @note C/A Parity Latency Mode. This is for DDR4 MRS5. Computed in mss_eff_cnfg. Each +/// memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// firmware notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f30bc8x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_ca_parity_latency(const fapi2::Target& i_target, uint8_t& o_value) { - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); + uint8_t l_value[2]; + auto l_mca = i_target.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F30BC8x, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_CA_PARITY_LATENCY, l_mca.getParent(), l_value) ); + o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F30BC8x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_CA_PARITY_LATENCY: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F30BC8x getter +/// @brief ATTR_EFF_CA_PARITY_LATENCY getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) +/// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F30BCW8x Lower Nibble MDQ-MDQS Write Delay Control Word for ranks 0 to -/// 3 +/// @note C/A Parity Latency Mode. This is for DDR4 MRS5. Computed in mss_eff_cnfg. Each +/// memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// firmware notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f30bc8x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_ca_parity_latency(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -13348,83 +6071,81 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f30bc8x(const fapi2::Target +/// @brief ATTR_EFF_CRC_ERROR_CLEAR getter +/// @param[in] const ref to the fapi2::Target /// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) +/// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F30BCW9x Upper Nibble MDQ-MDQS Write Delay Control Word for ranks 0 to -/// 3 +/// @note CRC Error Clear. This is for DDR4 MRS5. Computed in mss_eff_cnfg. Each memory +/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware +/// notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f30bc9x(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_crc_error_clear(const fapi2::Target& i_target, uint8_t& o_value) { - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); + uint8_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F30BC9x, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_CRC_ERROR_CLEAR, i_target.getParent(), l_value) ); + o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F30BC9x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_CRC_ERROR_CLEAR: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F30BC9x getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) +/// @brief ATTR_EFF_CRC_ERROR_CLEAR getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint8_t +/// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F30BCW9x Upper Nibble MDQ-MDQS Write Delay Control Word for ranks 0 to -/// 3 +/// @note CRC Error Clear. This is for DDR4 MRS5. Computed in mss_eff_cnfg. Each memory +/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware +/// notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f30bc9x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_crc_error_clear(const fapi2::Target& i_target, uint8_t& o_value) { - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); + uint8_t l_value[2]; + auto l_mca = i_target.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F30BC9x, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_CRC_ERROR_CLEAR, l_mca.getParent(), l_value) ); + o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F30BC9x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_CRC_ERROR_CLEAR: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F30BC9x getter +/// @brief ATTR_EFF_CRC_ERROR_CLEAR getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) +/// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F30BCW9x Upper Nibble MDQ-MDQS Write Delay Control Word for ranks 0 to -/// 3 +/// @note CRC Error Clear. This is for DDR4 MRS5. Computed in mss_eff_cnfg. Each memory +/// channel will have a value. creator: mss_eff_cnfg consumer: various firmware +/// notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f30bc9x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_crc_error_clear(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -13432,83 +6153,85 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f30bc9x(const fapi2::Target +/// @brief ATTR_EFF_CA_PARITY_ERROR_STATUS getter +/// @param[in] const ref to the fapi2::Target /// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) +/// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F30BCWAx Lower Nibble DRAM Interface Write Leveling Control Word for ranks 0 to -/// 3 +/// @note C/A Parity Error Status. This is for DDR4 MRS5. Computed in mss_eff_cnfg. Each +/// memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// firmware notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f30bcax(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_ca_parity_error_status(const fapi2::Target& i_target, + uint8_t& o_value) { - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); + uint8_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F30BCAx, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_CA_PARITY_ERROR_STATUS, i_target.getParent(), + l_value) ); + o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F30BCAx: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_CA_PARITY_ERROR_STATUS: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F30BCAx getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) +/// @brief ATTR_EFF_CA_PARITY_ERROR_STATUS getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint8_t +/// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F30BCWAx Lower Nibble DRAM Interface Write Leveling Control Word for ranks 0 to -/// 3 +/// @note C/A Parity Error Status. This is for DDR4 MRS5. Computed in mss_eff_cnfg. Each +/// memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// firmware notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f30bcax(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_ca_parity_error_status(const fapi2::Target& i_target, + uint8_t& o_value) { - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); + uint8_t l_value[2]; + auto l_mca = i_target.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F30BCAx, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_CA_PARITY_ERROR_STATUS, l_mca.getParent(), l_value) ); + o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F30BCAx: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_CA_PARITY_ERROR_STATUS: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F30BCAx getter +/// @brief ATTR_EFF_CA_PARITY_ERROR_STATUS getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) +/// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F30BCWAx Lower Nibble DRAM Interface Write Leveling Control Word for ranks 0 to -/// 3 +/// @note C/A Parity Error Status. This is for DDR4 MRS5. Computed in mss_eff_cnfg. Each +/// memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// firmware notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f30bcax(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_ca_parity_error_status(const fapi2::Target& i_target, + uint8_t* o_array) { if (o_array == nullptr) { @@ -13516,83 +6239,81 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f30bcax(const fapi2::Target +/// @brief ATTR_EFF_ODT_INPUT_BUFF getter +/// @param[in] const ref to the fapi2::Target /// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) +/// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F30BCWBx Upper Nibble DRAM Interface Write Leveling Control Word for ranks 0 to -/// 3 +/// @note ODT Input Buffer during power down. This is for DDR4 MRS5. Computed in +/// mss_eff_cnfg. Each memory channel will have a value. creator: mss_eff_cnfg +/// consumer: various firmware notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f30bcbx(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_odt_input_buff(const fapi2::Target& i_target, uint8_t& o_value) { - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); + uint8_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F30BCBx, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_ODT_INPUT_BUFF, i_target.getParent(), l_value) ); + o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F30BCBx: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_ODT_INPUT_BUFF: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F30BCBx getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) +/// @brief ATTR_EFF_ODT_INPUT_BUFF getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint8_t +/// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F30BCWBx Upper Nibble DRAM Interface Write Leveling Control Word for ranks 0 to -/// 3 -/// -inline fapi2::ReturnCode eff_dimm_ddr4_f30bcbx(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); +/// @note ODT Input Buffer during power down. This is for DDR4 MRS5. Computed in +/// mss_eff_cnfg. Each memory channel will have a value. creator: mss_eff_cnfg +/// consumer: various firmware notes: +/// none +/// +inline fapi2::ReturnCode eff_odt_input_buff(const fapi2::Target& i_target, uint8_t& o_value) +{ + uint8_t l_value[2]; + auto l_mca = i_target.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F30BCBx, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_ODT_INPUT_BUFF, l_mca.getParent(), l_value) ); + o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F30BCBx: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_ODT_INPUT_BUFF: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F30BCBx getter +/// @brief ATTR_EFF_ODT_INPUT_BUFF getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) +/// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F30BCWBx Upper Nibble DRAM Interface Write Leveling Control Word for ranks 0 to -/// 3 +/// @note ODT Input Buffer during power down. This is for DDR4 MRS5. Computed in +/// mss_eff_cnfg. Each memory channel will have a value. creator: mss_eff_cnfg +/// consumer: various firmware notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f30bcbx(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_odt_input_buff(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -13600,86 +6321,81 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f30bcbx(const fapi2::Target +/// @brief ATTR_EFF_CA_PARITY getter +/// @param[in] const ref to the fapi2::Target /// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) +/// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCWCx Lower/Upper Nibble Additional Cycles of DRAM Interface Receive Enable -/// Control Word for rank -/// 0 +/// @note CA Parity Persistance Error. This is for DDR4 MRS5. Computed in mss_eff_cnfg. +/// Each memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// firmware notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f0bccx(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_ca_parity(const fapi2::Target& i_target, uint8_t& o_value) { - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); + uint8_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F0BCCx, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_CA_PARITY, i_target.getParent(), l_value) ); + o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F0BCCx: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_CA_PARITY: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F0BCCx getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) +/// @brief ATTR_EFF_CA_PARITY getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint8_t +/// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCWCx Lower/Upper Nibble Additional Cycles of DRAM Interface Receive Enable -/// Control Word for rank -/// 0 +/// @note CA Parity Persistance Error. This is for DDR4 MRS5. Computed in mss_eff_cnfg. +/// Each memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// firmware notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f0bccx(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_ca_parity(const fapi2::Target& i_target, uint8_t& o_value) { - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); + uint8_t l_value[2]; + auto l_mca = i_target.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F0BCCx, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_CA_PARITY, l_mca.getParent(), l_value) ); + o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F0BCCx: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_CA_PARITY: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F0BCCx getter +/// @brief ATTR_EFF_CA_PARITY getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) +/// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCWCx Lower/Upper Nibble Additional Cycles of DRAM Interface Receive Enable -/// Control Word for rank -/// 0 +/// @note CA Parity Persistance Error. This is for DDR4 MRS5. Computed in mss_eff_cnfg. +/// Each memory channel will have a value. creator: mss_eff_cnfg consumer: various +/// firmware notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f0bccx(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_ca_parity(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -13687,86 +6403,78 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f0bccx(const fapi2::Target +/// @brief ATTR_EFF_DATA_MASK getter +/// @param[in] const ref to the fapi2::Target /// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) +/// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCWDx Lower/Upper Nibble Additional Cycles of DRAM Interface Write Leveling -/// Control Word for rank -/// 0 +/// @note Data Mask. This is for DDR4 MRS5. Computed in mss_eff_cnfg. Each memory channel +/// will have a value. creator: mss_eff_cnfg consumer: various firmware notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f0bcdx(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_data_mask(const fapi2::Target& i_target, uint8_t& o_value) { - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); + uint8_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F0BCDx, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DATA_MASK, i_target.getParent(), l_value) ); + o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F0BCDx: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DATA_MASK: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F0BCDx getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) +/// @brief ATTR_EFF_DATA_MASK getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint8_t +/// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCWDx Lower/Upper Nibble Additional Cycles of DRAM Interface Write Leveling -/// Control Word for rank -/// 0 +/// @note Data Mask. This is for DDR4 MRS5. Computed in mss_eff_cnfg. Each memory channel +/// will have a value. creator: mss_eff_cnfg consumer: various firmware notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f0bcdx(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_data_mask(const fapi2::Target& i_target, uint8_t& o_value) { - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); + uint8_t l_value[2]; + auto l_mca = i_target.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F0BCDx, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DATA_MASK, l_mca.getParent(), l_value) ); + o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F0BCDx: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DATA_MASK: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F0BCDx getter +/// @brief ATTR_EFF_DATA_MASK getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) +/// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCWDx Lower/Upper Nibble Additional Cycles of DRAM Interface Write Leveling -/// Control Word for rank -/// 0 +/// @note Data Mask. This is for DDR4 MRS5. Computed in mss_eff_cnfg. Each memory channel +/// will have a value. creator: mss_eff_cnfg consumer: various firmware notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f0bcdx(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_data_mask(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -13774,86 +6482,78 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f0bcdx(const fapi2::Target +/// @brief ATTR_EFF_WRITE_DBI getter +/// @param[in] const ref to the fapi2::Target /// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) +/// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCWEx Lower/Upper Nibble Additional Cycles of DRAM Interface Write Leveling -/// Control Word for rank -/// 0 +/// @note Write DBI. This is for DDR4 MRS5. Computed in mss_eff_cnfg. Each memory channel +/// will have a value. creator: mss_eff_cnfg consumer: various firmware notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f0bcex(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_write_dbi(const fapi2::Target& i_target, uint8_t& o_value) { - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); + uint8_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F0BCEx, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_WRITE_DBI, i_target.getParent(), l_value) ); + o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F0BCEx: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_WRITE_DBI: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F0BCEx getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) +/// @brief ATTR_EFF_WRITE_DBI getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint8_t +/// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCWEx Lower/Upper Nibble Additional Cycles of DRAM Interface Write Leveling -/// Control Word for rank -/// 0 +/// @note Write DBI. This is for DDR4 MRS5. Computed in mss_eff_cnfg. Each memory channel +/// will have a value. creator: mss_eff_cnfg consumer: various firmware notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f0bcex(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_write_dbi(const fapi2::Target& i_target, uint8_t& o_value) { - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); + uint8_t l_value[2]; + auto l_mca = i_target.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F0BCEx, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_WRITE_DBI, l_mca.getParent(), l_value) ); + o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F0BCEx: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_WRITE_DBI: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F0BCEx getter +/// @brief ATTR_EFF_WRITE_DBI getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) +/// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCWEx Lower/Upper Nibble Additional Cycles of DRAM Interface Write Leveling -/// Control Word for rank -/// 0 +/// @note Write DBI. This is for DDR4 MRS5. Computed in mss_eff_cnfg. Each memory channel +/// will have a value. creator: mss_eff_cnfg consumer: various firmware notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f0bcex(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_write_dbi(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -13861,86 +6561,78 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f0bcex(const fapi2::Target +/// @brief ATTR_EFF_READ_DBI getter +/// @param[in] const ref to the fapi2::Target /// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) +/// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCWFx Lower/Upper Nibble Additional Cycles of DRAM Interface Write Leveling -/// Control Word for rank -/// 2 +/// @note Read DBI. This is for DDR4 MRS5. Computed in mss_eff_cnfg. Each memory channel +/// will have a value. creator: mss_eff_cnfg consumer: various firmware notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f0bcfx(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_read_dbi(const fapi2::Target& i_target, uint8_t& o_value) { - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); + uint8_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F0BCFx, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_READ_DBI, i_target.getParent(), l_value) ); + o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F0BCFx: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_READ_DBI: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F0BCFx getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) +/// @brief ATTR_EFF_READ_DBI getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint8_t +/// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCWFx Lower/Upper Nibble Additional Cycles of DRAM Interface Write Leveling -/// Control Word for rank -/// 2 +/// @note Read DBI. This is for DDR4 MRS5. Computed in mss_eff_cnfg. Each memory channel +/// will have a value. creator: mss_eff_cnfg consumer: various firmware notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f0bcfx(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_read_dbi(const fapi2::Target& i_target, uint8_t& o_value) { - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); + uint8_t l_value[2]; + auto l_mca = i_target.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F0BCFx, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_READ_DBI, l_mca.getParent(), l_value) ); + o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F0BCFx: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_READ_DBI: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F0BCFx getter +/// @brief ATTR_EFF_READ_DBI getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) +/// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F0BCWFx Lower/Upper Nibble Additional Cycles of DRAM Interface Write Leveling -/// Control Word for rank -/// 2 +/// @note Read DBI. This is for DDR4 MRS5. Computed in mss_eff_cnfg. Each memory channel +/// will have a value. creator: mss_eff_cnfg consumer: various firmware notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f0bcfx(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_read_dbi(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -13948,55 +6640,65 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f0bcfx(const fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) +/// @param[out] uint8_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (A) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F1BCWCx Lower/Upper Nibble Additional Cycles of DRAM Interface Receive Enable -/// Control Word for rank -/// 1 +/// @note vrefdq_train value. This is for DDR4 MRS6. Computed in mss_eff_cnfg. Each memory +/// channel will have a value. Creator: mss_eff_cnfg Consumer:various Firmware +/// notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f1bccx(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_vref_dq_train_value(const fapi2::Target& i_target, + uint8_t* o_array) { - uint8_t l_value[2][2]; + if (o_array == nullptr) + { + FAPI_ERR("nullptr passed to attribute accessor %s", __func__); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + } + + uint8_t l_value[2][2][4]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F1BCCx, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_VREF_DQ_TRAIN_VALUE, l_mcs, l_value) ); + memcpy(o_array, &(l_value[mss::index(l_mca)][mss::index(i_target)][0]), 4); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F1BCCx: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_VREF_DQ_TRAIN_VALUE: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F1BCCx getter +/// @brief ATTR_EFF_VREF_DQ_TRAIN_VALUE getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) +/// @note Generated by gen_accessors.pl generateParameters (B) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F1BCWCx Lower/Upper Nibble Additional Cycles of DRAM Interface Receive Enable -/// Control Word for rank -/// 1 +/// @note vrefdq_train value. This is for DDR4 MRS6. Computed in mss_eff_cnfg. Each memory +/// channel will have a value. Creator: mss_eff_cnfg Consumer:various Firmware +/// notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f1bccx(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_vref_dq_train_value(const fapi2::Target& i_target, + uint8_t* o_array) { if (o_array == nullptr) { @@ -14004,30 +6706,32 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f1bccx(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F1BCCx, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_VREF_DQ_TRAIN_VALUE, l_mcs, l_value) ); + memcpy(o_array, &(l_value[mss::index(i_target)][0]), 8); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F1BCCx: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_VREF_DQ_TRAIN_VALUE: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F1BCCx getter +/// @brief ATTR_EFF_VREF_DQ_TRAIN_VALUE getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) +/// @note Generated by gen_accessors.pl generateParameters (C) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F1BCWCx Lower/Upper Nibble Additional Cycles of DRAM Interface Receive Enable -/// Control Word for rank -/// 1 +/// @note vrefdq_train value. This is for DDR4 MRS6. Computed in mss_eff_cnfg. Each memory +/// channel will have a value. Creator: mss_eff_cnfg Consumer:various Firmware +/// notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f1bccx(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_vref_dq_train_value(const fapi2::Target& i_target, + uint8_t* o_array) { if (o_array == nullptr) { @@ -14035,55 +6739,65 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f1bccx(const fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) +/// @param[out] uint8_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (A) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F1BCWDx Lower/Upper Nibble Additional Cycles of DRAM Interface Write Leveling -/// Control Word for rank -/// 1 +/// @note vrefdq_train range. This is for DDR4 MRS6. Computed in mss_eff_cnfg. Each memory +/// channel will have a value. Creator: mss_eff_cnfg Consumer:various Firmware +/// notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f1bcdx(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_vref_dq_train_range(const fapi2::Target& i_target, + uint8_t* o_array) { - uint8_t l_value[2][2]; + if (o_array == nullptr) + { + FAPI_ERR("nullptr passed to attribute accessor %s", __func__); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + } + + uint8_t l_value[2][2][4]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F1BCDx, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_VREF_DQ_TRAIN_RANGE, l_mcs, l_value) ); + memcpy(o_array, &(l_value[mss::index(l_mca)][mss::index(i_target)][0]), 4); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F1BCDx: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_VREF_DQ_TRAIN_RANGE: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F1BCDx getter +/// @brief ATTR_EFF_VREF_DQ_TRAIN_RANGE getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) +/// @note Generated by gen_accessors.pl generateParameters (B) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F1BCWDx Lower/Upper Nibble Additional Cycles of DRAM Interface Write Leveling -/// Control Word for rank -/// 1 +/// @note vrefdq_train range. This is for DDR4 MRS6. Computed in mss_eff_cnfg. Each memory +/// channel will have a value. Creator: mss_eff_cnfg Consumer:various Firmware +/// notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f1bcdx(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_vref_dq_train_range(const fapi2::Target& i_target, + uint8_t* o_array) { if (o_array == nullptr) { @@ -14091,30 +6805,32 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f1bcdx(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F1BCDx, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_VREF_DQ_TRAIN_RANGE, l_mcs, l_value) ); + memcpy(o_array, &(l_value[mss::index(i_target)][0]), 8); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F1BCDx: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_VREF_DQ_TRAIN_RANGE: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F1BCDx getter +/// @brief ATTR_EFF_VREF_DQ_TRAIN_RANGE getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) +/// @note Generated by gen_accessors.pl generateParameters (C) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F1BCWDx Lower/Upper Nibble Additional Cycles of DRAM Interface Write Leveling -/// Control Word for rank -/// 1 +/// @note vrefdq_train range. This is for DDR4 MRS6. Computed in mss_eff_cnfg. Each memory +/// channel will have a value. Creator: mss_eff_cnfg Consumer:various Firmware +/// notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f1bcdx(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_vref_dq_train_range(const fapi2::Target& i_target, + uint8_t* o_array) { if (o_array == nullptr) { @@ -14122,55 +6838,65 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f1bcdx(const fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) +/// @param[out] uint8_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (A) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F1BCWEx Lower/Upper Nibble Additional Cycles of DRAM Interface Receive Enable -/// Control Word for rank -/// 3 +/// @note vrefdq_train enable. This is for DDR4 MRS6. Computed in mss_eff_cnfg. Each +/// memory channel will have a value. Creator: mss_eff_cnfg Consumer:various +/// Firmware notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f1bcex(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_vref_dq_train_enable(const fapi2::Target& i_target, + uint8_t* o_array) { - uint8_t l_value[2][2]; + if (o_array == nullptr) + { + FAPI_ERR("nullptr passed to attribute accessor %s", __func__); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + } + + uint8_t l_value[2][2][4]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F1BCEx, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_VREF_DQ_TRAIN_ENABLE, l_mcs, l_value) ); + memcpy(o_array, &(l_value[mss::index(l_mca)][mss::index(i_target)][0]), 4); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F1BCEx: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_VREF_DQ_TRAIN_ENABLE: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F1BCEx getter +/// @brief ATTR_EFF_VREF_DQ_TRAIN_ENABLE getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) +/// @note Generated by gen_accessors.pl generateParameters (B) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F1BCWEx Lower/Upper Nibble Additional Cycles of DRAM Interface Receive Enable -/// Control Word for rank -/// 3 +/// @note vrefdq_train enable. This is for DDR4 MRS6. Computed in mss_eff_cnfg. Each +/// memory channel will have a value. Creator: mss_eff_cnfg Consumer:various +/// Firmware notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f1bcex(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_vref_dq_train_enable(const fapi2::Target& i_target, + uint8_t* o_array) { if (o_array == nullptr) { @@ -14178,30 +6904,32 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f1bcex(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F1BCEx, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_VREF_DQ_TRAIN_ENABLE, l_mcs, l_value) ); + memcpy(o_array, &(l_value[mss::index(i_target)][0]), 8); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F1BCEx: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_VREF_DQ_TRAIN_ENABLE: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F1BCEx getter +/// @brief ATTR_EFF_VREF_DQ_TRAIN_ENABLE getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) +/// @note Generated by gen_accessors.pl generateParameters (C) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F1BCWEx Lower/Upper Nibble Additional Cycles of DRAM Interface Receive Enable -/// Control Word for rank -/// 3 +/// @note vrefdq_train enable. This is for DDR4 MRS6. Computed in mss_eff_cnfg. Each +/// memory channel will have a value. Creator: mss_eff_cnfg Consumer:various +/// Firmware notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f1bcex(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_vref_dq_train_enable(const fapi2::Target& i_target, + uint8_t* o_array) { if (o_array == nullptr) { @@ -14209,55 +6937,78 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f1bcex(const fapi2::Target +/// @param[out] ref to the value uint8_t +/// @note Generated by gen_accessors.pl generateParameters (D) +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note Write CRC control for DDR4 in MRS2. Set in mss_eff_cnfg. Each memory channel +/// will have a value. Creator: mss_eff_cnfg Consumer:various Firmware notes: +/// none +/// +inline fapi2::ReturnCode eff_write_crc(const fapi2::Target& i_target, uint8_t& o_value) +{ + uint8_t l_value[2]; + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_WRITE_CRC, i_target.getParent(), l_value) ); + o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F1BCEx: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_WRITE_CRC: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F1BCFx getter +/// @brief ATTR_EFF_WRITE_CRC getter /// @param[in] const ref to the fapi2::Target /// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) +/// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F1BCWFx Lower/Upper Nibble Additional Cycles of DRAM Interface Write Leveling -/// Control Word for rank -/// 3 +/// @note Write CRC control for DDR4 in MRS2. Set in mss_eff_cnfg. Each memory channel +/// will have a value. Creator: mss_eff_cnfg Consumer:various Firmware notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f1bcfx(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_write_crc(const fapi2::Target& i_target, uint8_t& o_value) { - uint8_t l_value[2][2]; + uint8_t l_value[2]; auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F1BCFx, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_WRITE_CRC, l_mca.getParent(), l_value) ); + o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F1BCFx: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_WRITE_CRC: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F1BCFx getter -/// @param[in] const ref to the fapi2::Target +/// @brief ATTR_EFF_WRITE_CRC getter +/// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) +/// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F1BCWFx Lower/Upper Nibble Additional Cycles of DRAM Interface Write Leveling -/// Control Word for rank -/// 3 +/// @note Write CRC control for DDR4 in MRS2. Set in mss_eff_cnfg. Each memory channel +/// will have a value. Creator: mss_eff_cnfg Consumer:various Firmware notes: +/// none /// -inline fapi2::ReturnCode eff_dimm_ddr4_f1bcfx(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_write_crc(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -14265,84 +7016,108 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f1bcfx(const fapi2::Target(); + uint8_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F1BCFx, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_WRITE_CRC, i_target, l_value) ); + memcpy(o_array, &l_value, 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F1BCFx: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_WRITE_CRC: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F1BCFx getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) +/// @brief ATTR_MSS_CAL_STEP_ENABLE getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint32_t +/// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F1BCWFx Lower/Upper Nibble Additional Cycles of DRAM Interface Write Leveling -/// Control Word for rank -/// 3 +/// @note A bit map of vector denoting valid steps to run (0 is left most bit) [0] +/// DRAM_ZQCAL [1] DB_ZQCAL (LRDIMM) [2] MREP (LRDIMM) [3] MRD - Coarse (LRDIMM) [4] +/// MRD - Fine (LRDIMM) [5] WR_LEVEL [6] INITIAL_PAT_WR [7] WR_VREF_LATCH [8] DWL +/// (LRDIMM) [9] MWD - Coarse (LRDIMM) [10] MWD - Fine (LRDIMM) [11] HWL (LRDIMM) +/// [12] DQS_ALIGN [13] RDCLK_ALIGN [14] READ_CTR_2D_VREF [15] READ_CTR [16] +/// WRITE_CTR_2D_VREF [17] WRITE_CTR [18] COARSE_WR [19] COARSE_RD [20] +/// TRAINING_ADV_RD Only set for DD2.* machines [21] TRAINING_ADV_WR Only set for +/// DD2.* machines [22]:[31] Reserved for future use COARSE_WR and COARSE_RD will be +/// consumed together to form COARSE_LVL. WRITE_CTR will be run, even if only +/// WRITE_CTR_2D_VREF is enabled, as the WR 2D VREF HW cal depends upon WRITE_CTR 1D +/// to function. Note: LRDIMM steps will only be enabled for LRDIMMs and won't run +/// on +/// RDIMMs. /// -inline fapi2::ReturnCode eff_dimm_ddr4_f1bcfx(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode cal_step_enable(const fapi2::Target& i_target, uint32_t& o_value) { - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; + uint32_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F1BCFx, i_target, l_value) ); - memcpy(o_array, &l_value, 4); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_CAL_STEP_ENABLE, i_target.getParent(), l_value) ); + o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F1BCFx: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_CAL_STEP_ENABLE: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F4BC0x getter +/// @brief ATTR_MSS_CAL_STEP_ENABLE getter /// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) +/// @param[out] ref to the value uint32_t +/// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F4BCW0x MRS0 snooped -/// settings +/// @note A bit map of vector denoting valid steps to run (0 is left most bit) [0] +/// DRAM_ZQCAL [1] DB_ZQCAL (LRDIMM) [2] MREP (LRDIMM) [3] MRD - Coarse (LRDIMM) [4] +/// MRD - Fine (LRDIMM) [5] WR_LEVEL [6] INITIAL_PAT_WR [7] WR_VREF_LATCH [8] DWL +/// (LRDIMM) [9] MWD - Coarse (LRDIMM) [10] MWD - Fine (LRDIMM) [11] HWL (LRDIMM) +/// [12] DQS_ALIGN [13] RDCLK_ALIGN [14] READ_CTR_2D_VREF [15] READ_CTR [16] +/// WRITE_CTR_2D_VREF [17] WRITE_CTR [18] COARSE_WR [19] COARSE_RD [20] +/// TRAINING_ADV_RD Only set for DD2.* machines [21] TRAINING_ADV_WR Only set for +/// DD2.* machines [22]:[31] Reserved for future use COARSE_WR and COARSE_RD will be +/// consumed together to form COARSE_LVL. WRITE_CTR will be run, even if only +/// WRITE_CTR_2D_VREF is enabled, as the WR 2D VREF HW cal depends upon WRITE_CTR 1D +/// to function. Note: LRDIMM steps will only be enabled for LRDIMMs and won't run +/// on +/// RDIMMs. /// -inline fapi2::ReturnCode eff_dimm_ddr4_f4bc0x(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode cal_step_enable(const fapi2::Target& i_target, uint32_t& o_value) { - uint8_t l_value[2][2]; + uint32_t l_value[2]; auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F4BC0x, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_CAL_STEP_ENABLE, l_mca.getParent(), l_value) ); + o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F4BC0x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_CAL_STEP_ENABLE: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F4BC0x getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) +/// @brief ATTR_MSS_CAL_STEP_ENABLE getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] uint32_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F4BCW0x MRS0 snooped -/// settings +/// @note A bit map of vector denoting valid steps to run (0 is left most bit) [0] +/// DRAM_ZQCAL [1] DB_ZQCAL (LRDIMM) [2] MREP (LRDIMM) [3] MRD - Coarse (LRDIMM) [4] +/// MRD - Fine (LRDIMM) [5] WR_LEVEL [6] INITIAL_PAT_WR [7] WR_VREF_LATCH [8] DWL +/// (LRDIMM) [9] MWD - Coarse (LRDIMM) [10] MWD - Fine (LRDIMM) [11] HWL (LRDIMM) +/// [12] DQS_ALIGN [13] RDCLK_ALIGN [14] READ_CTR_2D_VREF [15] READ_CTR [16] +/// WRITE_CTR_2D_VREF [17] WRITE_CTR [18] COARSE_WR [19] COARSE_RD [20] +/// TRAINING_ADV_RD Only set for DD2.* machines [21] TRAINING_ADV_WR Only set for +/// DD2.* machines [22]:[31] Reserved for future use COARSE_WR and COARSE_RD will be +/// consumed together to form COARSE_LVL. WRITE_CTR will be run, even if only +/// WRITE_CTR_2D_VREF is enabled, as the WR 2D VREF HW cal depends upon WRITE_CTR 1D +/// to function. Note: LRDIMM steps will only be enabled for LRDIMMs and won't run +/// on +/// RDIMMs. /// -inline fapi2::ReturnCode eff_dimm_ddr4_f4bc0x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode cal_step_enable(const fapi2::Target& i_target, uint32_t* o_array) { if (o_array == nullptr) { @@ -14350,83 +7125,95 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f4bc0x(const fapi2::Target(); + uint32_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F4BC0x, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_CAL_STEP_ENABLE, i_target, l_value) ); + memcpy(o_array, &l_value, 8); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F4BC0x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_CAL_STEP_ENABLE: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F4BC0x getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) +/// @brief ATTR_MSS_CUSTOM_TRAINING_ADV_PATTERNS getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint32_t +/// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F4BCW0x MRS0 snooped -/// settings +/// @note Special training pattern used in draminit_training_advance. Used for custom +/// pattern read There can be two patterns used here. This attribute is before +/// swizzling for endianness of the registers. CODE WILL SWIZZLE FOR THE SYSTEM The +/// first 0-15 bits are for PATTERN0, bits 16-32 are for PATTERN1. If this attribute +/// is set to 0, using the default values of: 0x8E94 for PATTERN0 0x2BC6 for +/// PATTERN1 Set to default in +/// eff_config /// -inline fapi2::ReturnCode eff_dimm_ddr4_f4bc0x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode custom_training_adv_patterns(const fapi2::Target& i_target, + uint32_t& o_value) { - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; + uint32_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F4BC0x, i_target, l_value) ); - memcpy(o_array, &l_value, 4); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_CUSTOM_TRAINING_ADV_PATTERNS, i_target.getParent(), + l_value) ); + o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F4BC0x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_CUSTOM_TRAINING_ADV_PATTERNS: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F4BC1x getter +/// @brief ATTR_MSS_CUSTOM_TRAINING_ADV_PATTERNS getter /// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) +/// @param[out] ref to the value uint32_t +/// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F4BCW1x MRS1 snooped -/// settings +/// @note Special training pattern used in draminit_training_advance. Used for custom +/// pattern read There can be two patterns used here. This attribute is before +/// swizzling for endianness of the registers. CODE WILL SWIZZLE FOR THE SYSTEM The +/// first 0-15 bits are for PATTERN0, bits 16-32 are for PATTERN1. If this attribute +/// is set to 0, using the default values of: 0x8E94 for PATTERN0 0x2BC6 for +/// PATTERN1 Set to default in +/// eff_config /// -inline fapi2::ReturnCode eff_dimm_ddr4_f4bc1x(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode custom_training_adv_patterns(const fapi2::Target& i_target, + uint32_t& o_value) { - uint8_t l_value[2][2]; + uint32_t l_value[2]; auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F4BC1x, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_CUSTOM_TRAINING_ADV_PATTERNS, l_mca.getParent(), + l_value) ); + o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F4BC1x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_CUSTOM_TRAINING_ADV_PATTERNS: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F4BC1x getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) +/// @brief ATTR_MSS_CUSTOM_TRAINING_ADV_PATTERNS getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] uint32_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F4BCW1x MRS1 snooped -/// settings +/// @note Special training pattern used in draminit_training_advance. Used for custom +/// pattern read There can be two patterns used here. This attribute is before +/// swizzling for endianness of the registers. CODE WILL SWIZZLE FOR THE SYSTEM The +/// first 0-15 bits are for PATTERN0, bits 16-32 are for PATTERN1. If this attribute +/// is set to 0, using the default values of: 0x8E94 for PATTERN0 0x2BC6 for +/// PATTERN1 Set to default in +/// eff_config /// -inline fapi2::ReturnCode eff_dimm_ddr4_f4bc1x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode custom_training_adv_patterns(const fapi2::Target& i_target, + uint32_t* o_array) { if (o_array == nullptr) { @@ -14434,83 +7221,98 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f4bc1x(const fapi2::Target(); + uint32_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F4BC1x, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_CUSTOM_TRAINING_ADV_PATTERNS, i_target, l_value) ); + memcpy(o_array, &l_value, 8); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F4BC1x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_CUSTOM_TRAINING_ADV_PATTERNS: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F4BC1x getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) +/// @brief ATTR_MSS_CUSTOM_TRAINING_ADV_BACKUP_PATTERNS getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint32_t +/// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F4BCW1x MRS1 snooped -/// settings +/// @note Special training backup pattern Used for custom_pattern_read in +/// draminit_training_advance. If the main patterns fail, the code will try running +/// this pattern Used for read centering There can be two patterns used here. This +/// attribute is before swizzling for endianness of the registers. CODE WILL SWIZZLE +/// FOR THE SYSTEM The first 0-15 bits are for PATTERN0, bits 16-32 are for +/// PATTERN1. If this attribute is set to 0, using the default values of: 0xEA0C for +/// PATTERN0 0xA6C9 for PATTERN1 Set to default in +/// eff_config /// -inline fapi2::ReturnCode eff_dimm_ddr4_f4bc1x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode custom_training_adv_backup_patterns(const fapi2::Target& i_target, + uint32_t& o_value) { - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; + uint32_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F4BC1x, i_target, l_value) ); - memcpy(o_array, &l_value, 4); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_CUSTOM_TRAINING_ADV_BACKUP_PATTERNS, + i_target.getParent(), l_value) ); + o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F4BC1x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_CUSTOM_TRAINING_ADV_BACKUP_PATTERNS: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F4BC2x getter +/// @brief ATTR_MSS_CUSTOM_TRAINING_ADV_BACKUP_PATTERNS getter /// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) +/// @param[out] ref to the value uint32_t +/// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F4BCW2x MRS2 snooped -/// settings +/// @note Special training backup pattern Used for custom_pattern_read in +/// draminit_training_advance. If the main patterns fail, the code will try running +/// this pattern Used for read centering There can be two patterns used here. This +/// attribute is before swizzling for endianness of the registers. CODE WILL SWIZZLE +/// FOR THE SYSTEM The first 0-15 bits are for PATTERN0, bits 16-32 are for +/// PATTERN1. If this attribute is set to 0, using the default values of: 0xEA0C for +/// PATTERN0 0xA6C9 for PATTERN1 Set to default in +/// eff_config /// -inline fapi2::ReturnCode eff_dimm_ddr4_f4bc2x(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode custom_training_adv_backup_patterns(const fapi2::Target& i_target, + uint32_t& o_value) { - uint8_t l_value[2][2]; + uint32_t l_value[2]; auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F4BC2x, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_CUSTOM_TRAINING_ADV_BACKUP_PATTERNS, l_mca.getParent(), + l_value) ); + o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F4BC2x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_CUSTOM_TRAINING_ADV_BACKUP_PATTERNS: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F4BC2x getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) +/// @brief ATTR_MSS_CUSTOM_TRAINING_ADV_BACKUP_PATTERNS getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] uint32_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F4BCW2x MRS2 snooped -/// settings +/// @note Special training backup pattern Used for custom_pattern_read in +/// draminit_training_advance. If the main patterns fail, the code will try running +/// this pattern Used for read centering There can be two patterns used here. This +/// attribute is before swizzling for endianness of the registers. CODE WILL SWIZZLE +/// FOR THE SYSTEM The first 0-15 bits are for PATTERN0, bits 16-32 are for +/// PATTERN1. If this attribute is set to 0, using the default values of: 0xEA0C for +/// PATTERN0 0xA6C9 for PATTERN1 Set to default in +/// eff_config /// -inline fapi2::ReturnCode eff_dimm_ddr4_f4bc2x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode custom_training_adv_backup_patterns(const fapi2::Target& i_target, + uint32_t* o_array) { if (o_array == nullptr) { @@ -14518,83 +7320,98 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f4bc2x(const fapi2::Target(); + uint32_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F4BC2x, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_CUSTOM_TRAINING_ADV_BACKUP_PATTERNS, i_target, l_value) ); + memcpy(o_array, &l_value, 8); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F4BC2x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_CUSTOM_TRAINING_ADV_BACKUP_PATTERNS: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F4BC2x getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) +/// @brief ATTR_MSS_CUSTOM_TRAINING_ADV_BACKUP_PATTERNS2 getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint32_t +/// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F4BCW2x MRS2 snooped -/// settings +/// @note Special training backup pattern number 2 Used for custom_pattern_read in +/// draminit_training_advance. If the main patterns fail, the code will try running +/// this pattern Used for read centering There can be two patterns used here. This +/// attribute is before swizzling for endianness of the registers. CODE WILL SWIZZLE +/// FOR THE SYSTEM The first 0-15 bits are for PATTERN0, bits 16-32 are for +/// PATTERN1. If this attribute is set to 0, using the default values of: 0x13EC for +/// PATTERN0 0x02FD for PATTERN1 Set to default in +/// eff_config /// -inline fapi2::ReturnCode eff_dimm_ddr4_f4bc2x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode custom_training_adv_backup_patterns2(const fapi2::Target& i_target, + uint32_t& o_value) { - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; + uint32_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F4BC2x, i_target, l_value) ); - memcpy(o_array, &l_value, 4); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_CUSTOM_TRAINING_ADV_BACKUP_PATTERNS2, + i_target.getParent(), l_value) ); + o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F4BC2x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_CUSTOM_TRAINING_ADV_BACKUP_PATTERNS2: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F4BC3x getter +/// @brief ATTR_MSS_CUSTOM_TRAINING_ADV_BACKUP_PATTERNS2 getter /// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) +/// @param[out] ref to the value uint32_t +/// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F4BCW3x MRS3 snooped -/// settings +/// @note Special training backup pattern number 2 Used for custom_pattern_read in +/// draminit_training_advance. If the main patterns fail, the code will try running +/// this pattern Used for read centering There can be two patterns used here. This +/// attribute is before swizzling for endianness of the registers. CODE WILL SWIZZLE +/// FOR THE SYSTEM The first 0-15 bits are for PATTERN0, bits 16-32 are for +/// PATTERN1. If this attribute is set to 0, using the default values of: 0x13EC for +/// PATTERN0 0x02FD for PATTERN1 Set to default in +/// eff_config /// -inline fapi2::ReturnCode eff_dimm_ddr4_f4bc3x(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode custom_training_adv_backup_patterns2(const fapi2::Target& i_target, + uint32_t& o_value) { - uint8_t l_value[2][2]; + uint32_t l_value[2]; auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F4BC3x, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_CUSTOM_TRAINING_ADV_BACKUP_PATTERNS2, l_mca.getParent(), + l_value) ); + o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F4BC3x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_CUSTOM_TRAINING_ADV_BACKUP_PATTERNS2: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F4BC3x getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) +/// @brief ATTR_MSS_CUSTOM_TRAINING_ADV_BACKUP_PATTERNS2 getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] uint32_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F4BCW3x MRS3 snooped -/// settings +/// @note Special training backup pattern number 2 Used for custom_pattern_read in +/// draminit_training_advance. If the main patterns fail, the code will try running +/// this pattern Used for read centering There can be two patterns used here. This +/// attribute is before swizzling for endianness of the registers. CODE WILL SWIZZLE +/// FOR THE SYSTEM The first 0-15 bits are for PATTERN0, bits 16-32 are for +/// PATTERN1. If this attribute is set to 0, using the default values of: 0x13EC for +/// PATTERN0 0x02FD for PATTERN1 Set to default in +/// eff_config /// -inline fapi2::ReturnCode eff_dimm_ddr4_f4bc3x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode custom_training_adv_backup_patterns2(const fapi2::Target& i_target, + uint32_t* o_array) { if (o_array == nullptr) { @@ -14602,83 +7419,92 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f4bc3x(const fapi2::Target(); + uint32_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F4BC3x, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_CUSTOM_TRAINING_ADV_BACKUP_PATTERNS2, i_target, l_value) ); + memcpy(o_array, &l_value, 8); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F4BC3x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_CUSTOM_TRAINING_ADV_BACKUP_PATTERNS2: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F4BC3x getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) +/// @brief ATTR_MSS_CUSTOM_TRAINING_ADV_WR_PATTERN getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint8_t +/// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F4BCW3x MRS3 snooped -/// settings +/// @note Special training pattern used in draminit_training_advance. Used for custom +/// pattern write Due to hardware limitations, only one 8-bit pattern can be used +/// This attribute is before swizzling for endianness of the registers. CODE WILL +/// SWIZZLE FOR THE SYSTEM If this attribute is set to 0, using the default values +/// of: 0x9A Set to default in +/// eff_config /// -inline fapi2::ReturnCode eff_dimm_ddr4_f4bc3x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode custom_training_adv_wr_pattern(const fapi2::Target& i_target, + uint8_t& o_value) { - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; + uint8_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F4BC3x, i_target, l_value) ); - memcpy(o_array, &l_value, 4); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_CUSTOM_TRAINING_ADV_WR_PATTERN, i_target.getParent(), + l_value) ); + o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F4BC3x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_CUSTOM_TRAINING_ADV_WR_PATTERN: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F4BC4x getter +/// @brief ATTR_MSS_CUSTOM_TRAINING_ADV_WR_PATTERN getter /// @param[in] const ref to the fapi2::Target /// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) +/// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F4BCW4x MRS4 snooped -/// settings +/// @note Special training pattern used in draminit_training_advance. Used for custom +/// pattern write Due to hardware limitations, only one 8-bit pattern can be used +/// This attribute is before swizzling for endianness of the registers. CODE WILL +/// SWIZZLE FOR THE SYSTEM If this attribute is set to 0, using the default values +/// of: 0x9A Set to default in +/// eff_config /// -inline fapi2::ReturnCode eff_dimm_ddr4_f4bc4x(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode custom_training_adv_wr_pattern(const fapi2::Target& i_target, + uint8_t& o_value) { - uint8_t l_value[2][2]; + uint8_t l_value[2]; auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F4BC4x, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_CUSTOM_TRAINING_ADV_WR_PATTERN, l_mca.getParent(), + l_value) ); + o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F4BC4x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_CUSTOM_TRAINING_ADV_WR_PATTERN: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F4BC4x getter -/// @param[in] const ref to the fapi2::Target +/// @brief ATTR_MSS_CUSTOM_TRAINING_ADV_WR_PATTERN getter +/// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) +/// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F4BCW4x MRS4 snooped -/// settings +/// @note Special training pattern used in draminit_training_advance. Used for custom +/// pattern write Due to hardware limitations, only one 8-bit pattern can be used +/// This attribute is before swizzling for endianness of the registers. CODE WILL +/// SWIZZLE FOR THE SYSTEM If this attribute is set to 0, using the default values +/// of: 0x9A Set to default in +/// eff_config /// -inline fapi2::ReturnCode eff_dimm_ddr4_f4bc4x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode custom_training_adv_wr_pattern(const fapi2::Target& i_target, + uint8_t* o_array) { if (o_array == nullptr) { @@ -14686,83 +7512,81 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f4bc4x(const fapi2::Target(); + uint8_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F4BC4x, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_CUSTOM_TRAINING_ADV_WR_PATTERN, i_target, l_value) ); + memcpy(o_array, &l_value, 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F4BC4x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_CUSTOM_TRAINING_ADV_WR_PATTERN: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F4BC4x getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) +/// @brief ATTR_MSS_VREF_CAL_ENABLE getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint16_t +/// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F4BCW4x MRS4 snooped -/// settings +/// @note A bit vector denoting bits in every DP16 on the port to be calibrated. That is, +/// all of the set bits will be calibrated for all DP16. A value of zero indicates +/// the calibration should not be +/// run. /// -inline fapi2::ReturnCode eff_dimm_ddr4_f4bc4x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode vref_cal_enable(const fapi2::Target& i_target, uint16_t& o_value) { - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; + uint16_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F4BC4x, i_target, l_value) ); - memcpy(o_array, &l_value, 4); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_VREF_CAL_ENABLE, i_target.getParent(), l_value) ); + o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F4BC4x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_VREF_CAL_ENABLE: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F4BC5x getter +/// @brief ATTR_MSS_VREF_CAL_ENABLE getter /// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) +/// @param[out] ref to the value uint16_t +/// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F4BCW5x MRS5 snooped -/// settings +/// @note A bit vector denoting bits in every DP16 on the port to be calibrated. That is, +/// all of the set bits will be calibrated for all DP16. A value of zero indicates +/// the calibration should not be +/// run. /// -inline fapi2::ReturnCode eff_dimm_ddr4_f4bc5x(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode vref_cal_enable(const fapi2::Target& i_target, uint16_t& o_value) { - uint8_t l_value[2][2]; + uint16_t l_value[2]; auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F4BC5x, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_VREF_CAL_ENABLE, l_mca.getParent(), l_value) ); + o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F4BC5x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_VREF_CAL_ENABLE: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F4BC5x getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) +/// @brief ATTR_MSS_VREF_CAL_ENABLE getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] uint16_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F4BCW5x MRS5 snooped -/// settings +/// @note A bit vector denoting bits in every DP16 on the port to be calibrated. That is, +/// all of the set bits will be calibrated for all DP16. A value of zero indicates +/// the calibration should not be +/// run. /// -inline fapi2::ReturnCode eff_dimm_ddr4_f4bc5x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode vref_cal_enable(const fapi2::Target& i_target, uint16_t* o_array) { if (o_array == nullptr) { @@ -14770,83 +7594,81 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f4bc5x(const fapi2::Target(); + uint16_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F4BC5x, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_VREF_CAL_ENABLE, i_target, l_value) ); + memcpy(o_array, &l_value, 4); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F4BC5x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_VREF_CAL_ENABLE: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F4BC5x getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) +/// @brief ATTR_MSS_RDVREF_CAL_ENABLE getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint16_t +/// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F4BCW5x MRS5 snooped -/// settings +/// @note A bit vector denoting bits in every DP16 on the port to be calibrated. That is, +/// all of the set bits will be calibrated for all DP16. A value of zero indicates +/// the calibration should not be +/// run. /// -inline fapi2::ReturnCode eff_dimm_ddr4_f4bc5x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode rdvref_cal_enable(const fapi2::Target& i_target, uint16_t& o_value) { - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; + uint16_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F4BC5x, i_target, l_value) ); - memcpy(o_array, &l_value, 4); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_RDVREF_CAL_ENABLE, i_target.getParent(), l_value) ); + o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F4BC5x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_RDVREF_CAL_ENABLE: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F4BC6x getter +/// @brief ATTR_MSS_RDVREF_CAL_ENABLE getter /// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) +/// @param[out] ref to the value uint16_t +/// @note Generated by gen_accessors.pl generateParameters (D.1) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F4BCW6x MRS6 snooped -/// settings +/// @note A bit vector denoting bits in every DP16 on the port to be calibrated. That is, +/// all of the set bits will be calibrated for all DP16. A value of zero indicates +/// the calibration should not be +/// run. /// -inline fapi2::ReturnCode eff_dimm_ddr4_f4bc6x(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode rdvref_cal_enable(const fapi2::Target& i_target, uint16_t& o_value) { - uint8_t l_value[2][2]; + uint16_t l_value[2]; auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F4BC6x, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_RDVREF_CAL_ENABLE, l_mca.getParent(), l_value) ); + o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F4BC6x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_RDVREF_CAL_ENABLE: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F4BC6x getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) +/// @brief ATTR_MSS_RDVREF_CAL_ENABLE getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] uint16_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F4BCW6x MRS6 snooped -/// settings +/// @note A bit vector denoting bits in every DP16 on the port to be calibrated. That is, +/// all of the set bits will be calibrated for all DP16. A value of zero indicates +/// the calibration should not be +/// run. /// -inline fapi2::ReturnCode eff_dimm_ddr4_f4bc6x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode rdvref_cal_enable(const fapi2::Target& i_target, uint16_t* o_array) { if (o_array == nullptr) { @@ -14854,113 +7676,97 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f4bc6x(const fapi2::Target(); + uint16_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F4BC6x, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_RDVREF_CAL_ENABLE, i_target, l_value) ); + memcpy(o_array, &l_value, 4); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F4BC6x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_RDVREF_CAL_ENABLE: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F4BC6x getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) +/// @brief ATTR_MSS_CAL_ABORT_ON_ERROR getter +/// @param[out] uint8_t& reference to store the value +/// @note Generated by gen_accessors.pl generateParameters (SYSTEM) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F4BCW6x MRS6 snooped -/// settings +/// @note Whether or not to abort on the first DDR PHY calibration error. Firmware should +/// always have this set to NO. YES can be used in the lab for troubleshooting, +/// screening, +/// etc. /// -inline fapi2::ReturnCode eff_dimm_ddr4_f4bc6x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode cal_abort_on_error(uint8_t& o_value) { - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - uint8_t l_value[2][2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F4BC6x, i_target, l_value) ); - memcpy(o_array, &l_value, 4); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_CAL_ABORT_ON_ERROR, fapi2::Target(), o_value) ); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F4BC6x: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); + FAPI_ERR("failed accessing ATTR_MSS_CAL_ABORT_ON_ERROR: 0x%lx (system target)", + uint64_t(fapi2::current_err)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F5BC0x getter -/// @param[in] const ref to the fapi2::Target +/// @brief ATTR_MSS_VREF_DAC_NIBBLE getter +/// @param[in] const ref to the fapi2::Target /// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) +/// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F5BCW0x Upper and Lower MPR bits[7:0] for -/// U0 +/// @note Value for VREF DAC +/// nibble /// -inline fapi2::ReturnCode eff_dimm_ddr4_f5bc0x(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode vref_dac_nibble(const fapi2::Target& i_target, uint8_t& o_value) { - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); + uint8_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F5BC0x, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_VREF_DAC_NIBBLE, i_target.getParent(), l_value) ); + o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F5BC0x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_VREF_DAC_NIBBLE: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F5BC0x getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F5BCW0x Upper and Lower MPR bits[7:0] for -/// U0 -/// -inline fapi2::ReturnCode eff_dimm_ddr4_f5bc0x(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); +/// @brief ATTR_MSS_VREF_DAC_NIBBLE getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint8_t +/// @note Generated by gen_accessors.pl generateParameters (D.1) +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note Value for VREF DAC +/// nibble +/// +inline fapi2::ReturnCode vref_dac_nibble(const fapi2::Target& i_target, uint8_t& o_value) +{ + uint8_t l_value[2]; + auto l_mca = i_target.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F5BC0x, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_VREF_DAC_NIBBLE, l_mca.getParent(), l_value) ); + o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F5BC0x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_MSS_VREF_DAC_NIBBLE: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F5BC0x getter +/// @brief ATTR_MSS_VREF_DAC_NIBBLE getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) +/// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F5BCW0x Upper and Lower MPR bits[7:0] for -/// U0 +/// @note Value for VREF DAC +/// nibble /// -inline fapi2::ReturnCode eff_dimm_ddr4_f5bc0x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode vref_dac_nibble(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -14968,53 +7774,61 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f5bc0x(const fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) +/// @param[out] uint8_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (A) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F5BCW1x Upper and Lower MPR bits[15:8] for -/// U1 +/// @note RTT_NOM value read to be programmed into MRS02 For RDIMMS, this is based off of +/// the VPD For LRDIMMS, this comes from the +/// SPD /// -inline fapi2::ReturnCode eff_dimm_ddr4_f5bc1x(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dram_rtt_nom(const fapi2::Target& i_target, uint8_t* o_array) { - uint8_t l_value[2][2]; + if (o_array == nullptr) + { + FAPI_ERR("nullptr passed to attribute accessor %s", __func__); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + } + + uint8_t l_value[2][2][4]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F5BC1x, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_RTT_NOM, l_mcs, l_value) ); + memcpy(o_array, &(l_value[mss::index(l_mca)][mss::index(i_target)][0]), 4); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F5BC1x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DRAM_RTT_NOM: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F5BC1x getter +/// @brief ATTR_EFF_DRAM_RTT_NOM getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) +/// @note Generated by gen_accessors.pl generateParameters (B) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F5BCW1x Upper and Lower MPR bits[15:8] for -/// U1 +/// @note RTT_NOM value read to be programmed into MRS02 For RDIMMS, this is based off of +/// the VPD For LRDIMMS, this comes from the +/// SPD /// -inline fapi2::ReturnCode eff_dimm_ddr4_f5bc1x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dram_rtt_nom(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -15022,29 +7836,30 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f5bc1x(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F5BC1x, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_RTT_NOM, l_mcs, l_value) ); + memcpy(o_array, &(l_value[mss::index(i_target)][0]), 8); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F5BC1x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DRAM_RTT_NOM: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F5BC1x getter +/// @brief ATTR_EFF_DRAM_RTT_NOM getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) +/// @note Generated by gen_accessors.pl generateParameters (C) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F5BCW1x Upper and Lower MPR bits[15:8] for -/// U1 +/// @note RTT_NOM value read to be programmed into MRS02 For RDIMMS, this is based off of +/// the VPD For LRDIMMS, this comes from the +/// SPD /// -inline fapi2::ReturnCode eff_dimm_ddr4_f5bc1x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dram_rtt_nom(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -15052,53 +7867,61 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f5bc1x(const fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) +/// @param[out] uint8_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (A) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F5BCW2x Upper and Lower MPR bits[23:16] for -/// U2 +/// @note RTT_WR value read to be programmed into MRS02 For RDIMMS, this is based off of +/// the VPD For LRDIMMS, this comes from the +/// SPD /// -inline fapi2::ReturnCode eff_dimm_ddr4_f5bc2x(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dram_rtt_wr(const fapi2::Target& i_target, uint8_t* o_array) { - uint8_t l_value[2][2]; + if (o_array == nullptr) + { + FAPI_ERR("nullptr passed to attribute accessor %s", __func__); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + } + + uint8_t l_value[2][2][4]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F5BC2x, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_RTT_WR, l_mcs, l_value) ); + memcpy(o_array, &(l_value[mss::index(l_mca)][mss::index(i_target)][0]), 4); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F5BC2x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DRAM_RTT_WR: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F5BC2x getter +/// @brief ATTR_EFF_DRAM_RTT_WR getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) +/// @note Generated by gen_accessors.pl generateParameters (B) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F5BCW2x Upper and Lower MPR bits[23:16] for -/// U2 +/// @note RTT_WR value read to be programmed into MRS02 For RDIMMS, this is based off of +/// the VPD For LRDIMMS, this comes from the +/// SPD /// -inline fapi2::ReturnCode eff_dimm_ddr4_f5bc2x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dram_rtt_wr(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -15106,29 +7929,30 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f5bc2x(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F5BC2x, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_RTT_WR, l_mcs, l_value) ); + memcpy(o_array, &(l_value[mss::index(i_target)][0]), 8); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F5BC2x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DRAM_RTT_WR: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F5BC2x getter +/// @brief ATTR_EFF_DRAM_RTT_WR getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) +/// @note Generated by gen_accessors.pl generateParameters (C) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F5BCW2x Upper and Lower MPR bits[23:16] for -/// U2 +/// @note RTT_WR value read to be programmed into MRS02 For RDIMMS, this is based off of +/// the VPD For LRDIMMS, this comes from the +/// SPD /// -inline fapi2::ReturnCode eff_dimm_ddr4_f5bc2x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dram_rtt_wr(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -15136,53 +7960,61 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f5bc2x(const fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) +/// @param[out] uint8_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (A) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F5BCW3x Upper and Lower MPR bits[31:24] for -/// U3 +/// @note RTT_PARK value read to be programmed into MRS05 For RDIMMS, this is based off of +/// the VPD For LRDIMMS, this comes from the +/// SPD /// -inline fapi2::ReturnCode eff_dimm_ddr4_f5bc3x(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dram_rtt_park(const fapi2::Target& i_target, uint8_t* o_array) { - uint8_t l_value[2][2]; + if (o_array == nullptr) + { + FAPI_ERR("nullptr passed to attribute accessor %s", __func__); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + } + + uint8_t l_value[2][2][4]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F5BC3x, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_RTT_PARK, l_mcs, l_value) ); + memcpy(o_array, &(l_value[mss::index(l_mca)][mss::index(i_target)][0]), 4); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F5BC3x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DRAM_RTT_PARK: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F5BC3x getter +/// @brief ATTR_EFF_DRAM_RTT_PARK getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) +/// @note Generated by gen_accessors.pl generateParameters (B) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F5BCW3x Upper and Lower MPR bits[31:24] for -/// U3 +/// @note RTT_PARK value read to be programmed into MRS05 For RDIMMS, this is based off of +/// the VPD For LRDIMMS, this comes from the +/// SPD /// -inline fapi2::ReturnCode eff_dimm_ddr4_f5bc3x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dram_rtt_park(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -15190,29 +8022,30 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f5bc3x(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F5BC3x, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_RTT_PARK, l_mcs, l_value) ); + memcpy(o_array, &(l_value[mss::index(i_target)][0]), 8); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F5BC3x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DRAM_RTT_PARK: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F5BC3x getter +/// @brief ATTR_EFF_DRAM_RTT_PARK getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) +/// @note Generated by gen_accessors.pl generateParameters (C) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F5BCW3x Upper and Lower MPR bits[31:24] for -/// U3 +/// @note RTT_PARK value read to be programmed into MRS05 For RDIMMS, this is based off of +/// the VPD For LRDIMMS, this comes from the +/// SPD /// -inline fapi2::ReturnCode eff_dimm_ddr4_f5bc3x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dram_rtt_park(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -15220,53 +8053,53 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f5bc3x(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F5BCW5x Host Interface Vref Control -/// Word +/// @note F0BCW00 Host Interface DQ RTT_NOM +/// Control /// -inline fapi2::ReturnCode eff_dimm_ddr4_f5bc5x(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_bc00(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F5BC5x, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC00, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F5BC5x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC00: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F5BC5x getter +/// @brief ATTR_EFF_DIMM_DDR4_BC00 getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F5BCW5x Host Interface Vref Control -/// Word +/// @note F0BCW00 Host Interface DQ RTT_NOM +/// Control /// -inline fapi2::ReturnCode eff_dimm_ddr4_f5bc5x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_bc00(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -15277,26 +8110,26 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f5bc5x(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F5BC5x, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC00, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F5BC5x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC00: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F5BC5x getter +/// @brief ATTR_EFF_DIMM_DDR4_BC00 getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F5BCW5x Host Interface Vref Control -/// Word +/// @note F0BCW00 Host Interface DQ RTT_NOM +/// Control /// -inline fapi2::ReturnCode eff_dimm_ddr4_f5bc5x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_bc00(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -15306,51 +8139,51 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f5bc5x(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F5BCW6x DRAM Interface Vref Control -/// Word +/// @note F0BCW01 Host Interface DQ RTT_WR +/// Control /// -inline fapi2::ReturnCode eff_dimm_ddr4_f5bc6x(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_bc01(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F5BC6x, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC01, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F5BC6x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC01: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F5BC6x getter +/// @brief ATTR_EFF_DIMM_DDR4_BC01 getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F5BCW6x DRAM Interface Vref Control -/// Word +/// @note F0BCW01 Host Interface DQ RTT_WR +/// Control /// -inline fapi2::ReturnCode eff_dimm_ddr4_f5bc6x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_bc01(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -15361,26 +8194,26 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f5bc6x(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F5BC6x, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC01, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F5BC6x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC01: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F5BC6x getter +/// @brief ATTR_EFF_DIMM_DDR4_BC01 getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F5BCW6x DRAM Interface Vref Control -/// Word +/// @note F0BCW01 Host Interface DQ RTT_WR +/// Control /// -inline fapi2::ReturnCode eff_dimm_ddr4_f5bc6x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_bc01(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -15390,51 +8223,51 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f5bc6x(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F6BCW0x Upper and Lower MPR bits[39:32] for -/// U4 +/// @note F0BCW02 Host Interface DQ RTT_PARK +/// Control /// -inline fapi2::ReturnCode eff_dimm_ddr4_f6bc0x(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_bc02(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F6BC0x, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC02, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F6BC0x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC02: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F6BC0x getter +/// @brief ATTR_EFF_DIMM_DDR4_BC02 getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F6BCW0x Upper and Lower MPR bits[39:32] for -/// U4 +/// @note F0BCW02 Host Interface DQ RTT_PARK +/// Control /// -inline fapi2::ReturnCode eff_dimm_ddr4_f6bc0x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_bc02(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -15445,26 +8278,26 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f6bc0x(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F6BC0x, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC02, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F6BC0x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC02: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F6BC0x getter +/// @brief ATTR_EFF_DIMM_DDR4_BC02 getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F6BCW0x Upper and Lower MPR bits[39:32] for -/// U4 +/// @note F0BCW02 Host Interface DQ RTT_PARK +/// Control /// -inline fapi2::ReturnCode eff_dimm_ddr4_f6bc0x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_bc02(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -15474,51 +8307,51 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f6bc0x(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F6BCW1x Upper and Lower MPR bits[47:40] for -/// U5 +/// @note F0BCW03 Host Interface DQ Driver Control +/// Word /// -inline fapi2::ReturnCode eff_dimm_ddr4_f6bc1x(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_bc03(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F6BC1x, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC03, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F6BC1x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC03: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F6BC1x getter +/// @brief ATTR_EFF_DIMM_DDR4_BC03 getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F6BCW1x Upper and Lower MPR bits[47:40] for -/// U5 +/// @note F0BCW03 Host Interface DQ Driver Control +/// Word /// -inline fapi2::ReturnCode eff_dimm_ddr4_f6bc1x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_bc03(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -15529,26 +8362,26 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f6bc1x(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F6BC1x, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC03, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F6BC1x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC03: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F6BC1x getter +/// @brief ATTR_EFF_DIMM_DDR4_BC03 getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F6BCW1x Upper and Lower MPR bits[47:40] for -/// U5 +/// @note F0BCW03 Host Interface DQ Driver Control +/// Word /// -inline fapi2::ReturnCode eff_dimm_ddr4_f6bc1x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_bc03(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -15558,51 +8391,51 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f6bc1x(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F6BCW2x Upper and Lower MPR bits[55:48] for -/// U6 +/// @note F0BCW04 DRAM Interface MDQ RTT Control +/// Word /// -inline fapi2::ReturnCode eff_dimm_ddr4_f6bc2x(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_bc04(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F6BC2x, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC04, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F6BC2x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC04: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F6BC2x getter +/// @brief ATTR_EFF_DIMM_DDR4_BC04 getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F6BCW2x Upper and Lower MPR bits[55:48] for -/// U6 +/// @note F0BCW04 DRAM Interface MDQ RTT Control +/// Word /// -inline fapi2::ReturnCode eff_dimm_ddr4_f6bc2x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_bc04(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -15613,26 +8446,26 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f6bc2x(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F6BC2x, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC04, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F6BC2x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC04: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F6BC2x getter +/// @brief ATTR_EFF_DIMM_DDR4_BC04 getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F6BCW2x Upper and Lower MPR bits[55:48] for -/// U6 +/// @note F0BCW04 DRAM Interface MDQ RTT Control +/// Word /// -inline fapi2::ReturnCode eff_dimm_ddr4_f6bc2x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_bc04(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -15642,51 +8475,51 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f6bc2x(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F6BCW3x Upper and Lower MPR bits[63:56] for -/// U7 +/// @note F0BCW05 DRAM Interface MDQ Driver Control +/// Word /// -inline fapi2::ReturnCode eff_dimm_ddr4_f6bc3x(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_bc05(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F6BC3x, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC05, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F6BC3x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC05: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F6BC3x getter +/// @brief ATTR_EFF_DIMM_DDR4_BC05 getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F6BCW3x Upper and Lower MPR bits[63:56] for -/// U7 +/// @note F0BCW05 DRAM Interface MDQ Driver Control +/// Word /// -inline fapi2::ReturnCode eff_dimm_ddr4_f6bc3x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_bc05(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -15697,26 +8530,26 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f6bc3x(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F6BC3x, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC05, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F6BC3x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC05: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F6BC3x getter +/// @brief ATTR_EFF_DIMM_DDR4_BC05 getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F6BCW3x Upper and Lower MPR bits[63:56] for -/// U7 +/// @note F0BCW05 DRAM Interface MDQ Driver Control +/// Word /// -inline fapi2::ReturnCode eff_dimm_ddr4_f6bc3x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_bc05(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -15726,51 +8559,51 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f6bc3x(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F6BCW4x Buffer Training Configuration Control +/// @note F0BCW07 Rank Presence Control /// Word /// -inline fapi2::ReturnCode eff_dimm_ddr4_f6bc4x(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_bc07(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F6BC4x, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC07, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F6BC4x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC07: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F6BC4x getter +/// @brief ATTR_EFF_DIMM_DDR4_BC07 getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F6BCW4x Buffer Training Configuration Control +/// @note F0BCW07 Rank Presence Control /// Word /// -inline fapi2::ReturnCode eff_dimm_ddr4_f6bc4x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_bc07(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -15781,26 +8614,26 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f6bc4x(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F6BC4x, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC07, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F6BC4x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC07: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F6BC4x getter +/// @brief ATTR_EFF_DIMM_DDR4_BC07 getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F6BCW4x Buffer Training Configuration Control +/// @note F0BCW07 Rank Presence Control /// Word /// -inline fapi2::ReturnCode eff_dimm_ddr4_f6bc4x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_bc07(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -15810,51 +8643,51 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f6bc4x(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F6BCW5x Buffer Training Status +/// @note F0BCW08 RankSelection Control /// Word /// -inline fapi2::ReturnCode eff_dimm_ddr4_f6bc5x(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_bc08(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F6BC5x, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC08, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F6BC5x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC08: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F6BC5x getter +/// @brief ATTR_EFF_DIMM_DDR4_BC08 getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F6BCW5x Buffer Training Status +/// @note F0BCW08 RankSelection Control /// Word /// -inline fapi2::ReturnCode eff_dimm_ddr4_f6bc5x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_bc08(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -15865,26 +8698,26 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f6bc5x(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F6BC5x, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC08, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F6BC5x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC08: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F6BC5x getter +/// @brief ATTR_EFF_DIMM_DDR4_BC08 getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F6BCW5x Buffer Training Status +/// @note F0BCW08 RankSelection Control /// Word /// -inline fapi2::ReturnCode eff_dimm_ddr4_f6bc5x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_bc08(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -15894,51 +8727,51 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f6bc5x(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F74BCW8x MDQ0/4 -Read Delay Control Word for ranks 0 to -/// 3 +/// @note F0BCW09 Power Saving Settings Control +/// Word /// -inline fapi2::ReturnCode eff_dimm_ddr4_f74bc8x(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_bc09(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F74BC8x, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC09, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F74BC8x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC09: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F74BC8x getter +/// @brief ATTR_EFF_DIMM_DDR4_BC09 getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F74BCW8x MDQ0/4 -Read Delay Control Word for ranks 0 to -/// 3 +/// @note F0BCW09 Power Saving Settings Control +/// Word /// -inline fapi2::ReturnCode eff_dimm_ddr4_f74bc8x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_bc09(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -15949,26 +8782,26 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f74bc8x(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F74BC8x, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC09, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F74BC8x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC09: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F74BC8x getter +/// @brief ATTR_EFF_DIMM_DDR4_BC09 getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F74BCW8x MDQ0/4 -Read Delay Control Word for ranks 0 to -/// 3 +/// @note F0BCW09 Power Saving Settings Control +/// Word /// -inline fapi2::ReturnCode eff_dimm_ddr4_f74bc8x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_bc09(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -15978,51 +8811,51 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f74bc8x(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F74BCW9x MDQ1/5 -Read Delay Control Word for ranks 0 to -/// 3 +/// @note F0BCW0A LRDIMM Operating +/// Speed /// -inline fapi2::ReturnCode eff_dimm_ddr4_f74bc9x(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_bc0a(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F74BC9x, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC0A, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F74BC9x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC0A: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F74BC9x getter +/// @brief ATTR_EFF_DIMM_DDR4_BC0A getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F74BCW9x MDQ1/5 -Read Delay Control Word for ranks 0 to -/// 3 +/// @note F0BCW0A LRDIMM Operating +/// Speed /// -inline fapi2::ReturnCode eff_dimm_ddr4_f74bc9x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_bc0a(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -16033,26 +8866,26 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f74bc9x(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F74BC9x, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC0A, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F74BC9x: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC0A: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F74BC9x getter +/// @brief ATTR_EFF_DIMM_DDR4_BC0A getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F74BCW9x MDQ1/5 -Read Delay Control Word for ranks 0 to -/// 3 +/// @note F0BCW0A LRDIMM Operating +/// Speed /// -inline fapi2::ReturnCode eff_dimm_ddr4_f74bc9x(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_bc0a(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -16062,51 +8895,51 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f74bc9x(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F74BCWAx MDQ2/6 -Read Delay Control Word for ranks 0 to -/// 3 +/// @note F0BCW0B Operating Voltage Control +/// Word /// -inline fapi2::ReturnCode eff_dimm_ddr4_f74bcax(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_bc0b(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F74BCAx, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC0B, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F74BCAx: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC0B: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F74BCAx getter +/// @brief ATTR_EFF_DIMM_DDR4_BC0B getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F74BCWAx MDQ2/6 -Read Delay Control Word for ranks 0 to -/// 3 +/// @note F0BCW0B Operating Voltage Control +/// Word /// -inline fapi2::ReturnCode eff_dimm_ddr4_f74bcax(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_bc0b(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -16117,26 +8950,26 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f74bcax(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F74BCAx, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC0B, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F74BCAx: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC0B: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F74BCAx getter +/// @brief ATTR_EFF_DIMM_DDR4_BC0B getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F74BCWAx MDQ2/6 -Read Delay Control Word for ranks 0 to -/// 3 +/// @note F0BCW0B Operating Voltage Control +/// Word /// -inline fapi2::ReturnCode eff_dimm_ddr4_f74bcax(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_bc0b(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -16146,51 +8979,51 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f74bcax(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F74BCWBx MDQ3/7 -Read Delay Control Word for ranks 0 to -/// 3 +/// @note F0BCW0C Buffer Training Mode Control +/// Word /// -inline fapi2::ReturnCode eff_dimm_ddr4_f74bcbx(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_bc0c(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F74BCBx, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC0C, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F74BCBx: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC0C: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F74BCBx getter +/// @brief ATTR_EFF_DIMM_DDR4_BC0C getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F74BCWBx MDQ3/7 -Read Delay Control Word for ranks 0 to -/// 3 +/// @note F0BCW0C Buffer Training Mode Control +/// Word /// -inline fapi2::ReturnCode eff_dimm_ddr4_f74bcbx(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_bc0c(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -16201,26 +9034,26 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f74bcbx(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F74BCBx, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC0C, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F74BCBx: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC0C: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F74BCBx getter +/// @brief ATTR_EFF_DIMM_DDR4_BC0C getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F74BCWBx MDQ3/7 -Read Delay Control Word for ranks 0 to -/// 3 +/// @note F0BCW0C Buffer Training Mode Control +/// Word /// -inline fapi2::ReturnCode eff_dimm_ddr4_f74bcbx(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_bc0c(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -16230,51 +9063,51 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f74bcbx(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F74BCWCx MDQ0/4-MDQS Write Delay Control Word for ranks 0 to -/// 3 +/// @note F0BCW0D Reserved for future +/// use /// -inline fapi2::ReturnCode eff_dimm_ddr4_f74bccx(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_bc0d(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F74BCCx, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC0D, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F74BCCx: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC0D: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F74BCCx getter +/// @brief ATTR_EFF_DIMM_DDR4_BC0D getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F74BCWCx MDQ0/4-MDQS Write Delay Control Word for ranks 0 to -/// 3 +/// @note F0BCW0D Reserved for future +/// use /// -inline fapi2::ReturnCode eff_dimm_ddr4_f74bccx(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_bc0d(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -16285,26 +9118,26 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f74bccx(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F74BCCx, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC0D, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F74BCCx: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC0D: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F74BCCx getter +/// @brief ATTR_EFF_DIMM_DDR4_BC0D getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F74BCWCx MDQ0/4-MDQS Write Delay Control Word for ranks 0 to -/// 3 +/// @note F0BCW0D Reserved for future +/// use /// -inline fapi2::ReturnCode eff_dimm_ddr4_f74bccx(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_bc0d(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -16314,51 +9147,51 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f74bccx(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F74BCWDx MDQ1/5-MDQS Write Delay Control Word for ranks 0 to -/// 3 +/// @note F0BCW0E Parity Control +/// Word /// -inline fapi2::ReturnCode eff_dimm_ddr4_f74bcdx(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_bc0e(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F74BCDx, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC0E, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F74BCDx: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC0E: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F74BCDx getter +/// @brief ATTR_EFF_DIMM_DDR4_BC0E getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F74BCWDx MDQ1/5-MDQS Write Delay Control Word for ranks 0 to -/// 3 +/// @note F0BCW0E Parity Control +/// Word /// -inline fapi2::ReturnCode eff_dimm_ddr4_f74bcdx(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_bc0e(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -16369,26 +9202,26 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f74bcdx(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F74BCDx, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC0E, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F74BCDx: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC0E: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F74BCDx getter +/// @brief ATTR_EFF_DIMM_DDR4_BC0E getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F74BCWDx MDQ1/5-MDQS Write Delay Control Word for ranks 0 to -/// 3 +/// @note F0BCW0E Parity Control +/// Word /// -inline fapi2::ReturnCode eff_dimm_ddr4_f74bcdx(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_bc0e(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -16398,51 +9231,51 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f74bcdx(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F74BCWEx MDQ2/6-MDQS Write Delay Control Word for ranks 0 to -/// 3 +/// @note F0BCW0F Error Status +/// Word /// -inline fapi2::ReturnCode eff_dimm_ddr4_f74bcex(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_bc0f(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F74BCEx, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC0F, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F74BCEx: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC0F: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F74BCEx getter +/// @brief ATTR_EFF_DIMM_DDR4_BC0F getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F74BCWEx MDQ2/6-MDQS Write Delay Control Word for ranks 0 to -/// 3 +/// @note F0BCW0F Error Status +/// Word /// -inline fapi2::ReturnCode eff_dimm_ddr4_f74bcex(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_bc0f(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -16453,26 +9286,26 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f74bcex(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F74BCEx, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_BC0F, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F74BCEx: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_BC0F: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F74BCEx getter +/// @brief ATTR_EFF_DIMM_DDR4_BC0F getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F74BCWEx MDQ2/6-MDQS Write Delay Control Word for ranks 0 to -/// 3 +/// @note F0BCW0F Error Status +/// Word /// -inline fapi2::ReturnCode eff_dimm_ddr4_f74bcex(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_bc0f(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -16482,51 +9315,51 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f74bcex(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F74BCWFx MDQ3/7-MDQS Write Delay Control Word for ranks 0 to -/// 3 +/// @note F5BCW6x DRAM Interface Vref Control +/// Word /// -inline fapi2::ReturnCode eff_dimm_ddr4_f74bcfx(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_f5bc6x(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F74BCFx, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F5BC6x, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F74BCFx: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F5BC6x: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F74BCFx getter +/// @brief ATTR_EFF_DIMM_DDR4_F5BC6x getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F74BCWFx MDQ3/7-MDQS Write Delay Control Word for ranks 0 to -/// 3 +/// @note F5BCW6x DRAM Interface Vref Control +/// Word /// -inline fapi2::ReturnCode eff_dimm_ddr4_f74bcfx(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_f5bc6x(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -16537,26 +9370,26 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f74bcfx(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F74BCFx, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F5BC6x, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F74BCFx: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F5BC6x: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DIMM_DDR4_F74BCFx getter +/// @brief ATTR_EFF_DIMM_DDR4_F5BC6x getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note F74BCWFx MDQ3/7-MDQS Write Delay Control Word for ranks 0 to -/// 3 +/// @note F5BCW6x DRAM Interface Vref Control +/// Word /// -inline fapi2::ReturnCode eff_dimm_ddr4_f74bcfx(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_f5bc6x(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -16566,53 +9399,51 @@ inline fapi2::ReturnCode eff_dimm_ddr4_f74bcfx(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DRAM Ron. Used in various locations and comes from the MT keyword of the VPD -/// OHM48 is for -/// DDR4. +/// @note F6BCW4x Buffer Training Configuration Control +/// Word /// -inline fapi2::ReturnCode eff_dram_ron(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dimm_ddr4_f6bc4x(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_RON, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F6BC4x, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_RON: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F6BC4x: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DRAM_RON getter +/// @brief ATTR_EFF_DIMM_DDR4_F6BC4x getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DRAM Ron. Used in various locations and comes from the MT keyword of the VPD -/// OHM48 is for -/// DDR4. +/// @note F6BCW4x Buffer Training Configuration Control +/// Word /// -inline fapi2::ReturnCode eff_dram_ron(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_f6bc4x(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -16623,27 +9454,26 @@ inline fapi2::ReturnCode eff_dram_ron(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_RON, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DIMM_DDR4_F6BC4x, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_RON: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DIMM_DDR4_F6BC4x: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DRAM_RON getter +/// @brief ATTR_EFF_DIMM_DDR4_F6BC4x getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DRAM Ron. Used in various locations and comes from the MT keyword of the VPD -/// OHM48 is for -/// DDR4. +/// @note F6BCW4x Buffer Training Configuration Control +/// Word /// -inline fapi2::ReturnCode eff_dram_ron(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dimm_ddr4_f6bc4x(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -16653,12 +9483,12 @@ inline fapi2::ReturnCode eff_dram_ron(const fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Exit Self-Refresh to commands not requiring a locked DLL. In nck (number of -/// clock cycles). Each memory channel will have a value. creator: eff_config -/// consumer: various firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_dram_txs(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_TXS, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_TXS: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DRAM_TXS getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Exit Self-Refresh to commands not requiring a locked DLL. In nck (number of -/// clock cycles). Each memory channel will have a value. creator: eff_config -/// consumer: various firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_dram_txs(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_TXS, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_TXS: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DRAM_TXS getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Exit Self-Refresh to commands not requiring a locked DLL. In nck (number of -/// clock cycles). Each memory channel will have a value. creator: eff_config -/// consumer: various firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_dram_txs(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_TXS, i_target, l_value) ); - memcpy(o_array, &l_value, 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_TXS: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - /// /// @brief ATTR_MSS_IGNORE_PLUG_RULES getter /// @param[in] const ref to the TARGET_TYPE_MCS @@ -18015,187 +10763,10 @@ fapi_try_exit: /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK /// @note Hybrid Media. Decodes SPD Byte 3 (bits 6~4) creator: mss_eff_config consumer: -/// various firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_hybrid_memory_type(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_HYBRID_MEMORY_TYPE, i_target, l_value) ); - memcpy(o_array, &l_value, 4); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_HYBRID_MEMORY_TYPE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_HYBRID getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Hybrid. Decodes SPD Byte 3 (bit 7) creator: mss_eff_config consumer: various -/// firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_hybrid(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_HYBRID, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_HYBRID: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_HYBRID getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Hybrid. Decodes SPD Byte 3 (bit 7) creator: mss_eff_config consumer: various -/// firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_hybrid(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_HYBRID, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_HYBRID: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_HYBRID getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Hybrid. Decodes SPD Byte 3 (bit 7) creator: mss_eff_config consumer: various -/// firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_hybrid(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_HYBRID, i_target, l_value) ); - memcpy(o_array, &l_value, 4); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_HYBRID: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DRAM_DENSITY getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DRAM Density. Decodes SPD Byte 4 (bits 3~0). Total SDRAM capacity per die. For -/// multi-die stacks (DDP, QDP, or 3DS), this represents the capacity of each DRAM -/// die in the stack. creator: mss_eff_config consumer: various firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_dram_density(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_DENSITY, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_DENSITY: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DRAM_DENSITY getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DRAM Density. Decodes SPD Byte 4 (bits 3~0). Total SDRAM capacity per die. For -/// multi-die stacks (DDP, QDP, or 3DS), this represents the capacity of each DRAM -/// die in the stack. creator: mss_eff_config consumer: various firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_dram_density(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_DENSITY, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_DENSITY: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DRAM_DENSITY getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DRAM Density. Decodes SPD Byte 4 (bits 3~0). Total SDRAM capacity per die. For -/// multi-die stacks (DDP, QDP, or 3DS), this represents the capacity of each DRAM -/// die in the stack. creator: mss_eff_config consumer: various firmware notes: +/// various firmware notes: /// none /// -inline fapi2::ReturnCode eff_dram_density(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_hybrid_memory_type(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -18205,55 +10776,53 @@ inline fapi2::ReturnCode eff_dram_density(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Number of DRAM bank address bits. Actual number of banks is 2^N, where N is the -/// number of bank address bits. Decodes SPD Byte 4 (bits 5~4). creator: spd_decoder -/// consumer: various firmware notes: +/// @note Hybrid. Decodes SPD Byte 3 (bit 7) creator: mss_eff_config consumer: various +/// firmware notes: /// none /// -inline fapi2::ReturnCode eff_dram_bank_bits(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_hybrid(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_BANK_BITS, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_HYBRID, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_BANK_BITS: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_HYBRID: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DRAM_BANK_BITS getter +/// @brief ATTR_EFF_HYBRID getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Number of DRAM bank address bits. Actual number of banks is 2^N, where N is the -/// number of bank address bits. Decodes SPD Byte 4 (bits 5~4). creator: spd_decoder -/// consumer: various firmware notes: +/// @note Hybrid. Decodes SPD Byte 3 (bit 7) creator: mss_eff_config consumer: various +/// firmware notes: /// none /// -inline fapi2::ReturnCode eff_dram_bank_bits(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_hybrid(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -18264,28 +10833,27 @@ inline fapi2::ReturnCode eff_dram_bank_bits(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_BANK_BITS, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_HYBRID, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_BANK_BITS: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_HYBRID: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DRAM_BANK_BITS getter +/// @brief ATTR_EFF_HYBRID getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Number of DRAM bank address bits. Actual number of banks is 2^N, where N is the -/// number of bank address bits. Decodes SPD Byte 4 (bits 5~4). creator: spd_decoder -/// consumer: various firmware notes: +/// @note Hybrid. Decodes SPD Byte 3 (bit 7) creator: mss_eff_config consumer: various +/// firmware notes: /// none /// -inline fapi2::ReturnCode eff_dram_bank_bits(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_hybrid(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -18295,59 +10863,55 @@ inline fapi2::ReturnCode eff_dram_bank_bits(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Bank Groups Bits. Decoded SPD Byte 4 (bits 7~6). Actual number of bank groups is -/// 2^N, where N is the number of bank address bits. This value represents the -/// number of bank groups into which the memory array is divided. creator: -/// mss_eff_config consumer: various firmware notes: +/// @note DRAM Density. Decodes SPD Byte 4 (bits 3~0). Total SDRAM capacity per die. For +/// multi-die stacks (DDP, QDP, or 3DS), this represents the capacity of each DRAM +/// die in the stack. creator: mss_eff_config consumer: various firmware notes: /// none /// -inline fapi2::ReturnCode eff_dram_bank_group_bits(const fapi2::Target& i_target, - uint8_t& o_value) +inline fapi2::ReturnCode eff_dram_density(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_BANK_GROUP_BITS, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_DENSITY, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_BANK_GROUP_BITS: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DRAM_DENSITY: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DRAM_BANK_GROUP_BITS getter +/// @brief ATTR_EFF_DRAM_DENSITY getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Bank Groups Bits. Decoded SPD Byte 4 (bits 7~6). Actual number of bank groups is -/// 2^N, where N is the number of bank address bits. This value represents the -/// number of bank groups into which the memory array is divided. creator: -/// mss_eff_config consumer: various firmware notes: +/// @note DRAM Density. Decodes SPD Byte 4 (bits 3~0). Total SDRAM capacity per die. For +/// multi-die stacks (DDP, QDP, or 3DS), this represents the capacity of each DRAM +/// die in the stack. creator: mss_eff_config consumer: various firmware notes: /// none /// -inline fapi2::ReturnCode eff_dram_bank_group_bits(const fapi2::Target& i_target, - uint8_t* o_array) +inline fapi2::ReturnCode eff_dram_density(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -18358,30 +10922,28 @@ inline fapi2::ReturnCode eff_dram_bank_group_bits(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_BANK_GROUP_BITS, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_DENSITY, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_BANK_GROUP_BITS: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DRAM_DENSITY: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DRAM_BANK_GROUP_BITS getter +/// @brief ATTR_EFF_DRAM_DENSITY getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Bank Groups Bits. Decoded SPD Byte 4 (bits 7~6). Actual number of bank groups is -/// 2^N, where N is the number of bank address bits. This value represents the -/// number of bank groups into which the memory array is divided. creator: -/// mss_eff_config consumer: various firmware notes: +/// @note DRAM Density. Decodes SPD Byte 4 (bits 3~0). Total SDRAM capacity per die. For +/// multi-die stacks (DDP, QDP, or 3DS), this represents the capacity of each DRAM +/// die in the stack. creator: mss_eff_config consumer: various firmware notes: /// none /// -inline fapi2::ReturnCode eff_dram_bank_group_bits(const fapi2::Target& i_target, - uint8_t* o_array) +inline fapi2::ReturnCode eff_dram_density(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -18391,55 +10953,55 @@ inline fapi2::ReturnCode eff_dram_bank_group_bits(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Column Address Bits. Decoded SPD Byte 5 (bits 2~0). Actual number of DRAM -/// columns is 2^N, where N is the number of column address bits creator: -/// mss_eff_config consumer: various firmware notes: +/// @note Number of DRAM bank address bits. Actual number of banks is 2^N, where N is the +/// number of bank address bits. Decodes SPD Byte 4 (bits 5~4). creator: spd_decoder +/// consumer: various firmware notes: /// none /// -inline fapi2::ReturnCode eff_dram_columns_bits(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dram_bank_bits(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_COLUMN_BITS, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_BANK_BITS, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_COLUMN_BITS: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DRAM_BANK_BITS: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DRAM_COLUMN_BITS getter +/// @brief ATTR_EFF_DRAM_BANK_BITS getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Column Address Bits. Decoded SPD Byte 5 (bits 2~0). Actual number of DRAM -/// columns is 2^N, where N is the number of column address bits creator: -/// mss_eff_config consumer: various firmware notes: +/// @note Number of DRAM bank address bits. Actual number of banks is 2^N, where N is the +/// number of bank address bits. Decodes SPD Byte 4 (bits 5~4). creator: spd_decoder +/// consumer: various firmware notes: /// none /// -inline fapi2::ReturnCode eff_dram_columns_bits(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dram_bank_bits(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -18450,28 +11012,28 @@ inline fapi2::ReturnCode eff_dram_columns_bits(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_COLUMN_BITS, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_BANK_BITS, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_COLUMN_BITS: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DRAM_BANK_BITS: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DRAM_COLUMN_BITS getter +/// @brief ATTR_EFF_DRAM_BANK_BITS getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Column Address Bits. Decoded SPD Byte 5 (bits 2~0). Actual number of DRAM -/// columns is 2^N, where N is the number of column address bits creator: -/// mss_eff_config consumer: various firmware notes: +/// @note Number of DRAM bank address bits. Actual number of banks is 2^N, where N is the +/// number of bank address bits. Decodes SPD Byte 4 (bits 5~4). creator: spd_decoder +/// consumer: various firmware notes: /// none /// -inline fapi2::ReturnCode eff_dram_columns_bits(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dram_bank_bits(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -18481,12 +11043,12 @@ inline fapi2::ReturnCode eff_dram_columns_bits(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_TWTR_L, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_TWTR_L: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DRAM_TWTR_L getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Minimum Write to Read Time, same bank group in nck (number of clock cycles). -/// Decodes byte 43 (7~4) and byte 45 (bits 7~0). Each memory channel will have a -/// value. creator: eff_config consumer: various firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_dram_twtr_l(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_TWTR_L, i_target, l_value) ); - memcpy(o_array, &l_value, 2); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_TWTR_L: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DRAM_TMAW getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint16_t -/// @note Generated by gen_accessors.pl generateParameters (D) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Maximum Activate Window in nck (number of clock cycles). Decodes SPD byte 7 -/// (bits 5~4). Depends on tREFI multiplier. Each memory channel will have a value. -/// creator: mss_eff_cnfg consumer: various firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_dram_tmaw(const fapi2::Target& i_target, uint16_t& o_value) -{ - uint16_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_TMAW, i_target.getParent(), l_value) ); - o_value = l_value[mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_TMAW: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DRAM_TMAW getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint16_t -/// @note Generated by gen_accessors.pl generateParameters (D.1) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Maximum Activate Window in nck (number of clock cycles). Decodes SPD byte 7 -/// (bits 5~4). Depends on tREFI multiplier. Each memory channel will have a value. -/// creator: mss_eff_cnfg consumer: various firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_dram_tmaw(const fapi2::Target& i_target, uint16_t& o_value) -{ - uint16_t l_value[2]; - auto l_mca = i_target.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_TMAW, l_mca.getParent(), l_value) ); - o_value = l_value[mss::index(l_mca)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_TMAW: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DRAM_TMAW getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint16_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (E) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Maximum Activate Window in nck (number of clock cycles). Decodes SPD byte 7 -/// (bits 5~4). Depends on tREFI multiplier. Each memory channel will have a value. -/// creator: mss_eff_cnfg consumer: various firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_dram_tmaw(const fapi2::Target& i_target, uint16_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint16_t l_value[2]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_TMAW, i_target, l_value) ); - memcpy(o_array, &l_value, 4); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_TMAW: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DRAM_WIDTH getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] ref to the value uint8_t -/// @note Generated by gen_accessors.pl generateParameters (F) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note SDRAM Device Width Decodes SPD Byte 12 (bits 2~0). Options: X4 (4 bits), X8 (8 -/// bits), X16 (16 bits), X32 (32 bits). creator: mss_eff_cnfg consumer: various -/// firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_dram_width(const fapi2::Target& i_target, uint8_t& o_value) -{ - uint8_t l_value[2][2]; - auto l_mca = i_target.getParent(); - auto l_mcs = l_mca.getParent(); - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_WIDTH, l_mcs, l_value) ); - o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_WIDTH: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_EFF_DRAM_WIDTH getter -/// @param[in] const ref to the fapi2::Target -/// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (G) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note SDRAM Device Width Decodes SPD Byte 12 (bits 2~0). Options: X4 (4 bits), X8 (8 -/// bits), X16 (16 bits), X32 (32 bits). creator: mss_eff_cnfg consumer: various -/// firmware notes: -/// none -/// -inline fapi2::ReturnCode eff_dram_width(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[2][2]; - auto l_mcs = i_target.getParent(); +/// +inline fapi2::ReturnCode eff_dram_twtr_l(const fapi2::Target& i_target, uint8_t& o_value) +{ + uint8_t l_value[2]; + auto l_mca = i_target.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_WIDTH, l_mcs, l_value) ); - memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_TWTR_L, l_mca.getParent(), l_value) ); + o_value = l_value[mss::index(l_mca)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_WIDTH: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DRAM_TWTR_L: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DRAM_WIDTH getter +/// @brief ATTR_EFF_DRAM_TWTR_L getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (H) +/// @note Generated by gen_accessors.pl generateParameters (E) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note SDRAM Device Width Decodes SPD Byte 12 (bits 2~0). Options: X4 (4 bits), X8 (8 -/// bits), X16 (16 bits), X32 (32 bits). creator: mss_eff_cnfg consumer: various -/// firmware notes: +/// @note Minimum Write to Read Time, same bank group in nck (number of clock cycles). +/// Decodes byte 43 (7~4) and byte 45 (bits 7~0). Each memory channel will have a +/// value. creator: eff_config consumer: various firmware notes: /// none /// -inline fapi2::ReturnCode eff_dram_width(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dram_twtr_l(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -20031,55 +12421,57 @@ inline fapi2::ReturnCode eff_dram_width(const fapi2::Target /// @param[out] ref to the value uint8_t /// @note Generated by gen_accessors.pl generateParameters (F) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DRAM Device Rank Mix Decodes SPD Byte 12 (bits 5~3). creator: mss_eff_cnfg -/// consumer: various firmware notes: +/// @note SDRAM Device Width Decodes SPD Byte 12 (bits 2~0). Options: X4 (4 bits), X8 (8 +/// bits), X16 (16 bits), X32 (32 bits). creator: mss_eff_cnfg consumer: various +/// firmware notes: /// none /// -inline fapi2::ReturnCode eff_dram_rank_mix(const fapi2::Target& i_target, uint8_t& o_value) +inline fapi2::ReturnCode eff_dram_width(const fapi2::Target& i_target, uint8_t& o_value) { uint8_t l_value[2][2]; auto l_mca = i_target.getParent(); auto l_mcs = l_mca.getParent(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_RANK_MIX, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_WIDTH, l_mcs, l_value) ); o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_RANK_MIX: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DRAM_WIDTH: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DRAM_RANK_MIX getter +/// @brief ATTR_EFF_DRAM_WIDTH getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (G) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DRAM Device Rank Mix Decodes SPD Byte 12 (bits 5~3). creator: mss_eff_cnfg -/// consumer: various firmware notes: +/// @note SDRAM Device Width Decodes SPD Byte 12 (bits 2~0). Options: X4 (4 bits), X8 (8 +/// bits), X16 (16 bits), X32 (32 bits). creator: mss_eff_cnfg consumer: various +/// firmware notes: /// none /// -inline fapi2::ReturnCode eff_dram_rank_mix(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dram_width(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -20090,27 +12482,28 @@ inline fapi2::ReturnCode eff_dram_rank_mix(const fapi2::Target(); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_RANK_MIX, l_mcs, l_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_WIDTH, l_mcs, l_value) ); memcpy(o_array, &(l_value[mss::index(i_target)][0]), 2); return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_EFF_DRAM_RANK_MIX: 0x%lx (target: %s)", + FAPI_ERR("failed accessing ATTR_EFF_DRAM_WIDTH: 0x%lx (target: %s)", uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } /// -/// @brief ATTR_EFF_DRAM_RANK_MIX getter +/// @brief ATTR_EFF_DRAM_WIDTH getter /// @param[in] const ref to the fapi2::Target /// @param[out] uint8_t* memory to store the value /// @note Generated by gen_accessors.pl generateParameters (H) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note DRAM Device Rank Mix Decodes SPD Byte 12 (bits 5~3). creator: mss_eff_cnfg -/// consumer: various firmware notes: +/// @note SDRAM Device Width Decodes SPD Byte 12 (bits 2~0). Options: X4 (4 bits), X8 (8 +/// bits), X16 (16 bits), X32 (32 bits). creator: mss_eff_cnfg consumer: various +/// firmware notes: /// none /// -inline fapi2::ReturnCode eff_dram_rank_mix(const fapi2::Target& i_target, uint8_t* o_array) +inline fapi2::ReturnCode eff_dram_width(const fapi2::Target& i_target, uint8_t* o_array) { if (o_array == nullptr) { @@ -20120,12 +12513,12 @@ inline fapi2::ReturnCode eff_dram_rank_mix(const fapi2::Target& i_target, uint8_t* o_array) -{ - if (o_array == nullptr) - { - FAPI_ERR("nullptr passed to attribute accessor %s", __func__); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_value[4][4]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_ROW_REPAIR_DATA, i_target, l_value) ); - memcpy(o_array, &l_value, 16); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_ROW_REPAIR_DATA: 0x%lx", - uint64_t(fapi2::current_err)); - return fapi2::current_err; -} - /// /// @brief ATTR_MSS_MRW_SAFEMODE_MEM_THROTTLED_N_COMMANDS_PER_PORT getter @@ -21003,30 +13364,6 @@ fapi_try_exit: return fapi2::current_err; } -/// -/// @brief ATTR_MSS_MRW_MCS_PREFETCH_RETRY_THRESHOLD getter -/// @param[out] uint8_t& reference to store the value -/// @note Generated by gen_accessors.pl generateParameters (SYSTEM) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Option to control MCS prefetch retry threshold, for performance optimization. -/// This attribute controls the number of retries in the prefetch engine. Retry -/// threshold available ranges from 16 to 30. Note: Values outside those ranges will -/// default to 30. In -/// MRW. -/// -inline fapi2::ReturnCode mrw_mcs_prefetch_retry_threshold(uint8_t& o_value) -{ - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_MRW_MCS_PREFETCH_RETRY_THRESHOLD, fapi2::Target(), - o_value) ); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_MRW_MCS_PREFETCH_RETRY_THRESHOLD: 0x%lx (system target)", - uint64_t(fapi2::current_err)); - return fapi2::current_err; -} - /// /// @brief ATTR_MSS_MRW_POWER_CONTROL_REQUESTED getter /// @param[out] uint8_t& reference to store the value @@ -21071,50 +13408,6 @@ fapi_try_exit: return fapi2::current_err; } -/// -/// @brief ATTR_MSS_MRW_VMEM_REGULATOR_POWER_LIMIT_PER_DIMM_ADJ_ENABLE getter -/// @param[out] uint8_t& reference to store the value -/// @note Generated by gen_accessors.pl generateParameters (SYSTEM) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Machine Readable Workbook enablement of the HWP code to adjust the VMEM -/// regulator power limit based on number of installed -/// DIMMs. -/// -inline fapi2::ReturnCode mrw_vmem_regulator_power_limit_per_dimm_adj_enable(uint8_t& o_value) -{ - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_MRW_VMEM_REGULATOR_POWER_LIMIT_PER_DIMM_ADJ_ENABLE, - fapi2::Target(), o_value) ); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_MRW_VMEM_REGULATOR_POWER_LIMIT_PER_DIMM_ADJ_ENABLE: 0x%lx (system target)", - uint64_t(fapi2::current_err)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MRW_VMEM_REGULATOR_MEMORY_POWER_LIMIT_PER_DIMM_DDR3 getter -/// @param[out] uint32_t& reference to store the value -/// @note Generated by gen_accessors.pl generateParameters (SYSTEM) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Machine Readable Workbook VMEM regulator power limit per CDIMM assuming a full -/// configuration. Units in cW Used for Cumulus Consumed in -/// mss_eff_config_thermal -/// -inline fapi2::ReturnCode mrw_vmem_regulator_power_limit_per_dimm_ddr3(uint32_t& o_value) -{ - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MRW_VMEM_REGULATOR_MEMORY_POWER_LIMIT_PER_DIMM_DDR3, - fapi2::Target(), o_value) ); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MRW_VMEM_REGULATOR_MEMORY_POWER_LIMIT_PER_DIMM_DDR3: 0x%lx (system target)", - uint64_t(fapi2::current_err)); - return fapi2::current_err; -} - /// /// @brief ATTR_MRW_VMEM_REGULATOR_MEMORY_POWER_LIMIT_PER_DIMM_DDR4 getter /// @param[out] uint32_t& reference to store the value @@ -21160,106 +13453,6 @@ fapi_try_exit: return fapi2::current_err; } -/// -/// @brief ATTR_MSS_MRW_AVDD_OFFSET_ENABLE getter -/// @param[out] uint8_t& reference to store the value -/// @note Generated by gen_accessors.pl generateParameters (SYSTEM) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Used for to determine whether to apply an offset to AVDD. Supplied by -/// MRW. -/// -inline fapi2::ReturnCode mrw_avdd_offset_enable(uint8_t& o_value) -{ - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_MRW_AVDD_OFFSET_ENABLE, fapi2::Target(), o_value) ); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_MRW_AVDD_OFFSET_ENABLE: 0x%lx (system target)", - uint64_t(fapi2::current_err)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_MRW_VDD_OFFSET_ENABLE getter -/// @param[out] uint8_t& reference to store the value -/// @note Generated by gen_accessors.pl generateParameters (SYSTEM) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Used for to determine whether to apply an offset to VDD. Supplied by -/// MRW. -/// -inline fapi2::ReturnCode mrw_vdd_offset_enable(uint8_t& o_value) -{ - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_MRW_VDD_OFFSET_ENABLE, fapi2::Target(), o_value) ); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_MRW_VDD_OFFSET_ENABLE: 0x%lx (system target)", - uint64_t(fapi2::current_err)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_MRW_VCS_OFFSET_ENABLE getter -/// @param[out] uint8_t& reference to store the value -/// @note Generated by gen_accessors.pl generateParameters (SYSTEM) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Used for to determine whether to apply an offset to VCS. Supplied by -/// MRW. -/// -inline fapi2::ReturnCode mrw_vcs_offset_enable(uint8_t& o_value) -{ - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_MRW_VCS_OFFSET_ENABLE, fapi2::Target(), o_value) ); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_MRW_VCS_OFFSET_ENABLE: 0x%lx (system target)", - uint64_t(fapi2::current_err)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_MRW_VPP_OFFSET_ENABLE getter -/// @param[out] uint8_t& reference to store the value -/// @note Generated by gen_accessors.pl generateParameters (SYSTEM) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Used for to determine whether to apply an offset to VCS. Supplied by -/// MRW. -/// -inline fapi2::ReturnCode mrw_vpp_offset_enable(uint8_t& o_value) -{ - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_MRW_VPP_OFFSET_ENABLE, fapi2::Target(), o_value) ); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_MRW_VPP_OFFSET_ENABLE: 0x%lx (system target)", - uint64_t(fapi2::current_err)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_MRW_VDDR_OFFSET_ENABLE getter -/// @param[out] uint8_t& reference to store the value -/// @note Generated by gen_accessors.pl generateParameters (SYSTEM) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Used for to determine whether to apply an offset to VDDR. Supplied by -/// MRW. -/// -inline fapi2::ReturnCode mrw_vddr_offset_enable(uint8_t& o_value) -{ - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_MRW_VDDR_OFFSET_ENABLE, fapi2::Target(), o_value) ); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_MRW_VDDR_OFFSET_ENABLE: 0x%lx (system target)", - uint64_t(fapi2::current_err)); - return fapi2::current_err; -} - /// /// @brief ATTR_MSS_MRW_FINE_REFRESH_MODE getter /// @param[out] uint8_t& reference to store the value @@ -21326,47 +13519,6 @@ fapi_try_exit: return fapi2::current_err; } -/// -/// @brief ATTR_MSS_MRW_PREFETCH_ENABLE getter -/// @param[out] uint8_t& reference to store the value -/// @note Generated by gen_accessors.pl generateParameters (SYSTEM) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Value of on or off. Determines if prefetching enabled or -/// not. -/// -inline fapi2::ReturnCode mrw_prefetch_enable(uint8_t& o_value) -{ - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_MRW_PREFETCH_ENABLE, fapi2::Target(), o_value) ); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_MRW_PREFETCH_ENABLE: 0x%lx (system target)", - uint64_t(fapi2::current_err)); - return fapi2::current_err; -} - -/// -/// @brief ATTR_MSS_MRW_CLEANER_ENABLE getter -/// @param[out] uint8_t& reference to store the value -/// @note Generated by gen_accessors.pl generateParameters (SYSTEM) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Value of on or off. Determines if the cleaner of the L4 cache (write modified -/// entries to memory on idle cycles) enabled or not. See chapter 7 of the Centaur -/// Workbook. -/// -inline fapi2::ReturnCode mrw_cleaner_enable(uint8_t& o_value) -{ - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_MRW_CLEANER_ENABLE, fapi2::Target(), o_value) ); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_MRW_CLEANER_ENABLE: 0x%lx (system target)", - uint64_t(fapi2::current_err)); - return fapi2::current_err; -} - /// /// @brief ATTR_MSS_MRW_PERIODIC_MEMCAL_MODE_OPTIONS getter /// @param[out] uint16_t& reference to store the value @@ -21437,28 +13589,6 @@ fapi_try_exit: return fapi2::current_err; } -/// -/// @brief ATTR_MSS_MRW_SUPPORTED_FREQ getter -/// @param[out] uint32_t* memory to store the value -/// @note Generated by gen_accessors.pl generateParameters (SYSTEM A) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note List of memory frequencies supported by the current -/// system. -/// -inline fapi2::ReturnCode mrw_supported_freq(uint32_t* o_array) -{ - uint32_t l_value[4]; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_MRW_SUPPORTED_FREQ, fapi2::Target(), l_value) ); - memcpy(o_array, &l_value, 16); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_MRW_SUPPORTED_FREQ: 0x%lx (system target)", - uint64_t(fapi2::current_err)); - return fapi2::current_err; -} - /// /// @brief ATTR_MSS_MRW_UNSUPPORTED_RANK_CONFIG getter /// @param[in] const ref to the fapi2::Target @@ -28382,30 +20512,6 @@ fapi_try_exit: return fapi2::current_err; } -/// -/// @brief ATTR_FREQ_MCA_MHZ getter -/// @param[out] uint32_t& reference to store the value -/// @note Generated by gen_accessors.pl generateParameters (SYSTEM) -/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note The frequency of the memory controller channel. In synchronous mode, this is -/// equivalent to ATTR_FREQ_PB_MHZ. This may be independently set per pair of memory -/// channels if operating in asynchronous mode, but this configuration is not -/// anticipated. This clock drives the MCU queues, and all the associated logic that -/// drives the inputs to the DMI and reads its -/// outputs. -/// -inline fapi2::ReturnCode freq_mca_mhz(uint32_t& o_value) -{ - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_FREQ_MCA_MHZ, fapi2::Target(), o_value) ); - return fapi2::current_err; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_FREQ_MCA_MHZ: 0x%lx (system target)", - uint64_t(fapi2::current_err)); - return fapi2::current_err; -} - } -- cgit v1.2.1