From b1ed58c10721fe1ec98dd537929a2942e08765d0 Mon Sep 17 00:00:00 2001
From: Ben Gass <bgass@us.ibm.com>
Date: Wed, 18 May 2016 13:01:57 -0500
Subject: Translate logical mca regisers in mcs chiplet as mca target type

  Fixup memory code which uses the xlt registers
  Add dependent epsilon inits

Change-Id: I995bcd895a0a7a431dcf350475fd387be70749c9
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24733
Reviewed-by: Brian R. Silver <bsilver@us.ibm.com>
Tested-by: Jenkins Server
Tested-by: PPE CI
Tested-by: Hostboot CI
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Dev-Ready: Benjamin Gass <bgass@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24734
Tested-by: FSP CI Jenkins
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
---
 src/import/chips/p9/procedures/hwp/memory/lib/mc/mc.H | 9 ++-------
 1 file changed, 2 insertions(+), 7 deletions(-)

(limited to 'src/import/chips/p9/procedures/hwp/memory/lib/mc/mc.H')

diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mc/mc.H b/src/import/chips/p9/procedures/hwp/memory/lib/mc/mc.H
index 7416b96dd..ac52592f6 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/mc/mc.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/mc/mc.H
@@ -56,7 +56,7 @@ class mcTraits;
 /// @brief a collection of traits associated with the Centaur controller
 ///
 template<>
-class mcTraits<fapi2::TARGET_TYPE_MEMBUF_CHIP>
+class mcTraits<fapi2::TARGET_TYPE_MBA>
 {
 };
 
@@ -65,14 +65,9 @@ class mcTraits<fapi2::TARGET_TYPE_MEMBUF_CHIP>
 /// @brief a collection of traits associated with the Nimbus controller
 ///
 template<>
-class mcTraits<fapi2::TARGET_TYPE_MCS>
+class mcTraits<fapi2::TARGET_TYPE_MCA>
 {
     public:
-        // Array of registers indexed by MCA position
-        static const uint64_t xlate0_reg[2];
-        static const uint64_t xlate1_reg[2];
-        static const uint64_t xlate2_reg[2];
-
         enum
         {
             SLOT0_VALID = MCS_PORT02_MCP0XLT0_SLOT0_VALID,
-- 
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