From 2b26420e72477835ffeacb2dab9970266ef07566 Mon Sep 17 00:00:00 2001 From: Louis Stermole Date: Thu, 24 Jan 2019 13:36:56 -0500 Subject: Add p9a_mss_freq procedure Change-Id: I764e1ade2f63cabb7f6e5cf2b39e89811ea432c4 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70989 Tested-by: FSP CI Jenkins Tested-by: HWSV CI Tested-by: Jenkins Server Reviewed-by: STEPHEN GLANCY Reviewed-by: ANDRE A. MARIN Tested-by: Hostboot CI Reviewed-by: Jennifer A. Stofer Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75567 Reviewed-by: Christian R. Geddes Tested-by: Christian R. Geddes --- .../hwp/memory/lib/freq/nimbus_freq_traits.H | 71 ++++++++++ .../hwp/memory/lib/freq/nimbus_mss_freq.C | 143 +++++++++++++++++++-- .../chips/p9/procedures/hwp/memory/lib/freq/sync.C | 16 +-- .../chips/p9/procedures/hwp/memory/lib/freq/sync.H | 9 +- 4 files changed, 216 insertions(+), 23 deletions(-) (limited to 'src/import/chips/p9/procedures/hwp/memory/lib/freq') diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/freq/nimbus_freq_traits.H b/src/import/chips/p9/procedures/hwp/memory/lib/freq/nimbus_freq_traits.H index 6c9d47a34..4818eeeb1 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/freq/nimbus_freq_traits.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/freq/nimbus_freq_traits.H @@ -22,3 +22,74 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ + +/// +/// @file nimbus_freq_traits.H +/// @brief Contains frequency traits information for Nimbus +/// +// *HWP HWP Owner: Stephen Glancy +// *HWP FW Owner: Andre Marin +// *HWP Team: Memory +// *HWP Level: 2 +// *HWP Consumed by: CI + +#ifndef _NIMBUS_FREQ_TRAITS_H_ +#define _NIMBUS_FREQ_TRAITS_H_ + +#include +#include +#include +#include +#include + +namespace mss +{ + +/// +/// @class Traits and policy class for frequency and synchronous code - specialization for the NIMBUS processor type +/// +template<> +class frequency_traits +{ + public: + ////////////////////////////////////////////////////////////// + // Target types + ////////////////////////////////////////////////////////////// + static constexpr fapi2::TargetType PORT_TARGET_TYPE = fapi2::TARGET_TYPE_MCA; + static constexpr fapi2::TargetType FREQ_TARGET_TYPE = fapi2::TARGET_TYPE_MCBIST; + static constexpr fapi2::TargetType VPD_TARGET_TYPE = fapi2::TARGET_TYPE_MCS; + + ////////////////////////////////////////////////////////////// + // Traits values + ////////////////////////////////////////////////////////////// + static const std::vector SUPPORTED_FREQS; + // MCBIST is our frequency domain. So 4 ports per MCBIST + static constexpr uint64_t PORTS_PER_FREQ_DOMAIN = 4; + // Max DIMM's per port + static constexpr uint64_t MAX_DIMM_PER_PORT = 2; + // Maxium number of primary ranks on a DIMM + static constexpr uint64_t MAX_PRIMARY_RANK_PER_DIMM = 4; + // MC type for Nimbus is constant - NIMBUS + static constexpr mss::mc_type MC = mss::mc_type::NIMBUS; + static constexpr const char* PROC_STR = "NIMBUS"; + + // VPD traits values + // VPD keyword max is slightly repeated (it's in NIMBUS consts too) + static constexpr uint64_t VPD_KEYWORD_MAX = 255; + static constexpr const char* VPD_BLOB_NAME = "MR"; + static constexpr auto VPD_BLOB = fapi2::MemVpdData::MR; + static constexpr auto LRDIMM_TYPE = fapi2::ENUM_ATTR_EFF_DIMM_TYPE_LRDIMM; + + // Coding minion, why have these explicitly defined frequency values? + // Isn't the supported frequency vector used for this purpose? + // Well, we need to callout the specific frequency values that are allowed on a given system + // As we can't callout a vector in error callouts and each traits might have a different number of allowable traits, + // the below values are hardcoded specifically for the error callouts + static constexpr uint64_t SUPPORTED_FREQ0 = DIMM_SPEED_1866; + static constexpr uint64_t SUPPORTED_FREQ1 = DIMM_SPEED_2133; + static constexpr uint64_t SUPPORTED_FREQ2 = DIMM_SPEED_2400; + static constexpr uint64_t SUPPORTED_FREQ3 = DIMM_SPEED_2666; +}; + +} // ns mss +#endif diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/freq/nimbus_mss_freq.C b/src/import/chips/p9/procedures/hwp/memory/lib/freq/nimbus_mss_freq.C index 0a1f6b8b7..37a13275b 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/freq/nimbus_mss_freq.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/freq/nimbus_mss_freq.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2018 */ +/* Contributors Listed Below - COPYRIGHT 2018,2019 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -39,14 +39,14 @@ // Memory libraries #include -#include #include +#include #include #include // Generic libraries +#include #include -#include #include #include @@ -94,7 +94,7 @@ fapi2::ReturnCode set_CL_attr( FAPI_ASSERT( l_temp[l_index] == i_cas_latency, fapi2::MSS_BAD_CL_CAST() .set_CL(i_cas_latency) - .set_MCA_TARGET(i_target), + .set_PORT_TARGET(i_target), "%s bad cast for cas latency from %d to %d", mss::c_str(i_target), i_cas_latency, @@ -168,6 +168,133 @@ fapi2::ReturnCode get_dimm_type( return mss::eff_dimm_type(i_target, o_dimm_type); } +/// +/// @brief Calls out the code if we calculated a bad frequency for the domain - specialization for NIMBUS and MCBIST +/// @param[in] i_target target on which to operate +/// @param[in] i_final_freq frequency calculated for domain +/// @return FAPI2_RC_SUCCESS iff ok +/// +template<> +fapi2::ReturnCode callout_bad_freq_calculated( + const fapi2::Target& i_target, + const uint64_t i_final_freq) +{ + using TT = mss::frequency_traits; + + // Declaring temporary variables to avoid linker errors associated with FAPI_ASSERT + const auto FREQ0 = TT::SUPPORTED_FREQ0; + const auto FREQ1 = TT::SUPPORTED_FREQ1; + const auto FREQ2 = TT::SUPPORTED_FREQ2; + const auto FREQ3 = TT::SUPPORTED_FREQ3; + + // If we don't find a valid frequency OR don't get a 0 (nothing configured on this clock domain), then error out + FAPI_ASSERT( std::binary_search(TT::SUPPORTED_FREQS.begin(), TT::SUPPORTED_FREQS.end(), i_final_freq) || + i_final_freq == 0, + fapi2::MSS_BAD_FREQ_CALCULATED() + .set_MSS_FREQ(i_final_freq) + .set_TARGET(i_target) + .set_PROC_TYPE(mss::proc_type::NIMBUS) + .set_SUPPORTED_FREQ_0(FREQ0) + .set_SUPPORTED_FREQ_1(FREQ1) + .set_SUPPORTED_FREQ_2(FREQ2) + .set_SUPPORTED_FREQ_3(FREQ3), + "%s: Calculated FREQ (%d) isn't supported", + mss::c_str(i_target), + i_final_freq); + + return fapi2::FAPI2_RC_SUCCESS; + +fapi_try_exit: + return fapi2::current_err; +} + +/// +/// @brief Configures the number of ranks in the VPD accessor - specialization for Nimbus and MCBIST +/// @param[in] i_target the target on which to set the frequency values +/// @param[in,out] io_vpd_info VPD information that needs to be configured +/// @return FAPI2_RC_SUCCESS iff ok +/// +template<> +fapi2::ReturnCode configure_vpd_ranks( + const fapi2::Target& i_target, + fapi2::VPDInfo& io_vpd_info) +{ + using TT = mss::frequency_traits; + + uint8_t l_rank_count_dimm[TT::MAX_DIMM_PER_PORT] = {}; + uint8_t l_dimm_type[TT::MAX_DIMM_PER_PORT] = {}; + + // ATTR to update + // Note: this flat out assumes that we have two DIMM per port max. + // This goes against the directive to have arrays be dynamic in length and derived from ATTR's + FAPI_TRY( get_master_rank_per_dimm(i_target, &(l_rank_count_dimm[0])) ); + FAPI_TRY( get_dimm_type(i_target, &(l_dimm_type[0])) ); + + // So for LRDIMM, our SI works a bit differently than for non-LRDIMM + // LRDIMM's have buffers that operate on a per-DIMM basis across multiple ranks + // As such, they act as a single load, similar to a 1R DIMM would + // per the IBM signal integrity team, the 1R DIMM settings should be used for LRDIMM's + // So, if we are LRDIMM's and have ranks, we want to only note it as a 1R DIMM for purposes of querying the VPD + FAPI_DBG("%s for DIMM 0 rank count %u dimm type %u %s", + mss::c_str(i_target), l_rank_count_dimm[0], l_dimm_type[0], l_dimm_type[0] == TT::LRDIMM_TYPE ? "LRDIMM" : "RDIMM"); + FAPI_DBG("%s for DIMM 1 rank count %u dimm type %u %s", + mss::c_str(i_target), l_rank_count_dimm[1], l_dimm_type[1], l_dimm_type[1] == TT::LRDIMM_TYPE ? "LRDIMM" : "RDIMM"); + + l_rank_count_dimm[0] = ((l_dimm_type[0] == TT::LRDIMM_TYPE) && (l_rank_count_dimm[0] > 0)) ? 1 : l_rank_count_dimm[0]; + l_rank_count_dimm[1] = ((l_dimm_type[1] == TT::LRDIMM_TYPE) && (l_rank_count_dimm[1] > 0)) ? 1 : l_rank_count_dimm[1]; + + FAPI_DBG("after LR modification %s for DIMM 0 rank count %u dimm type %u %s", + mss::c_str(i_target), l_rank_count_dimm[0], l_dimm_type[0], l_dimm_type[0] == TT::LRDIMM_TYPE ? "LRDIMM" : "RDIMM"); + FAPI_DBG("after LR modification %s for DIMM 1 rank count %u dimm type %u %s", + mss::c_str(i_target), l_rank_count_dimm[1], l_dimm_type[1], l_dimm_type[1] == TT::LRDIMM_TYPE ? "LRDIMM" : "RDIMM"); + + io_vpd_info.iv_rank_count_dimm_0 = l_rank_count_dimm[0]; + io_vpd_info.iv_rank_count_dimm_1 = l_rank_count_dimm[1]; + + FAPI_INF("%s. VPD info - rank count for dimm_0: %d, dimm_1: %d", + mss::c_str(i_target), io_vpd_info.iv_rank_count_dimm_0, io_vpd_info.iv_rank_count_dimm_1); + +fapi_try_exit: + return fapi2::current_err; +} + +/// +/// @brief Check VPD config for support of a given freq - specialization for NIMBUS +/// @param[in] i_target the target on which to operate +/// @param[in] i_proposed_freq frequency to check for support +/// @param[out] o_supported true if VPD supports the proposed frequency +/// @return FAPI2_RC_SUCCESS iff ok +/// +template<> +fapi2::ReturnCode check_freq_support_vpd( + const fapi2::Target& i_target, + const uint64_t i_proposed_freq, + bool& o_supported) +{ + using TT = mss::frequency_traits; + + o_supported = false; + + fapi2::VPDInfo l_vpd_info(TT::VPD_BLOB); + + const auto& l_vpd_target = mss::find_target(i_target); + + // Configures the number of ranks for the VPD configuration + FAPI_TRY( configure_vpd_ranks(i_target, l_vpd_info), + "%s failed to configure VPD ranks", mss::c_str(i_target)); + l_vpd_info.iv_is_config_ffdc_enabled = false; + + l_vpd_info.iv_freq_mhz = i_proposed_freq; + FAPI_INF("VPD info - DDR frequency: %d MT/s", i_proposed_freq); + + // Checks if this VPD configuration is supported + FAPI_TRY(is_vpd_config_supported(l_vpd_target, i_proposed_freq, l_vpd_info, o_supported), + "%s failed to determine if %u freq is supported", mss::c_str(i_target), i_proposed_freq); + +fapi_try_exit: + return fapi2::current_err; +} + /// /// @brief Update supported frequency scoreboard according to processor limits - specialization for NIMBUS and MCBIST /// @param[in] i_target processor frequency domain @@ -211,10 +338,10 @@ fapi2::ReturnCode num_master_ranks_per_dimm(const fapi2: /// @return FAPI2_RC_SUCCESS iff ok /// template<> -fapi2::ReturnCode callout_no_common_freq(const fapi2::Target& - i_target, - const bool l_supported_freq, - const uint64_t i_num_ports) +fapi2::ReturnCode callout_no_common_freq( + const fapi2::Target& i_target, + const bool l_supported_freq, + const uint64_t i_num_ports) { std::vector l_max_mrw_freqs(NUM_MAX_FREQS, 0); uint8_t l_req_sync_mode = 0; diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/freq/sync.C b/src/import/chips/p9/procedures/hwp/memory/lib/freq/sync.C index 9b864695a..8c9b1ccc5 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/freq/sync.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/freq/sync.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016,2018 */ +/* Contributors Listed Below - COPYRIGHT 2016,2019 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -40,17 +40,17 @@ #include // Memory libraries +#include #include #include -#include // Generic libraries +#include #include #include #include #include #include -#include #include #include @@ -97,7 +97,7 @@ fapi2::ReturnCode dimm_speed_map(const std::vector< fapi2::Target& i_target, l_is_hw_deconfigured = true; MSS_ASSERT_NOEXIT(false, - fapi2::MSS_FREQ_NOT_EQUAL_NEST_FREQ() + fapi2::MSS_FREQ_NOT_EQUAL_MAX_DOMAIN_FREQ() .set_MSS_FREQ(i_dimm_speed) - .set_NEST_FREQ(i_nest_freq) - .set_MCS_TARGET(l_mcs), + .set_DOMAIN_FREQ(i_nest_freq) + .set_DOMAIN_TARGET(l_mcs), "Deconfiguring %s due to unequal frequencies: mss: %d, nest: %d", mss::c_str(l_mcs), i_dimm_speed, diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/freq/sync.H b/src/import/chips/p9/procedures/hwp/memory/lib/freq/sync.H index 7a780c310..4f8624890 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/freq/sync.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/freq/sync.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016,2018 */ +/* Contributors Listed Below - COPYRIGHT 2016,2019 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -39,6 +39,7 @@ #include #include +#include #include #include #include @@ -67,12 +68,6 @@ inline bool is_nest_freq_valid (const uint64_t i_proposed_freq) return ( std::binary_search(NIMBUS_NEST_FREQS.begin(), NIMBUS_NEST_FREQS.end(), i_proposed_freq) ); } -enum class speed_equality : uint8_t -{ - NOT_EQUAL_DIMM_SPEEDS = 0, ///< denotes all DIMMs don't have the same speed - EQUAL_DIMM_SPEEDS = 1, ///< denotes all DIMMs have the same speed -}; - /// /// @brief Retrieves a mapping of MSS frequency values per mcbist target /// @param[in] i_targets vector of controller targets -- cgit v1.2.1