From d1fe32b96c0f48c266da346fa2d05676b3f1e4f8 Mon Sep 17 00:00:00 2001 From: Andre Marin Date: Thu, 1 Dec 2016 03:56:02 -0600 Subject: Add common functionality between RCD and data buffer control word API Change-Id: I601f143578a796f30ad582c1581f73ebf413840c Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33247 Tested-by: Jenkins Server Tested-by: Hostboot CI Reviewed-by: Louis Stermole Reviewed-by: Brian R. Silver Reviewed-by: JACOB L. HARVEY Reviewed-by: Jennifer A. Stofer Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33260 Reviewed-by: Hostboot Team Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell --- .../p9/procedures/hwp/memory/lib/dimm/bcw_load.H | 198 +-------------------- 1 file changed, 4 insertions(+), 194 deletions(-) (limited to 'src/import/chips/p9/procedures/hwp/memory/lib/dimm/bcw_load.H') diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/bcw_load.H b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/bcw_load.H index 58480c6aa..f487a826d 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/bcw_load.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/bcw_load.H @@ -42,200 +42,11 @@ #include #include +#include namespace mss { -enum data_buffer -{ - BCW_4BIT, - BCW_8BIT, -}; - -struct bcw_data -{ - // function space # - fapi2::buffer iv_func_space; - - // Which buffer control word (bcw) # this is - fapi2::buffer iv_number; - - // The attribute getter - fapi2::ReturnCode (*iv_attr_get)(const fapi2::Target&, uint8_t&); - - // The bcw value - fapi2::buffer iv_data; - - // The delay needed after this BCW word is written - uint64_t iv_delay; - - /// - /// @brief NO-OP function to avoid a function nullptr - /// @param[in] i_target a DIMM target - /// @param[out] o_output output remains unchanged - /// @return FAPI2_RC_SUCCESS iff okay - /// - static fapi2::ReturnCode no_op_func(const fapi2::Target& i_target, uint8_t& o_output) - { - return fapi2::FAPI2_RC_SUCCESS; - } - - /// - /// @brief ctor for attribute driven data - /// - bcw_data( uint64_t i_func_space, - uint64_t i_number, - fapi2::ReturnCode (*i_func)(const fapi2::Target&, uint8_t&), - uint64_t i_delay ): - iv_func_space(i_func_space), - iv_number(i_number), - iv_attr_get(i_func), - iv_data(0), - iv_delay(i_delay) - {} - - /// - /// @brief ctor for custom data - /// - bcw_data( uint64_t i_func_space, - uint64_t i_number, - uint64_t i_data, - uint64_t i_delay): - iv_func_space(i_func_space), - iv_number(i_number), - iv_data(i_data), - iv_delay(i_delay) - { - // Setting the attribute accessor function pointer to NO-OP - // when we call the ctor that doesn't use it to avoid cases - // when iv_attr_get can be nullptr and potentially cause a seg fault - iv_attr_get = &no_op_func; - } - -}; - -template< data_buffer T > -class bcwTraits; - -template< > -class bcwTraits< BCW_8BIT > -{ - public: - static constexpr uint64_t DATA_LEN = 8; - static constexpr uint64_t WORD_LEN = 4; - static constexpr uint64_t SWIZZLE_START = 7; -}; - -template< > -class bcwTraits< BCW_4BIT > -{ - public: - static constexpr uint64_t DATA_LEN = 4; - static constexpr uint64_t WORD_LEN = 4; - static constexpr uint64_t SWIZZLE_START = 7; -}; - -/// -/// @brief Helper function to load BCWs -/// @tparam T the buffer control word type (4 bit or 8 bit) -/// @tparam TT traits type defaults to bcwTraits -/// @param[in] i_target a DIMM target -/// @param[in] i_data bcw data to send -/// @param[in,out] io_inst a vector of CCS instructions we should add to -/// @return FAPI2_RC_SUCCESS if and only if ok -/// -template< data_buffer T, typename TT = bcwTraits > -static fapi2::ReturnCode bcw_engine_boilerplate(const fapi2::Target& i_target, - const bcw_data& i_data, - std::vector< ccs::instruction_t >& io_inst) -{ - constexpr uint64_t DDR_ADDRESS_12 = 12; - - // Note: this isn't general - assumes Nimbus via MCBIST instruction here BRS - ccs::instruction_t l_inst = ccs::rcd_command(i_target); - - // Address bit 12 must be 1 for accesses to Data Buffer (DB) Control Words. - // Consider adding more commonality between RCD/BCW commands - AAM - l_inst.arr0.setBit(); - - // For user defined data, iv_data is user defined and iv_attr_get is a NO-OP - // For attribute defined data, iv_attr_get will define data and l_value initialization is overwritten - // I need l_value integral because the attribute accessor template deduction doesn't let me use buffers - // and since I'm passing in bcw data as const I can't pass in iv_data to the attribute accessor - // which would break const correctness - uint8_t l_value = i_data.iv_data; - FAPI_TRY( i_data.iv_attr_get(i_target, l_value) ); - - // Data to be written into the configuration registers - // 4-bit control are containned in bits DA0 thorugh DA3 - // 8-bit control are contained in bits DA0 thorugh DA7 - mss::swizzle< MCBIST_CCS_INST_ARR0_00_DDR_ADDRESS_0_13, - TT::DATA_LEN, TT::SWIZZLE_START >(fapi2::buffer(l_value), l_inst.arr0); - - // Selection of each word of control bits - // 4-bit control words are selected by bits on DA4 through DA11 - // 8-bit control words are selected by bits on DA8 through DA11 - mss::swizzle < MCBIST_CCS_INST_ARR0_00_DDR_ADDRESS_0_13 + TT::DATA_LEN, - TT::WORD_LEN, TT::SWIZZLE_START > (i_data.iv_number, l_inst.arr0); - - // For changes to the control word setting [...] the controller needs to wait tMRC[tDLLK] after - // the last control word access, before further access to the DRAM can take place. - l_inst.arr1.insertFromRight(i_data.iv_delay); - - FAPI_INF("F%dBC%02d%s value 0x%x (%d cycles) 0x%016llx:0x%016llx %s", - uint8_t(i_data.iv_func_space), uint8_t(i_data.iv_number), (T == BCW_4BIT ? "" : "X"), l_value, - i_data.iv_delay, uint64_t(l_inst.arr0), uint64_t(l_inst.arr1), mss::c_str(i_target)); - - io_inst.push_back(l_inst); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Sets buffer control words (BCW) -/// @tparam T the buffer control word type (4 bit or 8 bit) -/// @tparam TT traits type defaults to bcwTraits -/// @param[in] i_target a DIMM target -/// @param[in] i_data a vector bcw data to send -/// @param[in,out] io_inst a vector of CCS instructions we should add to -/// @return FAPI2_RC_SUCCESS if and only if ok -/// -template< data_buffer T, typename TT = bcwTraits > -inline fapi2::ReturnCode bcw_engine( const fapi2::Target& i_target, - const bcw_data& i_data, - std::vector< ccs::instruction_t >& io_inst) -{ - FAPI_TRY( bcw_engine_boilerplate(i_target, i_data, io_inst) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Sets buffer control words (BCW) -/// @tparam T the buffer control word type (4 bit or 8 bit) -/// @tparam TT traits type defaults to bcwTraits -/// @param[in] i_target a DIMM target -/// @param[in] i_data_list a vector bcw data to send -/// @param[in,out] io_inst a vector of CCS instructions we should add to -/// @return FAPI2_RC_SUCCESS if and only if ok -/// -template > -inline fapi2::ReturnCode bcw_engine( const fapi2::Target& i_target, - const std::vector& i_data_list, - std::vector< ccs::instruction_t >& io_inst) -{ - for (const auto& data : i_data_list) - { - FAPI_TRY( bcw_engine_boilerplate(i_target, data, io_inst) ); - } - -fapi_try_exit: - return fapi2::current_err; -} - /// /// @brief Sets the function space for the BCW /// @tparam T the functon space number we want @@ -252,9 +63,9 @@ inline fapi2::ReturnCode function_space_select(const fapi2::Target< fapi2::TARGE constexpr uint8_t FSPACE = 0; constexpr uint8_t WORD = 7; - FAPI_TRY( bcw_engine(i_target, - bcw_data( FSPACE, WORD, T, mss::tmrd() ), - io_inst) ); + FAPI_TRY( control_word_engine(i_target, + cw_data( FSPACE, WORD, T, mss::tmrd() ), + io_inst) ); fapi_try_exit: return fapi2::current_err; @@ -269,7 +80,6 @@ fapi_try_exit: template< fapi2::TargetType T > fapi2::ReturnCode bcw_load( const fapi2::Target& i_target ); - // // Implement the polymorphism for bcw_load // -- cgit v1.2.1