From 6fa8d04529309619414c75a1e975f3f41d46fcd0 Mon Sep 17 00:00:00 2001 From: Stephen Glancy Date: Tue, 12 Feb 2019 16:52:55 -0500 Subject: Updates read to write timers for LRDIMM Change-Id: I2609a431950e6e1c7a8ec855095872fefd46371d Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71777 Tested-by: FSP CI Jenkins Tested-by: Jenkins Server Tested-by: Hostboot CI Dev-Ready: STEPHEN GLANCY Reviewed-by: Louis Stermole Reviewed-by: ANDRE A MARIN Reviewed-by: Jennifer A. Stofer Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71790 Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Reviewed-by: Christian R. Geddes --- .../p9/procedures/hwp/initfiles/p9n_mca_scom.C | 40 ++++++++++++++++++---- 1 file changed, 34 insertions(+), 6 deletions(-) (limited to 'src/import/chips/p9/procedures/hwp/initfiles') diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9n_mca_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9n_mca_scom.C index 1a27cd2f7..7098a92fe 100644 --- a/src/import/chips/p9/procedures/hwp/initfiles/p9n_mca_scom.C +++ b/src/import/chips/p9/procedures/hwp/initfiles/p9n_mca_scom.C @@ -507,12 +507,40 @@ fapi2::ReturnCode p9n_mca_scom(const fapi2::Target& TGT0 l_scom_buffer.insert<20, 4, 60, uint64_t>(literal_4 ); l_scom_buffer.insert<24, 4, 60, uint64_t>(literal_4 ); l_scom_buffer.insert<28, 4, 60, uint64_t>(l_TGT2_ATTR_EFF_DRAM_TCCD_L[l_def_PORT_INDEX] ); - l_scom_buffer.insert<32, 5, 59, uint64_t>((((l_TGT2_ATTR_EFF_DRAM_CL[l_def_PORT_INDEX] + literal_4) + - l_def_BUS_TURNAROUND_TCK) - l_TGT2_ATTR_EFF_DRAM_CWL[l_def_PORT_INDEX]) ); - l_scom_buffer.insert<37, 5, 59, uint64_t>((((l_TGT2_ATTR_EFF_DRAM_CL[l_def_PORT_INDEX] + literal_4) + - l_def_BUS_TURNAROUND_TCK) - l_TGT2_ATTR_EFF_DRAM_CWL[l_def_PORT_INDEX]) ); - l_scom_buffer.insert<42, 5, 59, uint64_t>((((l_TGT2_ATTR_EFF_DRAM_CL[l_def_PORT_INDEX] + literal_4) + - l_def_BUS_TURNAROUND_TCK) - l_TGT2_ATTR_EFF_DRAM_CWL[l_def_PORT_INDEX]) ); + + if ((l_TGT2_ATTR_EFF_DIMM_TYPE[l_def_PORT_INDEX][literal_0] == literal_1)) + { + l_scom_buffer.insert<32, 5, 59, uint64_t>((((l_TGT2_ATTR_EFF_DRAM_CL[l_def_PORT_INDEX] + literal_4) + + l_def_BUS_TURNAROUND_TCK) - l_TGT2_ATTR_EFF_DRAM_CWL[l_def_PORT_INDEX]) ); + } + else if ((l_TGT2_ATTR_EFF_DIMM_TYPE[l_def_PORT_INDEX][literal_0] != literal_1)) + { + l_scom_buffer.insert<32, 5, 59, uint64_t>(((((l_TGT2_ATTR_EFF_DRAM_CL[l_def_PORT_INDEX] + literal_4) + + l_def_BUS_TURNAROUND_TCK) - l_TGT2_ATTR_EFF_DRAM_CWL[l_def_PORT_INDEX]) + literal_6) ); + } + + if ((l_TGT2_ATTR_EFF_DIMM_TYPE[l_def_PORT_INDEX][literal_0] == literal_1)) + { + l_scom_buffer.insert<37, 5, 59, uint64_t>((((l_TGT2_ATTR_EFF_DRAM_CL[l_def_PORT_INDEX] + literal_4) + + l_def_BUS_TURNAROUND_TCK) - l_TGT2_ATTR_EFF_DRAM_CWL[l_def_PORT_INDEX]) ); + } + else if ((l_TGT2_ATTR_EFF_DIMM_TYPE[l_def_PORT_INDEX][literal_0] != literal_1)) + { + l_scom_buffer.insert<37, 5, 59, uint64_t>(((((l_TGT2_ATTR_EFF_DRAM_CL[l_def_PORT_INDEX] + literal_4) + + l_def_BUS_TURNAROUND_TCK) - l_TGT2_ATTR_EFF_DRAM_CWL[l_def_PORT_INDEX]) + literal_6) ); + } + + if ((l_TGT2_ATTR_EFF_DIMM_TYPE[l_def_PORT_INDEX][literal_0] == literal_1)) + { + l_scom_buffer.insert<42, 5, 59, uint64_t>((((l_TGT2_ATTR_EFF_DRAM_CL[l_def_PORT_INDEX] + literal_4) + + l_def_BUS_TURNAROUND_TCK) - l_TGT2_ATTR_EFF_DRAM_CWL[l_def_PORT_INDEX]) ); + } + else if ((l_TGT2_ATTR_EFF_DIMM_TYPE[l_def_PORT_INDEX][literal_0] != literal_1)) + { + l_scom_buffer.insert<42, 5, 59, uint64_t>(((((l_TGT2_ATTR_EFF_DRAM_CL[l_def_PORT_INDEX] + literal_4) + + l_def_BUS_TURNAROUND_TCK) - l_TGT2_ATTR_EFF_DRAM_CWL[l_def_PORT_INDEX]) + literal_6) ); + } + l_scom_buffer.insert<47, 4, 60, uint64_t>((((l_TGT2_ATTR_EFF_DRAM_CWL[l_def_PORT_INDEX] + literal_4) + l_def_BUS_TURNAROUND_TCK) - l_TGT2_ATTR_EFF_DRAM_CL[l_def_PORT_INDEX]) ); l_scom_buffer.insert<51, 6, 58, uint64_t>(((l_TGT2_ATTR_EFF_DRAM_CWL[l_def_PORT_INDEX] + literal_4) + -- cgit v1.2.1