From 0606bb79551a9e1941bd64eea86951dabf098821 Mon Sep 17 00:00:00 2001 From: Dan Crowell Date: Tue, 30 Jul 2019 13:21:43 -0500 Subject: Honor DDIMM EFD metadata to choose OMI frequencies There are two places where the list of supported frequencies are listed. First, there are a couple of bytes that list the overall support. Second, there are the EFD buckets themselves. The previous code walked all the buckets but ignored the summary bytes. In order to avoid drastically unique SPD images for Gemini, we are adding support to honor the summary bytes so we can choose specific speeds to run at. Change-Id: I82477468eca06d9c23fd8cdc70fa583d49f7d4bf Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/81385 Reviewed-by: ANDRE A MARIN Reviewed-by: Roland Veloz Tested-by: FSP CI Jenkins Tested-by: Jenkins Server Tested-by: Hostboot CI Reviewed-by: Jennifer A Stofer Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/81447 Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Reviewed-by: Christian R Geddes --- .../p9/procedures/hwp/accessors/ddimm_get_efd.C | 26 ++++++++++++++++++++-- 1 file changed, 24 insertions(+), 2 deletions(-) mode change 100644 => 100755 src/import/chips/p9/procedures/hwp/accessors/ddimm_get_efd.C (limited to 'src/import/chips/p9/procedures/hwp/accessors/ddimm_get_efd.C') diff --git a/src/import/chips/p9/procedures/hwp/accessors/ddimm_get_efd.C b/src/import/chips/p9/procedures/hwp/accessors/ddimm_get_efd.C old mode 100644 new mode 100755 index 4f939789c..d1877bf28 --- a/src/import/chips/p9/procedures/hwp/accessors/ddimm_get_efd.C +++ b/src/import/chips/p9/procedures/hwp/accessors/ddimm_get_efd.C @@ -82,6 +82,8 @@ const uint16_t SPD_EFD_COUNT_MASK = 0x003F; // Offset to the EFD meta data within the SPD. // size is 128 bytes; address 288 to 415; 32 EFD meta data's sized 4 bytes each const size_t SPD_EFD_META_DATA_ADDR = 288; +// Offset to Host Interface Speed Supported within the SPD. +const size_t SPD_SUPPORTED_HOST_SPEEDS_ADDR = 205; /// SPD - EFD meta data constants // Size of the EFD meta data's within the SPD @@ -448,6 +450,8 @@ extern "C" const uint8_t* l_efdMetaDataNptr(nullptr); // Pointer to an individual EFD const uint8_t* l_efdDataNptr(nullptr); + // Host Interface Supported Speeds field + uint16_t l_supportedSpeeds(0); // Fill in a data buffer for FFDC purposes that contains // the first 8 bytes from the SPD (freq,rank,channel,dimms) @@ -683,7 +687,7 @@ extern "C" // No need to swap endian, already in host format l_freqMask = ddrFrequencyToBitMask(io_vpdInfo.iv_omi_freq_mhz); - FAPI_DBG ( "ddr4_get_efd: Caller supplied frquency = %d", + FAPI_DBG ( "ddr4_get_efd: Caller supplied frequency = %d", io_vpdInfo.iv_omi_freq_mhz ); // Confirm that mapping the frequency succeeded @@ -719,7 +723,7 @@ extern "C" FAPI_TRY(fapi2::FAPI2_RC_FALSE); } - FAPI_DBG ("ddr4_get_efd: Caller supplied frquency = %d, " + FAPI_DBG ("ddr4_get_efd: Caller supplied frequency = %d, " "converted to frequency bit value mask = 0x%.4X", io_vpdInfo.iv_omi_freq_mhz, l_freqMask); @@ -767,6 +771,24 @@ extern "C" //// Fourthly, find the EFD that matches the given frequency //// and master rank + // Check the master list of supported frequencies before walking + // through the EFDs + l_supportedSpeeds = *reinterpret_cast + (i_spdBuffer + SPD_SUPPORTED_HOST_SPEEDS_ADDR); + l_supportedSpeeds = le16toh(l_supportedSpeeds); + FAPI_ASSERT( l_freqMask & l_supportedSpeeds, + fapi2::DDIMM_UNSUPPORTED_FREQUENCY(). + set_UNSUPPORTED_FREQ(static_cast + (io_vpdInfo.iv_omi_freq_mhz)). + set_SUPPORTED_FREQS(l_supportedSpeeds). + set_OCMB_CHIP_TARGET(i_ocmbFapi2Target). + set_VPD_TYPE(io_vpdInfo.iv_vpd_type). + set_DDR_TYPE(static_cast + (i_spdBuffer[SPD_MEM_TYPE_ADDR])), + "Invalid frequency for this DIMM - request=%d, supported mask=%.4X", + io_vpdInfo.iv_omi_freq_mhz, l_supportedSpeeds ); + + // Point to the beginning of the EFD meta data, AKA EFD[0] meta data. l_efdMetaDataPtr = i_spdBuffer + SPD_EFD_META_DATA_ADDR; -- cgit v1.2.1