From e455c84e39cf706c78a56c947cea545943a97c82 Mon Sep 17 00:00:00 2001
From: Louis Stermole <stermole@us.ibm.com>
Date: Mon, 10 Jun 2019 11:02:34 -0400
Subject: Fix missing params in exp_draminit response trace

Change-Id: I6ea737c528bde54cc33083588d5c9717d05890da
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78648
Reviewed-by: Mark Pizzutillo <mark.pizzutillo@ibm.com>
Reviewed-by: RYAN P. KING <rpking@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78674
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
---
 .../hwp/memory/lib/phy/exp_train_display.C         | 42 +++++++++++-----------
 1 file changed, 21 insertions(+), 21 deletions(-)

(limited to 'src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/phy/exp_train_display.C')

diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/phy/exp_train_display.C b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/phy/exp_train_display.C
index 7be962792..67d2a73ba 100644
--- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/phy/exp_train_display.C
+++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/phy/exp_train_display.C
@@ -105,7 +105,7 @@ void display_lane_info(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_targ
 }
 
 ///
-/// @brief Displays MRS information
+/// @brief Displays MR information
 /// @param[in] i_target the OCMB target
 /// @param[in] i_training_info the training information to display
 ///
@@ -129,13 +129,13 @@ fapi2::ReturnCode display_mrs_info(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_C
             constexpr uint8_t DIMM_OFFSET = 2;
             const auto l_rank = l_dimm_rank + mss::index(l_dimm) * DIMM_OFFSET;
 
-            // MRS0->5 are easy, just display the value
-            FAPI_DBG("%s rank%u MRS%u 0x%04x", mss::c_str(i_target), l_rank, 0, i_training_info.mrs_resp.MR0);
-            FAPI_DBG("%s rank%u MRS%u 0x%04x", mss::c_str(i_target), l_rank, 1, i_training_info.mrs_resp.MR1[l_rank]);
-            FAPI_DBG("%s rank%u MRS%u 0x%04x", mss::c_str(i_target), l_rank, 2, i_training_info.mrs_resp.MR2[l_rank]);
-            FAPI_DBG("%s rank%u MRS%u 0x%04x", mss::c_str(i_target), l_rank, 3, i_training_info.mrs_resp.MR3);
-            FAPI_DBG("%s rank%u MRS%u 0x%04x", mss::c_str(i_target), l_rank, 4, i_training_info.mrs_resp.MR4);
-            FAPI_DBG("%s rank%u MRS%u 0x%04x", mss::c_str(i_target), l_rank, 5, i_training_info.mrs_resp.MR5[l_rank]);
+            // MR0->5 are easy, just display the value
+            FAPI_DBG("%s rank%u MR%u 0x%04x", mss::c_str(i_target), l_rank, 0, i_training_info.mrs_resp.MR0);
+            FAPI_DBG("%s rank%u MR%u 0x%04x", mss::c_str(i_target), l_rank, 1, i_training_info.mrs_resp.MR1[l_rank]);
+            FAPI_DBG("%s rank%u MR%u 0x%04x", mss::c_str(i_target), l_rank, 2, i_training_info.mrs_resp.MR2[l_rank]);
+            FAPI_DBG("%s rank%u MR%u 0x%04x", mss::c_str(i_target), l_rank, 3, i_training_info.mrs_resp.MR3);
+            FAPI_DBG("%s rank%u MR%u 0x%04x", mss::c_str(i_target), l_rank, 4, i_training_info.mrs_resp.MR4);
+            FAPI_DBG("%s rank%u MR%u 0x%04x", mss::c_str(i_target), l_rank, 5, i_training_info.mrs_resp.MR5[l_rank]);
 
             // The number of the DRAM's and the position to access each DRAM changes based upon x4 vs x8
             const auto l_num_dram = l_dram_width == fapi2::ENUM_ATTR_MEM_EFF_DRAM_WIDTH_X4 ?
@@ -148,7 +148,7 @@ fapi2::ReturnCode display_mrs_info(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_C
             for(uint64_t l_dram = 0; l_dram < l_num_dram; ++l_dram)
             {
                 const auto l_dram_pos = l_correction_factor * l_dram;
-                FAPI_DBG("%s rank%u MRS6 dram%u 0x%04x", mss::c_str(i_target), l_rank, l_dram,
+                FAPI_DBG("%s rank%u MR6 dram%u 0x%04x", mss::c_str(i_target), l_rank, l_dram,
                          i_training_info.mrs_resp.MR6[l_rank][l_dram_pos]);
             }
         }
@@ -264,9 +264,9 @@ fapi2::ReturnCode display_response_timing(const fapi2::Target<fapi2::TARGET_TYPE
 
     for(uint8_t l_rank_n = 0; l_rank_n < l_num_rank_per_ocmb; ++l_rank_n)
     {
-        FAPI_DBG("%s RD-to-RD rank%u: %2i %2i %2i %2i", i_training_info.tm_resp.CDD_RR[l_rank_n][0],
-                 i_training_info.tm_resp.CDD_RR[l_rank_n][1], i_training_info.tm_resp.CDD_RR[l_rank_n][2],
-                 i_training_info.tm_resp.CDD_RR[l_rank_n][3]);
+        FAPI_DBG("%s RD-to-RD rank%u: %2i %2i %2i %2i", mss::c_str(i_target), l_rank_n,
+                 i_training_info.tm_resp.CDD_RR[l_rank_n][0], i_training_info.tm_resp.CDD_RR[l_rank_n][1],
+                 i_training_info.tm_resp.CDD_RR[l_rank_n][2], i_training_info.tm_resp.CDD_RR[l_rank_n][3]);
     }
 
     // WR to WR
@@ -274,9 +274,9 @@ fapi2::ReturnCode display_response_timing(const fapi2::Target<fapi2::TARGET_TYPE
 
     for(uint8_t l_rank_n = 0; l_rank_n < l_num_rank_per_ocmb; ++l_rank_n)
     {
-        FAPI_DBG("%s WR-to-WR rank%u: %2i %2i %2i %2i", i_training_info.tm_resp.CDD_WW[l_rank_n][0],
-                 i_training_info.tm_resp.CDD_WW[l_rank_n][1], i_training_info.tm_resp.CDD_WW[l_rank_n][2],
-                 i_training_info.tm_resp.CDD_WW[l_rank_n][3]);
+        FAPI_DBG("%s WR-to-WR rank%u: %2i %2i %2i %2i", mss::c_str(i_target), l_rank_n,
+                 i_training_info.tm_resp.CDD_WW[l_rank_n][0], i_training_info.tm_resp.CDD_WW[l_rank_n][1],
+                 i_training_info.tm_resp.CDD_WW[l_rank_n][2], i_training_info.tm_resp.CDD_WW[l_rank_n][3]);
     }
 
     // WR to RD
@@ -284,9 +284,9 @@ fapi2::ReturnCode display_response_timing(const fapi2::Target<fapi2::TARGET_TYPE
 
     for(uint8_t l_rank_n = 0; l_rank_n < l_num_rank_per_ocmb; ++l_rank_n)
     {
-        FAPI_DBG("%s WR-to-RD rank%u: %2i %2i %2i %2i", i_training_info.tm_resp.CDD_WR[l_rank_n][0],
-                 i_training_info.tm_resp.CDD_WR[l_rank_n][1], i_training_info.tm_resp.CDD_WR[l_rank_n][2],
-                 i_training_info.tm_resp.CDD_WR[l_rank_n][3]);
+        FAPI_DBG("%s WR-to-RD rank%u: %2i %2i %2i %2i", mss::c_str(i_target), l_rank_n,
+                 i_training_info.tm_resp.CDD_WR[l_rank_n][0], i_training_info.tm_resp.CDD_WR[l_rank_n][1],
+                 i_training_info.tm_resp.CDD_WR[l_rank_n][2], i_training_info.tm_resp.CDD_WR[l_rank_n][3]);
     }
 
     // RD to WR
@@ -294,9 +294,9 @@ fapi2::ReturnCode display_response_timing(const fapi2::Target<fapi2::TARGET_TYPE
 
     for(uint8_t l_rank_n = 0; l_rank_n < l_num_rank_per_ocmb; ++l_rank_n)
     {
-        FAPI_DBG("%s RD-to-WR rank%u: %2i %2i %2i %2i", i_training_info.tm_resp.CDD_RW[l_rank_n][0],
-                 i_training_info.tm_resp.CDD_RW[l_rank_n][1], i_training_info.tm_resp.CDD_RW[l_rank_n][2],
-                 i_training_info.tm_resp.CDD_RW[l_rank_n][3]);
+        FAPI_DBG("%s RD-to-WR rank%u: %2i %2i %2i %2i", mss::c_str(i_target), l_rank_n,
+                 i_training_info.tm_resp.CDD_RW[l_rank_n][0], i_training_info.tm_resp.CDD_RW[l_rank_n][1],
+                 i_training_info.tm_resp.CDD_RW[l_rank_n][2], i_training_info.tm_resp.CDD_RW[l_rank_n][3]);
     }
 
     return fapi2::FAPI2_RC_SUCCESS;
-- 
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