From b95951684667a2d77a76e589505e4250a0f02751 Mon Sep 17 00:00:00 2001 From: Christian Geddes Date: Thu, 25 Apr 2019 13:04:51 -0500 Subject: Force Axone simics to read all VPD from HW with config flags This commit will set the config flags to always read from HW rather than the old VPD cache in PNOR. Until this point in Axone we were still using an old copy of MVPD that we write into PNOR during the startup simics scripts. From this commit onward we will use the actual VPD simics provides. To handle this, some updates we needed to the PG rules for Axone. Change-Id: Ie06cefe1aec37edfc4c379ee1173bc51fc6bbe1f Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76519 Tested-by: Jenkins Server Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Tested-by: FSP CI Jenkins Reviewed-by: Matt Derksen Reviewed-by: Daniel M. Crowell --- src/build/configs/simics_axone.config | 28 +++++++++++++--------------- 1 file changed, 13 insertions(+), 15 deletions(-) (limited to 'src/build/configs/simics_axone.config') diff --git a/src/build/configs/simics_axone.config b/src/build/configs/simics_axone.config index 0b54948c0..fca0217d7 100644 --- a/src/build/configs/simics_axone.config +++ b/src/build/configs/simics_axone.config @@ -1,21 +1,21 @@ -# Force DJVPD read/write to use EEPROM layer instead of VPD cache +# Force DJVPD read/write to use EEPROM layer instead of old-style VPD cache set DJVPD_READ_FROM_HW set DJVPD_WRITE_TO_HW unset DJVPD_READ_FROM_PNOR unset DJVPD_WRITE_TO_PNOR -# Force MEMVPD read/write to PNOR ( No actual hardware ) -set MEMVPD_READ_FROM_PNOR -set MEMVPD_WRITE_TO_PNOR -unset MEMVPD_READ_FROM_HW -unset MEMVPD_WRITE_TO_HW +# Force MEMVPD read/write to use EEPROM layer instead of old-style VPD cache +# ( No concept of MEMVPD in Axone so should not matter ) +set MEMVPD_READ_FROM_HW +set MEMVPD_WRITE_TO_HW +unset MEMVPD_READ_FROM_PNOR +unset MEMVPD_WRITE_TO_PNOR -# Force MVPD read/write to use EEPROM layer instead of VPD cache -# (not working because shoddy MVPD currently) -#set MVPD_READ_FROM_HW -#set MVPD_WRITE_TO_HW -set MVPD_READ_FROM_PNOR -set MVPD_WRITE_TO_PNOR +# Force MVPD read/write to use EEPROM layer instead of old-style VPD cache +set MVPD_READ_FROM_HW +set MVPD_WRITE_TO_HW +unset MVPD_READ_FROM_PNOR +unset MVPD_WRITE_TO_PNOR #set to run cxx testcases during boot unset EARLY_TESTCASES @@ -26,9 +26,7 @@ set IPLTIME_CHECKSTOP_ANALYSIS #enable EEPROM caching set SUPPORT_EEPROM_CACHING -#Try to keep a list of things this does -# - skipping setting voltages in istep 8.12, nothing on other side of AVSbus -# in simics currently. +# Allows us to put in workarounds specifically for Axone bringup set AXONE_BRING_UP # Set this to pull in Axone on code (such as P9A/EXP MSS code) -- cgit v1.2.1