From ca733abd8cc5ff4e05e1bf958239c9b06710632c Mon Sep 17 00:00:00 2001 From: Dan Crowell Date: Tue, 7 Feb 2012 09:49:21 -0600 Subject: RTC Story 36901 - Use LPC Memory This includes a hack to allow access to our fake PNOR data via the ECCB scom registers. This hack will be removed once Simics provides a real ECCB model. Changes to INTR testcase were needed due to bugs exposed by the timing changes when enabling this new code. Note that the default operating mode will remain LPC_MEM because the current version of the ECCB model causes the IPL to take close to 10 minutes to complete. Change-Id: Icc236bffd52ba8214ec920f9a496adec138e54d9 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/692 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell --- src/build/citest/etc/patches/patchlist.txt | 7 +++++++ 1 file changed, 7 insertions(+) create mode 100644 src/build/citest/etc/patches/patchlist.txt (limited to 'src/build/citest/etc/patches/patchlist.txt') diff --git a/src/build/citest/etc/patches/patchlist.txt b/src/build/citest/etc/patches/patchlist.txt new file mode 100644 index 000000000..4ad66ac3f --- /dev/null +++ b/src/build/citest/etc/patches/patchlist.txt @@ -0,0 +1,7 @@ +Enable ECCB-based LPC/PNOR access (temporary) +-RTC: Story 37972 will be used to remove the patches +-CQ: No fips defect because these changes are not permanent +-Files: p8_pnor.act +-Coreq: associated changes are also in workarounds.presimsetup + + -- cgit v1.2.1