From 90eaed6f430c88eb0127ce47671bd80b21f35433 Mon Sep 17 00:00:00 2001 From: Dan Crowell Date: Sun, 1 Oct 2017 16:09:56 -0500 Subject: Force checkstops for unhandled machine checks Default MSR[ME]=0 during initial boot for bootloader and hostboot kernel Once the xscom address range has been mapped in, enable the machine check handler to force a checkstop and set MSR[ME]=1 to allow regular machine check handling CQ: SW401402 Change-Id: I104e39465e61b3b19d5c073e71271102711ae54f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/47179 Reviewed-by: Christian R. Geddes Tested-by: Jenkins Server Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Tested-by: FSP CI Jenkins Reviewed-by: William G. Hoffa Reviewed-by: Daniel M. Crowell --- src/bootloader/bl_start.S | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'src/bootloader') diff --git a/src/bootloader/bl_start.S b/src/bootloader/bl_start.S index 0110c2401..0780575d6 100644 --- a/src/bootloader/bl_start.S +++ b/src/bootloader/bl_start.S @@ -5,7 +5,7 @@ # # OpenPOWER HostBoot Project # -# Contributors Listed Below - COPYRIGHT 2015,2017 +# Contributors Listed Below - COPYRIGHT 2015,2018 # [+] Google Inc. # [+] International Business Machines Corp. # @@ -74,11 +74,10 @@ _start: ;// Set thread priority high. or 2,2,2 - ;// Clear MSR[TA] (bit 1) and enable MSR[ME] (bit 51). + ;// Clear MSR[TA] (bit 1) mfmsr r2 rldicl r2,r2,1,1 ;// Clear bit 1 - result [1-63,0] rotrdi r2,r2,1 ;// Rotate right 1 - result [0,63] - ori r2,r2,4096 ;// Set bit 51 ;// Set up SRR0 / SRR1 to enable new MSR. mtsrr1 r2 li r2, _start_postmsr@l -- cgit v1.2.1