From e36e0019e0b97ee66e649fd32a708e2905b26623 Mon Sep 17 00:00:00 2001 From: Bill Hoffa Date: Wed, 10 Oct 2018 08:49:08 -0500 Subject: HBBL LPC Error Checking - To avoid IPL delays, the LPC status register should be checked prior to loading the entire PNOR image (done via LPC). If an error condition occurs, HBBL should fail out. Change-Id: I5d716213f468e28191db794bf3e5480af547b26e CQ: SW446254 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68442 Tested-by: Jenkins Server Tested-by: Jenkins OP Build CI Tested-by: FSP CI Jenkins Tested-by: Jenkins OP HW Reviewed-by: Christian R. Geddes Reviewed-by: Nicholas E. Bofferding Reviewed-by: Daniel M. Crowell --- src/bootloader/bootloader.C | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) (limited to 'src/bootloader/bootloader.C') diff --git a/src/bootloader/bootloader.C b/src/bootloader/bootloader.C index 2b9217c98..6cb1642dd 100644 --- a/src/bootloader/bootloader.C +++ b/src/bootloader/bootloader.C @@ -431,11 +431,6 @@ namespace Bootloader{ ? l_blConfigData->lpcBAR : MMIO_GROUP0_CHIP0_LPC_BASE_ADDR; - //pnorEnd is the end of flash, which is base of lpc, plus - //the offset of the FW space, plus the TOP memory address in FW space - uint64_t l_pnorEnd = g_blData->blToHbData.lpcBAR + LPC::LPCHC_FW_SPACE - + PNOR::LPC_TOP_OF_FLASH_OFFSET; - //We dont know what the start of pnor is because we dont know the size uint64_t l_pnorStart = 0; @@ -444,10 +439,11 @@ namespace Bootloader{ // Get location of HB base code in PNOR from TOC // @TODO RTC:138268 Support multiple sides of PNOR in bootloader - bl_pnorAccess::getHBBSection(l_pnorEnd, + bl_pnorAccess::getHBBSection(g_blData->blToHbData.lpcBAR, g_blData->bl_hbbSection, l_errCode, l_pnorStart); + BOOTLOADER_TRACE(BTLDR_TRC_MAIN_GETHBBSECTION_RTN ); if(PNOR::NO_ERROR == l_errCode) -- cgit v1.2.1