From c08e3bfb24fca3c8cee5dd7b2b2950cf6965d4b4 Mon Sep 17 00:00:00 2001 From: Louis Stermole Date: Tue, 9 Apr 2019 16:03:30 -0400 Subject: Fix default on ATTR_MSS_MRW_SUPPORTED_FREQ to be 4 entries Fixes errors caused by having array size 4, but 6 entries in the default Change-Id: Ie9d17ae1ba3050feaa19acc4ef1d34b20038289b Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75788 Reviewed-by: Mark Pizzutillo Tested-by: FSP CI Jenkins Tested-by: Jenkins Server Tested-by: HWSV CI Tested-by: Hostboot CI Dev-Ready: Steven B. Janssen Reviewed-by: STEPHEN GLANCY Reviewed-by: Jennifer A. Stofer Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75804 Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Reviewed-by: Christian R. Geddes --- .../procedures/xml/attribute_info/generic_memory_mrw_attributes.xml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/import/generic/procedures/xml/attribute_info/generic_memory_mrw_attributes.xml b/src/import/generic/procedures/xml/attribute_info/generic_memory_mrw_attributes.xml index e55a14ce2..f7f678657 100644 --- a/src/import/generic/procedures/xml/attribute_info/generic_memory_mrw_attributes.xml +++ b/src/import/generic/procedures/xml/attribute_info/generic_memory_mrw_attributes.xml @@ -41,7 +41,7 @@ MT2933 = 2933, MT3200 = 3200 - 1866, 2133, 2400, 2666, 2933, 3200 + 1866, 2133, 2400, 2666 MT/s -- cgit v1.2.1