From 8fee26f9c9c8790b43282367bf2ef8033baa279c Mon Sep 17 00:00:00 2001 From: Zane Shelley Date: Fri, 9 Sep 2016 13:11:46 -0500 Subject: PRD: Add support for MemAddr class Change-Id: I5c3f0f3b3f1bf6a59cab4c9d9cd26adb11a76e45 RTC: 155881 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28845 Reviewed-by: Zane C. Shelley Tested-by: Jenkins Server Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29967 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell --- src/usr/diag/prdf/common/plat/mem/prdfMemAddress.C | 370 ++++++++++++++++++ src/usr/diag/prdf/common/plat/mem/prdfMemAddress.H | 202 ++++++++++ src/usr/diag/prdf/common/plat/mem/prdfMemRank.H | 14 +- src/usr/diag/prdf/common/plat/mem/prdf_plat_mem.mk | 1 + .../diag/prdf/common/plat/pegasus/prdfCenAddress.C | 346 ----------------- .../diag/prdf/common/plat/pegasus/prdfCenAddress.H | 430 --------------------- 6 files changed, 581 insertions(+), 782 deletions(-) create mode 100644 src/usr/diag/prdf/common/plat/mem/prdfMemAddress.C create mode 100644 src/usr/diag/prdf/common/plat/mem/prdfMemAddress.H delete mode 100755 src/usr/diag/prdf/common/plat/pegasus/prdfCenAddress.C delete mode 100755 src/usr/diag/prdf/common/plat/pegasus/prdfCenAddress.H diff --git a/src/usr/diag/prdf/common/plat/mem/prdfMemAddress.C b/src/usr/diag/prdf/common/plat/mem/prdfMemAddress.C new file mode 100644 index 000000000..9cf0876ec --- /dev/null +++ b/src/usr/diag/prdf/common/plat/mem/prdfMemAddress.C @@ -0,0 +1,370 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/diag/prdf/common/plat/mem/prdfMemAddress.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ + +/** @file prdfMemAddress.C + * @brief General utilities to read, modify, and write the memory address + * registers for Centaur MBA and P9 MCBIST/MCA. + */ + +#include + +// Framework includes +#include +#include + +using namespace TARGETING; + +namespace PRDF +{ + +using namespace PlatServices; + +//------------------------------------------------------------------------------ +// Class MemAddr +//------------------------------------------------------------------------------ + +template<> +MemAddr MemAddr::fromReadAddr( uint64_t i_addr ) +{ + uint64_t mrnk = (i_addr >> 59) & 0x7; // 2: 4 + uint64_t srnk = (i_addr >> 56) & 0x7; // 5: 7 + uint64_t row = (i_addr >> 38) & 0x1ffff; // 8:25 + uint64_t col = (i_addr >> 31) & 0x7f; // 26:32 + uint64_t bnk = (i_addr >> 26) & 0x1f; // 33:37 + + return MemAddr( MemRank(mrnk, srnk), bnk, row, col ); +} + +template<> +MemAddr MemAddr::fromReadAddr( uint64_t i_addr ) +{ + uint64_t mrnk = (i_addr >> 60) & 0x7; // 1: 3 + uint64_t srnk = (i_addr >> 57) & 0x7; // 4: 6 + uint64_t bnk = (i_addr >> 53) & 0xf; // 7:10 + uint64_t r16_r0 = (i_addr >> 36) & 0x1ffff; // 11:27 + uint64_t col = (i_addr >> 27) & 0x1ff; // 28:36 + uint64_t r17 = (i_addr >> 22) & 0x1; // 41 + + uint64_t row = (r17 << 17) | r16_r0; + + return MemAddr( MemRank(mrnk, srnk), bnk, row, col ); +} + +template<> +MemAddr MemAddr::fromMaintAddr( uint64_t i_addr ) +{ + uint64_t rslct = (i_addr >> 59) & 0x7; // 3: 4 + uint64_t srnk = (i_addr >> 56) & 0x7; // 5: 7 + uint64_t row = (i_addr >> 38) & 0x1ffff; // 8:25 + uint64_t col = (i_addr >> 31) & 0x7f; // 26:32 + uint64_t bnk = (i_addr >> 26) & 0x1f; // 33:37 + uint64_t dslct = (i_addr >> 23) & 0x1; // 40 + + uint64_t mrnk = (dslct << 2) | rslct; + + return MemAddr( MemRank(mrnk, srnk), bnk, row, col ); +} + +template<> +MemAddr MemAddr::fromMaintAddr( uint64_t i_addr ) +{ + uint64_t mrnk = (i_addr >> 60) & 0x7; // 1: 3 + uint64_t srnk = (i_addr >> 57) & 0x7; // 4: 6 + uint64_t bnk = (i_addr >> 53) & 0xf; // 7:10 + uint64_t r16_r0 = (i_addr >> 36) & 0x1ffff; // 11:27 + uint64_t col = (i_addr >> 27) & 0x1ff; // 28:36 + uint64_t r17 = (i_addr >> 4) & 0x1; // 59 + + uint64_t row = (r17 << 17) | r16_r0; + + return MemAddr( MemRank(mrnk, srnk), bnk, row, col ); +} + +//------------------------------------------------------------------------------ +// Address Accessor Functions +//------------------------------------------------------------------------------ + +template<> +uint32_t getMemReadAddr( ExtensibleChip * i_chip, uint32_t i_pos, + MemAddr::ReadReg i_reg, MemAddr & o_addr ) +{ + #define PRDF_FUNC "[getMemReadAddr] " + + // Check parameters + PRDF_ASSERT( nullptr != i_chip ); + PRDF_ASSERT( TYPE_MCBIST == i_chip->getTrgtType() ); + PRDF_ASSERT( i_pos < MAX_MCA_PER_MCBIST ); + + // Get the register string. + const char * tmp = ""; + switch ( i_reg ) + { + case MemAddr::READ_NCE_ADDR: tmp = "MBNCER"; break; + case MemAddr::READ_RCE_ADDR: tmp = "MBRCER"; break; + case MemAddr::READ_MPE_ADDR: tmp = "MBMPER"; break; + case MemAddr::READ_UE_ADDR : tmp = "MBUER" ; break; + case MemAddr::READ_AUE_ADDR: tmp = "MBAUER"; break; + default: PRDF_ASSERT( false ); + } + + char reg_str[64]; + sprintf( reg_str, "MCB%d_%s", i_pos, tmp ); + + // Read the address register + SCAN_COMM_REGISTER_CLASS * reg = i_chip->getRegister( reg_str ); + uint32_t o_rc = reg->Read(); + if ( SUCCESS != o_rc ) + { + PRDF_ERR( PRDF_FUNC "Read() failed on %s: i_chip=0x%08x", + reg_str, i_chip->getHuid() ); + } + else + { + // Get the address object. + uint64_t addr = reg->GetBitFieldJustified( 0, 64 ); + o_addr = MemAddr::fromReadAddr( addr ); + } + + return o_rc; + + #undef PRDF_FUNC +} + +//------------------------------------------------------------------------------ + +template<> +uint32_t getMemReadAddr( ExtensibleChip * i_chip, uint32_t i_pos, + MemAddr::ReadReg i_reg, MemAddr & o_addr ) +{ + #define PRDF_FUNC "[getMemReadAddr] " + + // Check parameters + PRDF_ASSERT( nullptr != i_chip ); + PRDF_ASSERT( TYPE_MEMBUF == i_chip->getTrgtType() ); + PRDF_ASSERT( i_pos < MAX_MBA_PER_MEMBUF ); + + // Get the register string. + const char * tmp = ""; + switch ( i_reg ) + { + case MemAddr::READ_NCE_ADDR: tmp = "MBNCER"; break; + case MemAddr::READ_RCE_ADDR: tmp = "MBRCER"; break; + case MemAddr::READ_MPE_ADDR: tmp = "MBMPER"; break; + case MemAddr::READ_UE_ADDR : tmp = "MBUER" ; break; + default: PRDF_ASSERT( false ); + } + + char reg_str[64]; + sprintf( reg_str, "MCB%d_%s", i_pos, tmp ); + + // Read the address register + SCAN_COMM_REGISTER_CLASS * reg = i_chip->getRegister( reg_str ); + uint32_t o_rc = reg->Read(); + if ( SUCCESS != o_rc ) + { + PRDF_ERR( PRDF_FUNC "Read() failed on %s: i_chip=0x%08x", + reg_str, i_chip->getHuid() ); + } + else + { + // Get the address object. + uint64_t addr = reg->GetBitFieldJustified( 0, 64 ); + o_addr = MemAddr::fromReadAddr( addr ); + } + + return o_rc; + + #undef PRDF_FUNC +} + +//------------------------------------------------------------------------------ + +#ifdef __HOSTBOOT_MODULE + +template<> +uint32_t getMemMaintAddr( ExtensibleChip * i_chip, + MemAddr & o_addr ) +{ + #define PRDF_FUNC "[getMemMaintAddr] " + + // Check parameters + PRDF_ASSERT( nullptr != i_chip ); + PRDF_ASSERT( TYPE_MCBIST == i_chip->getTrgtType() ); + + // Read the address register + // We need to use ForceRead() here because it is possible we needed to stop + // the maintenance command after capturing the initial register data. + SCAN_COMM_REGISTER_CLASS * reg = i_chip->getRegister( "MCBMCAT" ); + uint32_t o_rc = reg->ForceRead(); + if ( SUCCESS != o_rc ) + { + PRDF_ERR( PRDF_FUNC "Read() failed on MCBMCAT: i_chip=0x%08x", + i_chip->getHuid() ); + } + else + { + // Get the address object. + uint64_t addr = reg->GetBitFieldJustified( 0, 64 ); + o_addr = MemAddr::fromMaintAddr( addr ); + } + + return o_rc; + + #undef PRDF_FUNC +} + +//------------------------------------------------------------------------------ + +template<> +uint32_t getMemMaintAddr( ExtensibleChip * i_chip, MemAddr & o_addr ) +{ + #define PRDF_FUNC "[getMemMaintAddr] " + + // Check parameters + PRDF_ASSERT( nullptr != i_chip ); + PRDF_ASSERT( TYPE_MBA == i_chip->getTrgtType() ); + + // Read the address register + // We need to use ForceRead() here because it is possible we needed to stop + // the maintenance command after capturing the initial register data. + SCAN_COMM_REGISTER_CLASS * reg = i_chip->getRegister( "MBMACA" ); + uint32_t o_rc = reg->ForceRead(); + if ( SUCCESS != o_rc ) + { + PRDF_ERR( PRDF_FUNC "Read() failed on MCBMCAT: i_chip=0x%08x", + i_chip->getHuid() ); + } + else + { + // Get the address object. + uint64_t addr = reg->GetBitFieldJustified( 0, 64 ); + o_addr = MemAddr::fromMaintAddr( addr ); + } + + return o_rc; + + #undef PRDF_FUNC +} + +//------------------------------------------------------------------------------ + +uint32_t getMemMaintPort( ExtensibleChip * i_mcbChip, + std::vector & o_mcaList ) +{ + #define PRDF_FUNC "[getMemMaintPort] " + + // Check parameters + PRDF_ASSERT( nullptr != i_mcbChip ); + PRDF_ASSERT( TYPE_MCBIST == i_mcbChip->getTrgtType() ); + + uint32_t o_rc = SUCCESS; + + o_mcaList.clear(); + + // Note that we will need to use ForceRead() on these registers because it is + // possible we needed to stop the maintenance command after capturing the + // initial register data. + + SCAN_COMM_REGISTER_CLASS * mcbagra = i_mcbChip->getRegister( "MCBAGRA" ); + SCAN_COMM_REGISTER_CLASS * mcbmcat = i_mcbChip->getRegister( "MCBMCAT" ); + SCAN_COMM_REGISTER_CLASS * mcb_cntl = i_mcbChip->getRegister( "MCB_CNTL" ); + + do + { + o_rc = mcbagra->ForceRead(); + if ( SUCCESS != o_rc ) + { + PRDF_ERR( PRDF_FUNC "Read() failed on MCBAGRA: i_mcbChip=0x%08x", + i_mcbChip->getHuid() ); + break; + } + + // Get a mask of all ports in which the command was executed. Use + // MCB_CNTL[2:5] only if MCBAGRA[10] is b0 OR MCBAGRA[10:11] is b11. + // Otherwise, use MCBMCAT[38:39]. + uint8_t portMask = 0; + if ( !mcbagra->IsBitSet(10) || mcbagra->IsBitSet(11) ) // broadcast mode + { + o_rc = mcb_cntl->ForceRead(); + if ( SUCCESS != o_rc ) + { + PRDF_ERR( PRDF_FUNC "Read() failed on MCB_CNTL: " + "i_mcbChip=0x%08x", i_mcbChip->getHuid() ); + break; + } + + portMask = mcb_cntl->GetBitFieldJustified( 2, 4 ); + } + else // non-broadcast mode + { + o_rc = mcbmcat->ForceRead(); + if ( SUCCESS != o_rc ) + { + PRDF_ERR( PRDF_FUNC "Read() failed on MCBMCAT: " + "i_mcbChip=0x%08x", i_mcbChip->getHuid() ); + break; + } + + portMask = 0x8 >> mcbmcat->GetBitFieldJustified( 38, 2 ); + } + + // Get MCAs from all targeted ports. + for ( uint8_t p = 0; p < 4; p++ ) + { + if ( 0 == (portMask & (0x8 >> p)) ) continue; + + ExtensibleChip * mcaChip = getConnectedChild(i_mcbChip,TYPE_MCA,p); + if ( nullptr == mcaChip ) + { + PRDF_ERR( PRDF_FUNC "getConnectedChild(0x%08x,TYPE_MCA,%d) " + "returned nullptr", i_mcbChip->getHuid(), p ); + PRDF_ASSERT( false ); // port configured but not functional + } + + o_mcaList.push_back( mcaChip ); + } + + // The list should never be empty. + size_t sz_list = o_mcaList.size(); + if ( 0 == sz_list ) + { + PRDF_ERR( PRDF_FUNC "o_mcaList is empty: i_mcbChip=0x%08x " + "portMask=0x%0x", i_mcbChip->getHuid(), portMask ); + PRDF_ASSERT( false ); // mcbist functional but no configured ports + } + + } while (0); + + return o_rc; + + #undef PRDF_FUNC +} + +#endif + +//------------------------------------------------------------------------------ + +} // end namespace PRDF + diff --git a/src/usr/diag/prdf/common/plat/mem/prdfMemAddress.H b/src/usr/diag/prdf/common/plat/mem/prdfMemAddress.H new file mode 100644 index 000000000..2c1a90ef6 --- /dev/null +++ b/src/usr/diag/prdf/common/plat/mem/prdfMemAddress.H @@ -0,0 +1,202 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/diag/prdf/common/plat/mem/prdfMemAddress.H $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ + +/** @file prdfMemAddress.H + * @brief General utilities to read, modify, and write the memory address + * registers for Centaur MBA and P9 MCBIST/MCA. + */ + +#ifndef __prdfMemAddress_H +#define __prdfMemAddress_H + +// Platform includes +#include +#include + +// External includes +#include + +namespace PRDF +{ + +class ExtensibleChip; + +//------------------------------------------------------------------------------ +// Class MemAddr +//------------------------------------------------------------------------------ + +/** @brief Simple container for a memory address. + * @note These addresses are relative to the MBA and MCA targets. Therefore, + * they do not contain information like the port, which is needed for + * MCBIST targets. So that information will need to be derived + * elsewhere. + */ +class MemAddr +{ + public: // constants, enums + + /** Supported read address registers */ + enum ReadReg + { + READ_NCE_ADDR, + READ_RCE_ADDR, + READ_MPE_ADDR, + READ_UE_ADDR, + READ_AUE_ADDR, // not supported on Centaur + }; + + public: // functions + + /** @brief Default constructor. */ + MemAddr() = default; + + /** + * @brief Creates a MemAddr from a mainline memory read address. + * @param i_addr 64-bit address. + */ + template + static MemAddr fromReadAddr( uint64_t i_addr ); + + /** + * @brief Creates a MemAddr from a maintenance address. + * @param i_addr 64-bit address. + */ + template + static MemAddr fromMaintAddr( uint64_t i_addr ); + + /** @return This address's rank. */ + const MemRank& getRank() const { return iv_rnk; } + + /** @return This address's bank. */ + uint32_t getBank() const { return iv_bnk; } + + /** @return This address's row. */ + uint32_t getRow() const { return iv_row; } + + /** @return This address's column. */ + uint32_t getCol() const { return iv_col; } + + /** @brief '==' operator */ + bool operator==( const MemAddr & i_addr ) const + { + return ( this->getRank() == i_addr.getRank() && + this->getBank() == i_addr.getBank() && + this->getRow() == i_addr.getRow() && + this->getCol() == i_addr.getCol() ); + } + + private: // functions + + /** + * @brief Constructor from components. + * @param i_rnk Rank See MemRank class + * @param i_bnk Bank MBA (DDR4): bg1-bg0,b1-b0 (4-bit) + * MBA (DDR3): b2-b0 (3-bit) + * MCBIST: bg0-bg1,b0-b2 (5-bit) + * @param i_row Row MBA: c13,c11,c9-c3 (9-bit) + * MCBIST: c3-c9 (7-bit) + * @param i_col Column MBA: r17-r0 (18-bit) + * MCBIST: r0-r17 (18-bit) + */ + MemAddr( MemRank i_rnk, uint8_t i_bnk, uint32_t i_row, uint16_t i_col ) : + iv_rnk(i_rnk), iv_bnk(i_bnk), iv_row(i_row), iv_col(i_col) + {} + + private: // instance variables + + MemRank iv_rnk; ///< Rank + uint8_t iv_bnk = 0; ///< Bank + uint32_t iv_row = 0; ///< Row + uint16_t iv_col = 0; ///< Column +}; + +//------------------------------------------------------------------------------ +// Address Accessor Functions +//------------------------------------------------------------------------------ + +/** + * @brief Reads the specified mainline memory read address from hardware. + * + * While the address returned will be relative to an MBA or MCA, this function + * requires the MEMBUF or MCBIST targets and the position of the MBA or MCA + * relative to the parent. The reason for this is because of where the addresses + * and FIRs are located on the Nimbus or Centaur. We didn't want to add a lot of + * hopping around between targets just to make the interface look pretty. + * + * @param i_chip An MEMBUF or MCBIST chip. + * @param i_pos Position of MBA/MCA relative to MEMBUF/MCBIST. + * @param i_reg The target address register. + * @param o_addr The returned address from hardware. + * @return Non-SUCCESS if an internal function fails, SUCCESS otherwise. + */ +template +uint32_t getMemReadAddr( ExtensibleChip * i_chip, uint32_t i_pos, + MemAddr::ReadReg i_reg, MemAddr & o_addr ); + +#ifdef __HOSTBOOT_MODULE + +/** + * @brief Reads the maintenance address from hardware. + * + * While the address returned will be relative to an MBA or MCA, this function + * requires the MBA or MCBIST targets, which is where the maintenance logic + * is on the Nimbus or Centaur. We didn't want to add a lot of hopping around + * between targets just to make the interface look pretty. + * + * The address register in the MCBIST may contain the MCA port information, but + * that is dependent on the on whether or not the command was run in broadcast + * mode or not. Therefore, users must call getMemMaintPort() to get the port + * information. + * + * @param i_chip An MBA or MCBIST chip. + * @param o_addr The returned address from hardware. + * @return Non-SUCCESS if an internal function fails, SUCCESS otherwise. + */ +template +uint32_t getMemMaintAddr( ExtensibleChip * i_chip, MemAddr & o_addr ); + +/** + * @brief Queries broadcast mode information and determines which of the MCBIST + * ports were targeted for the command. + * + * Notes about broadcast mode. It will only be run... + * - on all configured ports, no partials configurations supported. + * - if there are more than one configured ports behind the MCBIST. + * - if all configured ports have the same geometry. + * + * @note Only supported for MCBIST. + * @param i_mcbChip An MCBIST chip. + * @param o_mcaList A list of all MCAs targeted by the command. + * @return Non-SUCCESS if an internal function fails, SUCCESS otherwise. + */ +uint32_t getMemMaintPort( ExtensibleChip * i_mcbChip, + std::vector & o_mcaList ); + +#endif + +} // end namespace PRDF + +#endif // __prdfMemAddress_H + diff --git a/src/usr/diag/prdf/common/plat/mem/prdfMemRank.H b/src/usr/diag/prdf/common/plat/mem/prdfMemRank.H index 0063c204b..a48799093 100755 --- a/src/usr/diag/prdf/common/plat/mem/prdfMemRank.H +++ b/src/usr/diag/prdf/common/plat/mem/prdfMemRank.H @@ -40,7 +40,11 @@ namespace PRDF // Class MemRank //------------------------------------------------------------------------------ -/** @brief Container for a memory rank. */ +/** @brief Simple container for a memory rank. + * @note These ranks are relative to the MBA and MCA targets. Therefore, they + * do not contain information like the port, which is needed for MCBIST + * targets. So that information will need to be derived elsewhere. + */ class MemRank { public: // enums, constants @@ -57,9 +61,7 @@ class MemRank public: // functions /** @brief Default constructor */ - MemRank() : - iv_mrnk(0), iv_srnk(0) - {} + MemRank() = default; /** * @brief Constructor from components. @@ -102,8 +104,8 @@ class MemRank private: // data - uint8_t iv_mrnk; ///< Master rank (combined DIMM slct and rank slct) - uint8_t iv_srnk; ///< Slave rank + uint8_t iv_mrnk = 0; ///< Master rank (combined DIMM slct and rank slct) + uint8_t iv_srnk = 0; ///< Slave rank }; } // end namespace PRDF diff --git a/src/usr/diag/prdf/common/plat/mem/prdf_plat_mem.mk b/src/usr/diag/prdf/common/plat/mem/prdf_plat_mem.mk index 9b95cb8f5..49e62f4cb 100644 --- a/src/usr/diag/prdf/common/plat/mem/prdf_plat_mem.mk +++ b/src/usr/diag/prdf/common/plat/mem/prdf_plat_mem.mk @@ -38,6 +38,7 @@ prd_incpath += ${PRD_SRC_PATH}/common/plat/mem ################################################################################ # non-rule plugin related +prd_obj += prdfMemAddress.o # rule plugin related diff --git a/src/usr/diag/prdf/common/plat/pegasus/prdfCenAddress.C b/src/usr/diag/prdf/common/plat/pegasus/prdfCenAddress.C deleted file mode 100755 index 0401ab9c9..000000000 --- a/src/usr/diag/prdf/common/plat/pegasus/prdfCenAddress.C +++ /dev/null @@ -1,346 +0,0 @@ -/* IBM_PROLOG_BEGIN_TAG */ -/* This is an automatically generated prolog. */ -/* */ -/* $Source: src/usr/diag/prdf/common/plat/pegasus/prdfCenAddress.C $ */ -/* */ -/* OpenPOWER HostBoot Project */ -/* */ -/* Contributors Listed Below - COPYRIGHT 2013,2015 */ -/* [+] International Business Machines Corp. */ -/* */ -/* */ -/* Licensed under the Apache License, Version 2.0 (the "License"); */ -/* you may not use this file except in compliance with the License. */ -/* You may obtain a copy of the License at */ -/* */ -/* http://www.apache.org/licenses/LICENSE-2.0 */ -/* */ -/* Unless required by applicable law or agreed to in writing, software */ -/* distributed under the License is distributed on an "AS IS" BASIS, */ -/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ -/* implied. See the License for the specific language governing */ -/* permissions and limitations under the License. */ -/* */ -/* IBM_PROLOG_END_TAG */ - -/** @file prdfCenAddress.C - * @brief General utilities to read, modify, and write the memory address - * registers (MBMACA, MBMEA, etc.). Also includes the CenRank class. - */ - -#include - -#include -#include -#include - -using namespace TARGETING; - -namespace PRDF -{ - -using namespace PlatServices; - -//------------------------------------------------------------------------------ -// MBS Address Registers -//------------------------------------------------------------------------------ - -CenReadAddrReg READ_NCE_ADDR = "MBNCER"; -CenReadAddrReg READ_RCE_ADDR = "MBRCER"; -CenReadAddrReg READ_MPE_ADDR = "MBMPER"; -CenReadAddrReg READ_UE_ADDR = "MBUER"; - -//------------------------------------------------------------------------------ - -int32_t getCenReadAddr( ExtensibleChip * i_membChip, uint32_t i_mbaPos, - CenReadAddrReg i_addrReg, CenAddr & o_addr ) -{ - #define PRDF_FUNC "[getCenReadAddr] " - - int32_t o_rc = SUCCESS; - - TargetHandle_t membTrgt = i_membChip->GetChipHandle(); - - do - { - // Check parameters - if ( TYPE_MEMBUF != getTargetType(membTrgt) ) - { - PRDF_ERR( PRDF_FUNC "Unsupported target type" ); - o_rc = FAIL; break; - } - - if ( MAX_MBA_PER_MEMBUF <= i_mbaPos ) - { - PRDF_ERR( PRDF_FUNC "Invalid MBA position" ); - o_rc = FAIL; break; - } - - // Build register string - char reg_str[64]; - sprintf( reg_str, "MBA%d_%s", i_mbaPos, i_addrReg ); - - // Read from hardware - SCAN_COMM_REGISTER_CLASS * reg = i_membChip->getRegister(reg_str); - o_rc = reg->Read(); - if ( SUCCESS != o_rc ) - { - PRDF_ERR( PRDF_FUNC "Read() failed on %s", reg_str ); - break; - } - uint64_t addr = reg->GetBitFieldJustified( 0, 64 ); - - // Get the address type. - uint32_t type = CenAddr::NONE; - if ( READ_NCE_ADDR == i_addrReg ) type = CenAddr::NCE; - else if ( READ_RCE_ADDR == i_addrReg ) type = CenAddr::RCE; - else if ( READ_MPE_ADDR == i_addrReg ) type = CenAddr::MPE; - else if ( READ_UE_ADDR == i_addrReg ) type = CenAddr::UE; - else - { - PRDF_ERR( PRDF_FUNC "Unsupported register" ); - o_rc = FAIL; break; - } - - o_addr = CenAddr::fromReadAddr( addr, type ); - - } while (0); - - if ( SUCCESS != o_rc ) - { - PRDF_ERR( PRDF_FUNC "Failed: i_membChip=0x%08x i_mbaPos=%d i_addrReg=%s", - i_membChip->GetId(), i_mbaPos, i_addrReg ); - } - - return o_rc; - - #undef PRDF_FUNC -} - -//------------------------------------------------------------------------------ - -int32_t setCenReadAddr( ExtensibleChip * i_membChip, uint32_t i_mbaPos, - CenReadAddrReg i_addrReg, const CenAddr & i_addr ) -{ - #define PRDF_FUNC "[setCenReadAddr] " - - int32_t o_rc = SUCCESS; - - TargetHandle_t membTrgt = i_membChip->GetChipHandle(); - - do - { - // Check parameters - if ( TYPE_MEMBUF != getTargetType(membTrgt) ) - { - PRDF_ERR( PRDF_FUNC "Unsupported target type" ); - o_rc = FAIL; break; - } - - if ( MAX_MBA_PER_MEMBUF <= i_mbaPos ) - { - PRDF_ERR( PRDF_FUNC "Invalid MBA position" ); - o_rc = FAIL; break; - } - - // Build register string - char reg_str[64]; - sprintf( reg_str, "MBA%d_%s", i_mbaPos, i_addrReg ); - - // Write to hardware - SCAN_COMM_REGISTER_CLASS * reg = i_membChip->getRegister(reg_str); - reg->SetBitFieldJustified( 0, 64, i_addr.toReadAddr() ); - o_rc = reg->Write(); - if ( SUCCESS != o_rc ) - { - PRDF_ERR( PRDF_FUNC "Write() failed on %s", reg_str ); - break; - } - - } while (0); - - if ( SUCCESS != o_rc ) - { - PRDF_ERR( PRDF_FUNC "Failed: i_membChip=0x%08x i_mbaPos=%d i_addrReg=%s", - i_membChip->GetId(), i_mbaPos, i_addrReg ); - } - - return o_rc; - - #undef PRDF_FUNC -} - -//------------------------------------------------------------------------------ -// MBA Address Registers -//------------------------------------------------------------------------------ - -int32_t getCenMaintStartAddr( ExtensibleChip * i_mbaChip, CenAddr & o_addr ) -{ - #define PRDF_FUNC "[getCenMaintStartAddr] " - - int32_t o_rc = SUCCESS; - - TargetHandle_t mbaTrgt = i_mbaChip->GetChipHandle(); - - do - { - // Check parameters - if ( TYPE_MBA != getTargetType(mbaTrgt) ) - { - PRDF_ERR( PRDF_FUNC "Unsupported target type" ); - o_rc = FAIL; break; - } - - // Read from hardware - // We have to use ForceRead here. Value of this register is changed by - // HW when we resume maintenance command. - SCAN_COMM_REGISTER_CLASS * reg = i_mbaChip->getRegister("MBMACA"); - o_rc = reg->ForceRead(); - if ( SUCCESS != o_rc ) - { - PRDF_ERR( PRDF_FUNC "Read() failed on MBMACA" ); - break; - } - uint64_t addr = reg->GetBitFieldJustified( 0, 64 ); - - o_addr = CenAddr::fromMaintStartAddr( addr ); - - } while (0); - - if ( SUCCESS != o_rc ) - { - PRDF_ERR( PRDF_FUNC "Failed: HUID=0x%08x", getHuid(mbaTrgt) ); - } - - return o_rc; - - #undef PRDF_FUNC -} - -//------------------------------------------------------------------------------ - -int32_t setCenMaintStartAddr( ExtensibleChip * i_mbaChip, - const CenAddr & i_addr ) -{ - #define PRDF_FUNC "[setCenMaintStartAddr] " - - int32_t o_rc = SUCCESS; - - TargetHandle_t mbaTrgt = i_mbaChip->GetChipHandle(); - - do - { - // Check parameters - if ( TYPE_MBA != getTargetType(mbaTrgt) ) - { - PRDF_ERR( PRDF_FUNC "Unsupported target type" ); - o_rc = FAIL; break; - } - - // Write to hardware - SCAN_COMM_REGISTER_CLASS * reg = i_mbaChip->getRegister("MBMACA"); - reg->SetBitFieldJustified( 0, 64, i_addr.toMaintStartAddr() ); - o_rc = reg->Write(); - if ( SUCCESS != o_rc ) - { - PRDF_ERR( PRDF_FUNC "Write() failed on MBMACA" ); - break; - } - - } while (0); - - if ( SUCCESS != o_rc ) - { - PRDF_ERR( PRDF_FUNC "Failed: HUID=0x%08x", getHuid(mbaTrgt) ); - } - - return o_rc; - - #undef PRDF_FUNC -} - -//------------------------------------------------------------------------------ - -int32_t getCenMaintEndAddr( ExtensibleChip * i_mbaChip, CenAddr & o_addr ) -{ - #define PRDF_FUNC "[getCenMaintEndAddr] " - - int32_t o_rc = SUCCESS; - - TargetHandle_t mbaTrgt = i_mbaChip->GetChipHandle(); - - do - { - // Check parameters - if ( TYPE_MBA != getTargetType(mbaTrgt) ) - { - PRDF_ERR( PRDF_FUNC "Unsupported target type" ); - o_rc = FAIL; break; - } - - // Read from hardware - SCAN_COMM_REGISTER_CLASS * reg = i_mbaChip->getRegister("MBMEA"); - o_rc = reg->Read(); - if ( SUCCESS != o_rc ) - { - PRDF_ERR( PRDF_FUNC "Read() failed on MBMEA" ); - break; - } - uint64_t addr = reg->GetBitFieldJustified( 0, 64 ); - - o_addr = CenAddr::fromMaintEndAddr( addr ); - - } while (0); - - if ( SUCCESS != o_rc ) - { - PRDF_ERR( PRDF_FUNC "Failed: HUID=0x%08x", getHuid(mbaTrgt) ); - } - - return o_rc; - - #undef PRDF_FUNC -} - -//------------------------------------------------------------------------------ - -int32_t setCenMaintEndAddr( ExtensibleChip * i_mbaChip, const CenAddr & i_addr ) -{ - #define PRDF_FUNC "[setCenMaintEndAddr] " - - int32_t o_rc = SUCCESS; - - TargetHandle_t mbaTrgt = i_mbaChip->GetChipHandle(); - - do - { - // Check parameters - if ( TYPE_MBA != getTargetType(mbaTrgt) ) - { - PRDF_ERR( PRDF_FUNC "Unsupported target type" ); - o_rc = FAIL; break; - } - - // Write to hardware - SCAN_COMM_REGISTER_CLASS * reg = i_mbaChip->getRegister("MBMEA"); - reg->SetBitFieldJustified( 0, 64, i_addr.toMaintEndAddr() ); - o_rc = reg->Write(); - if ( SUCCESS != o_rc ) - { - PRDF_ERR( PRDF_FUNC "Write() failed on MBMEA" ); - break; - } - - } while (0); - - if ( SUCCESS != o_rc ) - { - PRDF_ERR( PRDF_FUNC "Failed: HUID=0x%08x", getHuid(mbaTrgt) ); - } - - return o_rc; - - #undef PRDF_FUNC -} - -} // end namespace PRDF diff --git a/src/usr/diag/prdf/common/plat/pegasus/prdfCenAddress.H b/src/usr/diag/prdf/common/plat/pegasus/prdfCenAddress.H deleted file mode 100755 index 91a12151d..000000000 --- a/src/usr/diag/prdf/common/plat/pegasus/prdfCenAddress.H +++ /dev/null @@ -1,430 +0,0 @@ -/* IBM_PROLOG_BEGIN_TAG */ -/* This is an automatically generated prolog. */ -/* */ -/* $Source: src/usr/diag/prdf/common/plat/pegasus/prdfCenAddress.H $ */ -/* */ -/* OpenPOWER HostBoot Project */ -/* */ -/* Contributors Listed Below - COPYRIGHT 2013,2015 */ -/* [+] International Business Machines Corp. */ -/* */ -/* */ -/* Licensed under the Apache License, Version 2.0 (the "License"); */ -/* you may not use this file except in compliance with the License. */ -/* You may obtain a copy of the License at */ -/* */ -/* http://www.apache.org/licenses/LICENSE-2.0 */ -/* */ -/* Unless required by applicable law or agreed to in writing, software */ -/* distributed under the License is distributed on an "AS IS" BASIS, */ -/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ -/* implied. See the License for the specific language governing */ -/* permissions and limitations under the License. */ -/* */ -/* IBM_PROLOG_END_TAG */ - -/** @file prdfCenAddress.H - * @brief General utilities to read, modify, and write the memory address - * registers (MBMACA, MBMEA, etc.). Also includes the CenRank class. - */ - -#ifndef __prdfCenAddress_H -#define __prdfCenAddress_H - -#include -#include - -namespace PRDF -{ - -class ExtensibleChip; - -//------------------------------------------------------------------------------ -// Class CenRank -//------------------------------------------------------------------------------ - -/** - * @brief Container for a memory rank. - */ -class CenRank -{ - public: // constructor - - /** @brief Default constructor */ - CenRank() : - iv_slaveValid(false) - { - iv_rank.master.u = 0; - iv_rank.slave = 0; - } - - /** - * @brief Constructor from flattened rank. - * @param i_mrank The 3-bit master rank. - * @note The master rank format should be 0bDRR (D=DIMM select, - * R=rank select). - */ - explicit CenRank( uint8_t i_mrank ) : - iv_slaveValid(false) - { - iv_rank.master.u = i_mrank; - iv_rank.slave = 0; - } - - /** - * @brief Constructor from flattened rank. - * @param i_mrank The 3-bit master rank. - * @param i_srank The 3-bit slave rank. - * @note The master rank format should be 0bDRR (D=DIMM select, - * R=rank select). - */ - explicit CenRank( uint8_t i_mrank, uint8_t i_srank ) : - iv_slaveValid(true) - { - iv_rank.master.u = i_mrank; - iv_rank.slave = i_srank; - } - - /** @return The 1-bit DIMM select. */ - uint8_t getDimmSlct() const { return iv_rank.master.s.ds; } - - /** @return The 2-bit rank select. */ - uint8_t getRankSlct() const { return iv_rank.master.s.rs; } - - /** - * @return The 3-bit master rank. - * @note The format will be 0bDRR (D=DIMM select, R=rank select). - */ - uint8_t getMaster() const { return iv_rank.master.u; } - - /** @return The 3-bit slave rank. */ - uint8_t getSlave() const { return iv_rank.slave; } - - /** - * There are a lot of cases where we only need to know the master rank, - * however, this object stores both the master and slave rank. This function - * will indicate whether it is intended to only be used for a master rank or - * both a master and slave rank. - * - * @return TRUE if slave rank is trusted to be valid, FALSE otherwise. - */ - bool isSlaveValid() const { return iv_slaveValid; } - - /** @brief '==' operator */ - bool operator==( const CenRank & i_rank ) const - { - return ( (this->getMaster() == i_rank.getMaster()) && - (this->getSlave() == i_rank.getSlave() ) ); - } - - /** @brief '<' operator */ - bool operator<( const CenRank & i_rank ) const - { - return ( (this->getMaster() < i_rank.getMaster()) || - ( (this->getMaster() == i_rank.getMaster()) && - (this->getSlave() < i_rank.getSlave() ) ) ); - } - - private: // data - - struct - { - #if !( __BYTE_ORDER == __LITTLE_ENDIAN ) - union - { - struct { uint8_t unused : 5; uint8_t ds : 1; uint8_t rs : 2; } s; - uint8_t u; - } master; - #else - union - { - struct { uint8_t rs : 2; uint8_t ds : 1; uint8_t unused : 5; } s; - uint8_t u; - } master; - #endif - - uint8_t slave : 3; - - } iv_rank; - - bool iv_slaveValid; -}; - -//------------------------------------------------------------------------------ -// Class CenAddr -//------------------------------------------------------------------------------ - -/** - * @brief Simple container for a memory address. - */ -class CenAddr -{ - public: // constants, enums - - /** Some addresses are associated with a specific error type. For example, - * the address in the MBMACA will indicate what type of CE/UE caused the - * maintenance command to stop. - * - * From the MBMACA SCOM def: - * Multiple error status bits may be set due to unique errors on each - * 64 byte pieces of read data. - * - * Since it is possible to have multiple error types, iv_types will need to - * be an OR of all error types. The enum values will be mapped directly - * with MBMACA[40:46] so that the user can simply pass that 7-bit field - * into the i_types parameter of the contructor. - */ - enum ErrorType - { - NONE = 0, ///< Unknown attention - NCE = 0x40, ///< New CE - SCE = 0x20, ///< CE on a symbol mark - MCE = 0x10, ///< CE on a chip mark - RCE = 0x08, ///< Retry CE - MPE = 0x04, ///< Mark placed error - SUE = 0x02, ///< SUE - UE = 0x01, ///< UE - }; - - public: // functions - - /** @brief Default constructor. */ - CenAddr() : - iv_rank(0), iv_types(NONE) - { - iv_bankRowCol.bank = 0; - iv_bankRowCol.row = 0; - iv_bankRowCol.col = 0; - } - - /** - * @brief Constructor from components. - * @param i_mrank The 3-bit master rank. - * @param i_srank The 3-bit slave rank. - * @param i_bank The 4-bit bank. - * @param i_row The 17-bit row. - * @param i_col The 12-bit column. - * @param i_types An OR of all error types associated with this address (see - * enum ErrorType). - */ - CenAddr( uint32_t i_mrank, uint32_t i_srank, uint32_t i_bank, - uint32_t i_row, uint32_t i_col, uint32_t i_types = NONE ) : - iv_rank(i_mrank, i_srank), iv_types(i_types) - { - iv_bankRowCol.bank = i_bank; - iv_bankRowCol.row = i_row; - iv_bankRowCol.col = i_col; - } - - /** - * @brief Creates a CenAddr from a mainline memory read address. - * @param i_addr 64-bit address. - * @param i_type The error type associated with this address. - */ - static CenAddr fromReadAddr( uint64_t i_addr, uint32_t i_type ) - { - return CenAddr( - (i_addr >> 60) & 0x7, // master rank - (i_addr >> 57) & 0x7, // slave rank - (i_addr >> 53) & 0xf, // bank - ((i_addr >> 5) & 0x20000) | ((i_addr >> 36) & 0x1ffff), // row - (i_addr >> 24) & 0xfff, // column - i_type ); // error type - } - - /** - * @brief Converts internal data structure to a mainline memory read - * address. - * @return A uint64_t version of the address. - * @note Does not include error type. This is because in most cases we - * will use this function to write out to hardware and in doing so - * we will want to clear the status bits anyway. - */ - uint64_t toReadAddr() const - { - return ( ((uint64_t) iv_rank.getMaster() << 60) | - ((uint64_t) iv_rank.getSlave() << 57) | - ((uint64_t) iv_bankRowCol.bank << 53) | - ((uint64_t)(iv_bankRowCol.row & 0x1ffff) << 36) | // r16-r0 - ((uint64_t) iv_bankRowCol.col << 24) | - ((uint64_t)(iv_bankRowCol.row & 0x20000) << 5) ); // r17 - } - - /** - * @brief Creates a CenAddr from a maintenace start address. - * @param i_addr 64-bit address. - */ - static CenAddr fromMaintStartAddr( uint64_t i_addr ) - { - return CenAddr( - (i_addr >> 60) & 0x7, // master rank - (i_addr >> 57) & 0x7, // slave rank - (i_addr >> 53) & 0xf, // bank - ((i_addr << 13) & 0x20000) | ((i_addr >> 36) & 0x1ffff), // row - (i_addr >> 24) & 0xfff, // column - (i_addr >> 17) & 0x7f ); // error type - } - - /** - * @brief Converts internal data structure to a maintenace start address. - * @return A uint64_t version of the address. - * @note Does not include error type. This is because in most cases we - * will use this function to write out to hardware and in doing so - * we will want to clear the status bits anyway. - */ - uint64_t toMaintStartAddr() const - { - return ( ((uint64_t) iv_rank.getMaster() << 60) | - ((uint64_t) iv_rank.getSlave() << 57) | - ((uint64_t) iv_bankRowCol.bank << 53) | - ((uint64_t)(iv_bankRowCol.row & 0x1ffff) << 36) | // r16-r0 - ((uint64_t) iv_bankRowCol.col << 24) | - ((uint64_t)(iv_bankRowCol.row & 0x20000) >> 13) ); // r17 - } - - /** - * @brief Creates a CenAddr from a maintenace end address. - * @param i_addr 64-bit address. - */ - static CenAddr fromMaintEndAddr( uint64_t i_addr ) - { - return CenAddr( - (i_addr >> 60) & 0x7, // master rank - (i_addr >> 57) & 0x7, // slave rank - (i_addr >> 53) & 0xf, // bank - ((i_addr >> 6) & 0x20000) | ((i_addr >> 36) & 0x1ffff), // row - (i_addr >> 24) & 0xfff ); // column - } - - /** - * @brief Converts internal data structure to a maintenace end address. - * @return A uint64_t version of the address. - * @note Does not include error type. This is because in most cases we - * will use this function to write out to hardware and in doing so - * we will want to clear the status bits anyway. - */ - uint64_t toMaintEndAddr() const - { - return ( ((uint64_t) iv_rank.getMaster() << 60) | - ((uint64_t) iv_rank.getSlave() << 57) | - ((uint64_t) iv_bankRowCol.bank << 53) | - ((uint64_t)(iv_bankRowCol.row & 0x1ffff) << 36) | // r16-r0 - ((uint64_t) iv_bankRowCol.col << 24) | - ((uint64_t)(iv_bankRowCol.row & 0x20000) << 6) ); // r17 - } - - /** @return This address's rank. */ - const CenRank& getRank() const { return iv_rank; }; - - /** @return This address's bank. */ - uint32_t getBank() const { return iv_bankRowCol.bank; }; - - /** @return This address's row. */ - uint32_t getRow() const { return iv_bankRowCol.row; }; - - /** @return This address's column. */ - uint32_t getCol() const { return iv_bankRowCol.col; }; - - /** @brief '==' operator */ - bool operator==( const CenAddr & i_addr ) const - { - return ( this->getRank() == i_addr.getRank() && - this->getBank() == i_addr.getBank() && - this->getRow() == i_addr.getRow() && - this->getCol() == i_addr.getCol() ); - } - - private: // instance variable - - CenRank iv_rank; ///< Master rank (see CenRank class) - - /** The bank, row, and column. Note that these are all packed in a struct - * to save space. */ - struct __attribute__((__packed__)) - { - uint32_t bank : 4; ///< b2-b0 - uint32_t col : 12; ///< c13,c11,c9-c3 (c2-c0 are tied to 0) - uint32_t row : 18; ///< r17-r0 - } iv_bankRowCol; - - /** An OR of all error types assoiated with this address (see enum - * ErrorType). */ - uint32_t iv_types; - -}; - -//------------------------------------------------------------------------------ -// MBS Address Registers -//------------------------------------------------------------------------------ - -typedef const char * const CenReadAddrReg; - -extern CenReadAddrReg READ_NCE_ADDR; ///< For the MBNCER register -extern CenReadAddrReg READ_RCE_ADDR; ///< For the MBRCER register -extern CenReadAddrReg READ_MPE_ADDR; ///< For the MBMPER register -extern CenReadAddrReg READ_UE_ADDR; ///< For the MBUER register - -/** - * @brief Reads the specified mainline memory read address from hardware. - * @param i_membChip A Centaur chip. - * @param i_mbaPos The target MBA position. - * @param i_addrReg The target address register. - * @param o_addr The returned address from hardware. - * @return Non-SUCCESS if an internal function fails, SUCCESS otherwise. - */ -int32_t getCenReadAddr( ExtensibleChip * i_membChip, uint32_t i_mbaPos, - CenReadAddrReg i_addrReg, CenAddr & o_addr ); - -/** - * @brief Writes the specified mainline memory read address to hardware. - * @param i_membChip A Centaur chip. - * @param i_mbaPos The target MBA position. - * @param i_addrReg The target address register. - * @param i_addr The address to write to hardware. - * @return Non-SUCCESS if an internal function fails, SUCCESS otherwise. - */ -int32_t setCenReadAddr( ExtensibleChip * i_membChip, uint32_t i_mbaPos, - CenReadAddrReg i_addrReg, const CenAddr & i_addr ); - -//------------------------------------------------------------------------------ -// MBA Address Registers -//------------------------------------------------------------------------------ - -/** - * @brief Reads the maintenance start address from hardware. - * @param i_mbaChip An MBA chip. - * @param o_addr The returned address from hardware. - * @return Non-SUCCESS if an internal function fails, SUCCESS otherwise. - */ -int32_t getCenMaintStartAddr( ExtensibleChip * i_mbaChip, CenAddr & o_addr ); - -/** - * @brief Writes the maintenance start address to hardware. - * @param i_mbaChip An MBA chip. - * @param i_addr The address to write to hardware. - * @return Non-SUCCESS if an internal function fails, SUCCESS otherwise. - */ -int32_t setCenMaintStartAddr( ExtensibleChip * i_mbaChip, - const CenAddr & i_addr ); - -/** - * @brief Reads the maintenance end address from hardware. - * @param i_mbaChip An MBA chip. - * @param o_addr The returned address from hardware. - * @return Non-SUCCESS if an internal function fails, SUCCESS otherwise. - */ -int32_t getCenMaintEndAddr( ExtensibleChip * i_mbaChip, CenAddr & o_addr ); - -/** - * @brief Writes the maintenance end address to hardware. - * @param i_mbaChip An MBA chip. - * @param i_addr The address to write to hardware. - * @return Non-SUCCESS if an internal function fails, SUCCESS otherwise. - */ -int32_t setCenMaintEndAddr( ExtensibleChip * i_mbaChip, - const CenAddr & i_addr ); - -} // end namespace PRDF - -#endif // __prdfCenAddress_H - -- cgit v1.2.1