From 3b5bb9f2e7467bde7c5f3a5c092f541a7e335dad Mon Sep 17 00:00:00 2001 From: Dan Crowell Date: Thu, 16 Jan 2020 12:55:30 -0600 Subject: Adjust idec algorithm for Explorer B.0 format The update to B.0 doesn't allow for a change to the register that previously contained the MAJOR_REVISION value. Because of that we are revising the logic that determines the EC level to be a lookup based on a single number instead. Ignore the MAJOR_RELEASE field from CHIP_INFO entirely, it will always =1. Instead we will rely only on the EFUSE bits currently designated for MINOR_RELEASE. Since we lost the ability to have a common M.m we will just use a single incrementing value to represent the ordinal revision number, regardless of major/minor, i.e. the 1st revision is 0, the 2nd is 1, the 10th is 9, etc. So that gives us these values for EFUSE_IMAGE_OUT_3[13:10] A.0 = 0 = 0x10 in Host Firmware A.1 = 1 = 0x11 in Host Firmware B.0 = 2 = 0x20 in Host Firmware B.1 = 3 = 0x21 in Host Firmware (if it were to happen) Change-Id: I878491e8e004c231ce4dcd7abe887a947c7f3dc3 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/89764 Tested-by: FSP CI Jenkins Tested-by: Jenkins Server Tested-by: PPE CI Reviewed-by: Louis Stermole Tested-by: Hostboot CI Reviewed-by: Christian R Geddes Reviewed-by: Jennifer A Stofer Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/89794 Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Reviewed-by: Daniel M Crowell --- .../include/explorer_scom_addresses_fld_fixes.H | 4 +- .../explorer/procedures/hwp/memory/exp_getidec.C | 73 +++++++++++++++------- .../procedures/hwp/memory/lib/shared/exp_consts.H | 7 ++- .../procedures/xml/error_info/exp_getidec.xml | 50 +++++++++++++++ 4 files changed, 106 insertions(+), 28 deletions(-) create mode 100644 src/import/chips/ocmb/explorer/procedures/xml/error_info/exp_getidec.xml diff --git a/src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses_fld_fixes.H b/src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses_fld_fixes.H index 87927362f..fc02d5360 100644 --- a/src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses_fld_fixes.H +++ b/src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses_fld_fixes.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2018,2019 */ +/* Contributors Listed Below - COPYRIGHT 2018,2020 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -27,8 +27,6 @@ #define __EXPLR_SCOM_ADDRESSES_FLD_FIXES_H static const uint64_t EXPLR_MIPS_TO_OCMB_INTERRUPT_REGISTER1_DOORBELL = 63; -static const uint64_t EXPLR_EFUSE_IMAGE_OUT_3_ENTERPRISE_MODE_EC_MINOR = 50; -static const uint8_t EXPLR_EFUSE_IMAGE_OUT_3_ENTERPRISE_MODE_EC_MINOR_LEN = 4; static const uint64_t EXPLR_EFUSE_IMAGE_OUT_0_ENTERPRISE_MODE_DIS = 53; static const uint64_t EXPLR_SRQ_MBA_PMU8Q_CFG_INIT_COMPLETE = 63; diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_getidec.C b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_getidec.C index e4eb162e1..a5008d62f 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_getidec.C +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_getidec.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2019 */ +/* Contributors Listed Below - COPYRIGHT 2019,2020 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -41,6 +41,7 @@ #include #include #include +#include extern "C" { @@ -57,41 +58,69 @@ extern "C" uint8_t& o_chipEc) { mss::display_git_commit_info("exp_getidec"); - uint8_t l_majorEc = 0; - uint8_t l_minorEc = 0; + uint8_t l_revision = 0; uint8_t l_location = 0; uint8_t l_chipBaseId = 0; - fapi2::buffer l_reg_buffer; + fapi2::buffer l_chip_info_buffer; + fapi2::buffer l_efuse3_buffer; + // The chipid and location come from the CHIP_INFO register FAPI_TRY(fapi2::getScom( i_target, static_cast(mss::exp::idec_consts::EXPLR_CHIP_INFO_REG), - l_reg_buffer ), + l_chip_info_buffer ), "exp_getidec: could not read explorer chip_info register register 0x%08x", mss::exp::idec_consts::EXPLR_CHIP_INFO_REG); - l_reg_buffer.extractToRight(l_majorEc); - l_reg_buffer.extractToRight(l_location); - l_reg_buffer.extractToRight(l_chipBaseId); - - // Due to design errors we must read the minor ec (2nd nibble) from a different register - FAPI_TRY(fapi2::getScom( i_target, static_cast(EXPLR_EFUSE_IMAGE_OUT_3), l_reg_buffer ), - "exp_getidec: could not read explorer efuse_out3 register 0x%08x", EXPLR_EFUSE_IMAGE_OUT_3); - - l_reg_buffer.extractToRight(l_minorEc); - - // Major EC 0:3 - // Minor EC 4:7 - o_chipEc = (l_majorEc << 4) | l_minorEc; + l_chip_info_buffer.extractToRight(l_location); + l_chip_info_buffer.extractToRight(l_chipBaseId); // Location 0:3 // Empty 4:7 // ChipId 8:15 o_chipId = (l_location << 12) | l_chipBaseId; + + // The revision/DD/EC level comes from EFUSE_IMAGE_OUT_3 + FAPI_TRY(fapi2::getScom( i_target, static_cast(EXPLR_EFUSE_IMAGE_OUT_3), l_efuse3_buffer ), + "exp_getidec: could not read explorer efuse_out3 register 0x%08x", EXPLR_EFUSE_IMAGE_OUT_3); + + l_efuse3_buffer.extractToRight(l_revision); + + // Due to limitations in what logic could be updated between revisions + // there is no explicit Major+Minor value available in the hardware. + // Instead we have to explicitly convert a rolling number into the + // standard major.minor DD value we expect. + o_chipEc = 0; + + switch( l_revision ) + { + case(0): + o_chipEc = 0x10; + break; //A.0 + + case(1): + o_chipEc = 0x11; + break; //A.1 + + case(2): + o_chipEc = 0x20; + break; //B.0 + } + + // Ensure we found a known level + FAPI_ASSERT(o_chipEc != 0, + fapi2::EXP_UNKNOWN_REVISION(). + set_TARGET(i_target). + set_REVISION(l_revision). + set_CHIP_INFO_REG(l_chip_info_buffer). + set_EFUSE_IMAGE_OUT_3(l_efuse3_buffer), + "The %s revision (%d) does not match a known DD level.", + mss::c_str(i_target), l_revision); + + FAPI_DBG("EC found 0x%.02x chipId found 0x%.04x", o_chipEc, o_chipId); fapi_try_exit: diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H index 199f5296e..9051c946a 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2018,2019 */ +/* Contributors Listed Below - COPYRIGHT 2018,2020 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -177,12 +177,13 @@ enum ecid_consts enum idec_consts { EXPLR_CHIP_INFO_REG = 0x2134, - MAJOR_EC_BIT_START = 32, - MAJOR_EC_BIT_LENGTH = 4, LOCATION_BIT_START = 44, LOCATION_BIT_LENGTH = 4, CHIPID_BIT_START = 56, CHIPID_BIT_LENGTH = 8, + + REVISION_BIT_START = 50, + REVISION_BIT_LENGTH = 4, }; diff --git a/src/import/chips/ocmb/explorer/procedures/xml/error_info/exp_getidec.xml b/src/import/chips/ocmb/explorer/procedures/xml/error_info/exp_getidec.xml new file mode 100644 index 000000000..f5060138c --- /dev/null +++ b/src/import/chips/ocmb/explorer/procedures/xml/error_info/exp_getidec.xml @@ -0,0 +1,50 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RC_EXP_UNKNOWN_REVISION + + The Explorer revision does not match a known DD level. + + TARGET + REVISION + CHIP_INFO_REG + EFUSE_IMAGE_OUT_3 + + CODE + HIGH + + + TARGET + MEDIUM + + + TARGET + + + + -- cgit v1.2.1