From 339e480ae86894bf450def09962f87e7a196f8cc Mon Sep 17 00:00:00 2001
From: Benjamin Weisenbeck <bweisenb@us.ibm.com>
Date: Thu, 17 Oct 2013 12:46:46 -0500
Subject: PRD: Cache repair updates

RTC: 22860
Change-Id: I31f78fa8c78e84e80fa9cb7a3b4dc36065be9ec9
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/6723
Tested-by: Jenkins Server
Reviewed-by: Christopher T. Phan <cphan@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Reviewed-by: Zane Shelley <zshelle@us.ibm.com>
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/7212
---
 src/usr/diag/prdf/common/plat/pegasus/Ex.rule | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/src/usr/diag/prdf/common/plat/pegasus/Ex.rule b/src/usr/diag/prdf/common/plat/pegasus/Ex.rule
index 9edd2a6ca..7ab70f3f5 100755
--- a/src/usr/diag/prdf/common/plat/pegasus/Ex.rule
+++ b/src/usr/diag/prdf/common/plat/pegasus/Ex.rule
@@ -367,6 +367,21 @@ chip Ex
         capture     type secondary;
         capture     group default;
     };
+
+    ############################################################################
+    # EX non-existent registers for capture
+    ############################################################################
+    register L2TRACE_ARRAY
+    {
+        name        "Capture Data for L2 Trace Array";
+        capture     group never;
+    };
+
+    register L3TRACE_ARRAY
+    {
+        name        "Capture Data for L3 Trace Array";
+        capture     group never;
+    };
 };
 
  ##############################################################################
-- 
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