From 16cf78fed03ff0426cd7885c935a711541f329a1 Mon Sep 17 00:00:00 2001 From: Matt Derksen Date: Fri, 15 Mar 2019 16:33:27 -0500 Subject: Add new PMIC target for Axone PMIC is a voltage regulator for the DDIMM. It supplies power to the OCMB and DIMM targets. Change-Id: I10c1b03169f53b070f521ec9cd60cdbd15c4a268 RTC:206184 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75136 Tested-by: Jenkins Server Tested-by: Jenkins OP Build CI Tested-by: FSP CI Jenkins Tested-by: Jenkins OP HW Reviewed-by: Glenn Miles Reviewed-by: Christian R. Geddes Reviewed-by: Daniel M. Crowell --- src/usr/hwas/common/hwas.C | 4 +- src/usr/i2c/i2c.C | 123 ++-- src/usr/i2c/i2cTargetPres.C | 6 + src/usr/targeting/common/entitypath.C | 4 +- .../targeting/common/xmltohb/attribute_types.xml | 6 +- .../common/xmltohb/simics_AXONE.system.xml | 728 ++++++++++++++++++++- src/usr/targeting/common/xmltohb/target_types.xml | 48 ++ 7 files changed, 864 insertions(+), 55 deletions(-) diff --git a/src/usr/hwas/common/hwas.C b/src/usr/hwas/common/hwas.C index f48b80e94..45a88cf85 100644 --- a/src/usr/hwas/common/hwas.C +++ b/src/usr/hwas/common/hwas.C @@ -640,12 +640,14 @@ errlHndl_t discoverTargets() PredicateCTM predChip(CLASS_CHIP); PredicateCTM predDimm(CLASS_LOGICAL_CARD, TYPE_DIMM); PredicateCTM predMcs(CLASS_UNIT, TYPE_MCS); + PredicateCTM predPmic(CLASS_ASIC, TYPE_PMIC); // We can ignore chips of TYPE_I2C_MUX because they // were already detected above in discoverMuxTargetsAndEnable PredicateCTM predMux(CLASS_CHIP, TYPE_I2C_MUX); PredicatePostfixExpr checkExpr; checkExpr.push(&predChip).push(&predDimm).Or().push(&predEnc).Or(). - push(&predMcs).Or().push(&predMux).Not().And(); + push(&predMcs).Or().push(&predPmic).Or(). + push(&predMux).Not().And(); TargetHandleList pCheckPres; targetService().getAssociated( pCheckPres, pSys, diff --git a/src/usr/i2c/i2c.C b/src/usr/i2c/i2c.C index ff8629010..63b579202 100755 --- a/src/usr/i2c/i2c.C +++ b/src/usr/i2c/i2c.C @@ -1134,7 +1134,8 @@ void i2cSetSwitches( TARGETING::Target * i_target, // i2cGetI2cMuxTarget // ------------------------------------------------------------------ errlHndl_t i2cGetI2cMuxTarget ( const TARGETING::EntityPath & i_i2cMuxPath, - TARGETING::Target * &o_target ) + TARGETING::Target * &o_target, + bool i_noError ) { errlHndl_t l_err(nullptr); @@ -1155,34 +1156,37 @@ errlHndl_t i2cGetI2cMuxTarget ( const TARGETING::EntityPath & i_i2cMuxPath, if ( nullptr == o_target ) { - TRACFCOMP( g_trac_i2c, - ERR_MRK "i2cGetI2cMuxTarget() - I2C MUX Entity Path (%s)" - " could not be converted to a target.", - l_muxPath ); + if (!i_noError) + { + TRACFCOMP( g_trac_i2c, + ERR_MRK "i2cGetI2cMuxTarget() - I2C MUX Entity Path (%s)" + " could not be converted to a target.", + l_muxPath ); - /*@ - * @errortype - * @reasoncode I2C_MUX_TARGET_NOT_FOUND - * @severity ERRORLOG::ERRL_SEV_UNRECOVERABLE - * @moduleid I2C_ACCESS_MUX - * @devdesc I2C mux path target is null - * @custdesc Unexpected boot firmware error - */ - l_err = new ERRORLOG::ErrlEntry( - ERRORLOG::ERRL_SEV_UNRECOVERABLE, - I2C_ACCESS_MUX, - I2C_MUX_TARGET_NOT_FOUND, - 0, - 0, - ERRORLOG::ErrlEntry::ADD_SW_CALLOUT ); + /*@ + * @errortype + * @reasoncode I2C_MUX_TARGET_NOT_FOUND + * @severity ERRORLOG::ERRL_SEV_UNRECOVERABLE + * @moduleid I2C_ACCESS_MUX + * @devdesc I2C mux path target is null + * @custdesc Unexpected boot firmware error + */ + l_err = new ERRORLOG::ErrlEntry( + ERRORLOG::ERRL_SEV_UNRECOVERABLE, + I2C_ACCESS_MUX, + I2C_MUX_TARGET_NOT_FOUND, + 0, + 0, + ERRORLOG::ErrlEntry::ADD_SW_CALLOUT ); - // Collect the MUX entity path info - ERRORLOG::ErrlUserDetailsString(l_muxPath).addToLog(l_err); + // Collect the MUX entity path info + ERRORLOG::ErrlUserDetailsString(l_muxPath).addToLog(l_err); - l_err->collectTrace( I2C_COMP_NAME, 256); + l_err->collectTrace( I2C_COMP_NAME, 256); - break; + break; + } } // Is the target functional @@ -1192,31 +1196,34 @@ errlHndl_t i2cGetI2cMuxTarget ( const TARGETING::EntityPath & i_i2cMuxPath, !l_hwasState.present || !l_hwasState.functional ) { - TRACFCOMP( g_trac_i2c, - ERR_MRK "i2cGetI2cMuxTarget() - I2C MUX target (0x%X) " - "is non functional.", - TARGETING::get_huid(o_target) ); - /*@ - * @errortype - * @reasoncode I2C_MUX_TARGET_NON_FUNCTIONAL - * @severity ERRORLOG::ERRL_SEV_UNRECOVERABLE - * @moduleid I2C_ACCESS_MUX - * @userdata1 I2C MUX Target Huid - * @devdesc I2C mux path target is not functional - * @custdesc Unexpected boot firmware error - */ - l_err = new ERRORLOG::ErrlEntry( - ERRORLOG::ERRL_SEV_UNRECOVERABLE, - I2C_ACCESS_MUX, - I2C_MUX_TARGET_NON_FUNCTIONAL, - TARGETING::get_huid(o_target), - 0, - ERRORLOG::ErrlEntry::ADD_SW_CALLOUT ); - - // Collect the MUX entity path info - ERRORLOG::ErrlUserDetailsString(l_muxPath).addToLog(l_err); - - l_err->collectTrace( I2C_COMP_NAME, 256); + if (!i_noError) + { + TRACFCOMP( g_trac_i2c, + ERR_MRK "i2cGetI2cMuxTarget() - I2C MUX target (0x%X) " + "is non functional.", + TARGETING::get_huid(o_target) ); + /*@ + * @errortype + * @reasoncode I2C_MUX_TARGET_NON_FUNCTIONAL + * @severity ERRORLOG::ERRL_SEV_UNRECOVERABLE + * @moduleid I2C_ACCESS_MUX + * @userdata1 I2C MUX Target Huid + * @devdesc I2C mux path target is not functional + * @custdesc Unexpected boot firmware error + */ + l_err = new ERRORLOG::ErrlEntry( + ERRORLOG::ERRL_SEV_UNRECOVERABLE, + I2C_ACCESS_MUX, + I2C_MUX_TARGET_NON_FUNCTIONAL, + TARGETING::get_huid(o_target), + 0, + ERRORLOG::ErrlEntry::ADD_SW_CALLOUT ); + + // Collect the MUX entity path info + ERRORLOG::ErrlUserDetailsString(l_muxPath).addToLog(l_err); + + l_err->collectTrace( I2C_COMP_NAME, 256); + } // Don't return a non functional target o_target = nullptr; @@ -1264,7 +1271,7 @@ errlHndl_t i2cAccessMux( TARGETING::Target* i_masterTarget, TARGETING::TargetHandle_t l_i2cMuxTarget(nullptr); l_err = i2cGetI2cMuxTarget( i_i2cMuxPath, - l_i2cMuxTarget); + l_i2cMuxTarget, false); // If an issue getting the MUX target, then return error if (l_err) @@ -2278,6 +2285,22 @@ bool i2cPresence( TARGETING::Target * i_target, // Set the MUX selector (if there is one) for the MUX before continuing if (I2C_MUX::NOT_APPLICABLE != i_i2cMuxBusSelector) { + // Check that Mux exists first + TARGETING::TargetHandle_t l_i2cMuxTarget(nullptr); + + bool noError = true; // just return nullptr target if mux doesn't exist + err = i2cGetI2cMuxTarget( i_i2cMuxPath, + l_i2cMuxTarget, + noError ); + if (err || (l_i2cMuxTarget == nullptr)) + { + // exit early if mux does not exist + TRACFCOMP(g_trac_i2c, + ERR_MRK"i2cPresence() - XML appears to be wrong since " + "i2cMuxSelector 0x%02X != NOT_APPLICABLE for non-existent " + "I2C MUX target", i_i2cMuxBusSelector); + break; + } err = i2cAccessMux(i_target, i_i2cMuxBusSelector, i_i2cMuxPath ); if ( err ) diff --git a/src/usr/i2c/i2cTargetPres.C b/src/usr/i2c/i2cTargetPres.C index 5e7fb5d3b..c3809f099 100644 --- a/src/usr/i2c/i2cTargetPres.C +++ b/src/usr/i2c/i2cTargetPres.C @@ -295,4 +295,10 @@ DEVICE_REGISTER_ROUTE( DeviceFW::READ, TARGETING::TYPE_I2C_MUX, basicI2CPresencePerformOp ); +// Register the pmic vrm presence detect function with the device framework +DEVICE_REGISTER_ROUTE( DeviceFW::READ, + DeviceFW::PRESENT, + TARGETING::TYPE_PMIC, + basicI2CPresencePerformOp ); + } diff --git a/src/usr/targeting/common/entitypath.C b/src/usr/targeting/common/entitypath.C index ed81d1b4a..e7a13b81e 100644 --- a/src/usr/targeting/common/entitypath.C +++ b/src/usr/targeting/common/entitypath.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2012,2018 */ +/* Contributors Listed Below - COPYRIGHT 2012,2019 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -489,6 +489,8 @@ const char* EntityPath::pathElementTypeAsString( // return "CFAM"; // case TYPE_ENGINE: // return "Engine"; + case TYPE_PMIC: + return "PMIC"; default: return "Unknown path type"; } diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml index d8df2230d..385644611 100644 --- a/src/usr/targeting/common/xmltohb/attribute_types.xml +++ b/src/usr/targeting/common/xmltohb/attribute_types.xml @@ -8146,9 +8146,13 @@ 77 - LAST_IN_RANGE + PMIC 78 + + LAST_IN_RANGE + 79 + TYPE diff --git a/src/usr/targeting/common/xmltohb/simics_AXONE.system.xml b/src/usr/targeting/common/xmltohb/simics_AXONE.system.xml index a5c60f943..157582ce6 100644 --- a/src/usr/targeting/common/xmltohb/simics_AXONE.system.xml +++ b/src/usr/targeting/common/xmltohb/simics_AXONE.system.xml @@ -43,6 +43,7 @@ * Each OMI unit connects to 1 OCMB chip * Each OCMB unit contains 1 MEM_PORT unit * Each MEM_PORT unit connects to 2 DIMMS (Only 1 dimm per mem_port in this XML) + * Each OCMB chip and its DIMMS are powered by 2 PMIC units * Each MC unit has 3 OMIC units (a total of 12 per chip) * Each OMIC unit contains 2 or 3 OMI Units (OMIC0/1/3/4 contain 3 and OMIC2/5 contain 2 for a total of 16 per chip) * OMI Units are special as they have two parents (OMIC + MCC (described above)) @@ -8546,7 +8547,7 @@ - sys0node0ocmb_chip0 + sys0node0ocmb0 chip-ocmb-explorer AFFINITY_PATH @@ -8612,7 +8613,7 @@ - sys0node0ocmb_chip1 + sys0node0ocmb1 chip-ocmb-explorer AFFINITY_PATH @@ -9593,6 +9594,729 @@ + + + + + sys0node0pmic0 + pmic + + HUID + 0x00360000 + + + AFFINITY_PATH + affinity:sys-0/node-0/proc-0/mc-0/mi-0/mcc-0/omi-0/ocmb_chip-0/pmic-0 + + + FAPI_NAME + pmic:k0:n0:s0:p00 + + + FAPI_I2C_CONTROL_INFO + + i2cMasterPathphysical:sys-0/node-0/proc-0 + engine3 + port0 + devAddr0x90 + i2cMuxBusSelector0x08 + i2cMuxPathphysical:sys-0/node-0/i2c_mux-0 + + + + ORDINAL_ID + 0 + + + PHYS_PATH + physical:sys-0/node-0/pmic-0 + + + REL_POS + 0 + + + + + sys0node0pmic1 + pmic + + HUID + 0x00360001 + + + AFFINITY_PATH + affinity:sys-0/node-0/proc-0/mc-0/mi-0/mcc-0/omi-0/ocmb_chip-0/pmic-1 + + + FAPI_NAME + pmic:k0:n0:s0:p01 + + + FAPI_I2C_CONTROL_INFO + + i2cMasterPathphysical:sys-0/node-0/proc-0 + engine3 + port0 + devAddr0xC0 + i2cMuxBusSelector0x08 + i2cMuxPathphysical:sys-0/node-0/i2c_mux-0 + + + + ORDINAL_ID + 1 + + + PHYS_PATH + physical:sys-0/node-0/pmic-1 + + + REL_POS + 1 + + + + + sys0node0pmic2 + pmic + + HUID + 0x00360002 + + + AFFINITY_PATH + affinity:sys-0/node-0/proc-0/mc-0/mi-0/mcc-0/omi-1/ocmb_chip-0/pmic-0 + + + FAPI_NAME + pmic:k0:n0:s0:p02 + + + FAPI_I2C_CONTROL_INFO + + i2cMasterPathphysical:sys-0/node-0/proc-0 + engine3 + port0 + devAddr0x90 + i2cMuxBusSelector0x09 + i2cMuxPathphysical:sys-0/node-0/i2c_mux-0 + + + + ORDINAL_ID + 2 + + + PHYS_PATH + physical:sys-0/node-0/pmic-2 + + + REL_POS + 0 + + + + + sys0node0pmic3 + pmic + + HUID + 0x00360003 + + + AFFINITY_PATH + affinity:sys-0/node-0/proc-0/mc-0/mi-0/mcc-0/omi-1/ocmb_chip-0/pmic-1 + + + FAPI_NAME + pmic:k0:n0:s0:p03 + + + FAPI_I2C_CONTROL_INFO + + i2cMasterPathphysical:sys-0/node-0/proc-0 + engine3 + port0 + devAddr0xC0 + i2cMuxBusSelector0x09 + i2cMuxPathphysical:sys-0/node-0/i2c_mux-0 + + + + ORDINAL_ID + 3 + + + PHYS_PATH + physical:sys-0/node-0/pmic-3 + + + REL_POS + 1 + + + + + sys0node0pmic4 + pmic + + HUID + 0x00360004 + + + AFFINITY_PATH + affinity:sys-0/node-0/proc-0/mc-0/mi-0/mcc-1/omi-0/ocmb_chip-0/pmic-0 + + + FAPI_NAME + pmic:k0:n0:s0:p04 + + + FAPI_I2C_CONTROL_INFO + + i2cMasterPathphysical:sys-0/node-0/proc-0 + engine3 + port0 + devAddr0x90 + i2cMuxBusSelector0x0A + i2cMuxPathphysical:sys-0/node-0/i2c_mux-0 + + + + ORDINAL_ID + 4 + + + PHYS_PATH + physical:sys-0/node-0/pmic-4 + + + REL_POS + 0 + + + + + sys0node0pmic5 + pmic + + HUID + 0x00360005 + + + AFFINITY_PATH + affinity:sys-0/node-0/proc-0/mc-0/mi-0/mcc-1/omi-0/ocmb_chip-0/pmic-1 + + + FAPI_NAME + pmic:k0:n0:s0:p05 + + + FAPI_I2C_CONTROL_INFO + + i2cMasterPathphysical:sys-0/node-0/proc-0 + engine3 + port0 + devAddr0xC0 + i2cMuxBusSelector0x0A + i2cMuxPathphysical:sys-0/node-0/i2c_mux-0 + + + + ORDINAL_ID + 5 + + + PHYS_PATH + physical:sys-0/node-0/pmic-5 + + + REL_POS + 1 + + + + + sys0node0pmic6 + pmic + + HUID + 0x00360006 + + + AFFINITY_PATH + affinity:sys-0/node-0/proc-0/mc-0/mi-0/mcc-1/omi-1/ocmb_chip-0/pmic-0 + + + FAPI_NAME + pmic:k0:n0:s0:p06 + + + FAPI_I2C_CONTROL_INFO + + i2cMasterPathphysical:sys-0/node-0/proc-0 + engine3 + port0 + devAddr0x90 + i2cMuxBusSelector0x0B + i2cMuxPathphysical:sys-0/node-0/i2c_mux-0 + + + + ORDINAL_ID + 6 + + + PHYS_PATH + physical:sys-0/node-0/pmic-6 + + + REL_POS + 0 + + + + + sys0node0pmic7 + pmic + + HUID + 0x00360007 + + + AFFINITY_PATH + affinity:sys-0/node-0/proc-0/mc-0/mi-0/mcc-1/omi-1/ocmb_chip-0/pmic-1 + + + FAPI_NAME + pmic:k0:n0:s0:p07 + + + FAPI_I2C_CONTROL_INFO + + i2cMasterPathphysical:sys-0/node-0/proc-0 + engine3 + port0 + devAddr0xC0 + i2cMuxBusSelector0x0B + i2cMuxPathphysical:sys-0/node-0/i2c_mux-0 + + + + ORDINAL_ID + 7 + + + PHYS_PATH + physical:sys-0/node-0/pmic-7 + + + REL_POS + 1 + + + + + sys0node0pmic8 + pmic + + HUID + 0x00360008 + + + AFFINITY_PATH + affinity:sys-0/node-0/proc-0/mc-0/mi-1/mcc-0/omi-0/ocmb_chip-0/pmic-0 + + + FAPI_NAME + pmic:k0:n0:s0:p08 + + + FAPI_I2C_CONTROL_INFO + + i2cMasterPathphysical:sys-0/node-0/proc-0 + engine3 + port0 + devAddr0x90 + i2cMuxBusSelector0x0C + i2cMuxPathphysical:sys-0/node-0/i2c_mux-0 + + + + ORDINAL_ID + 8 + + + PHYS_PATH + physical:sys-0/node-0/pmic-8 + + + REL_POS + 0 + + + + + sys0node0pmic9 + pmic + + HUID + 0x00360009 + + + AFFINITY_PATH + affinity:sys-0/node-0/proc-0/mc-0/mi-1/mcc-0/omi-0/ocmb_chip-0/pmic-1 + + + FAPI_NAME + pmic:k0:n0:s0:p09 + + + FAPI_I2C_CONTROL_INFO + + i2cMasterPathphysical:sys-0/node-0/proc-0 + engine3 + port0 + devAddr0xC0 + i2cMuxBusSelector0x0C + i2cMuxPathphysical:sys-0/node-0/i2c_mux-0 + + + + ORDINAL_ID + 9 + + + PHYS_PATH + physical:sys-0/node-0/pmic-9 + + + REL_POS + 1 + + + + + sys0node0pmic10 + pmic + + HUID + 0x0036000A + + + AFFINITY_PATH + affinity:sys-0/node-0/proc-0/mc-0/mi-1/mcc-0/omi-1/ocmb_chip-0/pmic-0 + + + FAPI_NAME + pmic:k0:n0:s0:p10 + + + FAPI_I2C_CONTROL_INFO + + i2cMasterPathphysical:sys-0/node-0/proc-0 + engine3 + port0 + devAddr0x90 + i2cMuxBusSelector0x0D + i2cMuxPathphysical:sys-0/node-0/i2c_mux-0 + + + + ORDINAL_ID + 10 + + + PHYS_PATH + physical:sys-0/node-0/pmic-0 + + + REL_POS + 0 + + + + + sys0node0pmic11 + pmic + + HUID + 0x0036000B + + + AFFINITY_PATH + affinity:sys-0/node-0/proc-0/mc-0/mi-1/mcc-0/omi-1/ocmb_chip-0/pmic-1 + + + FAPI_NAME + pmic:k0:n0:s0:p11 + + + FAPI_I2C_CONTROL_INFO + + i2cMasterPathphysical:sys-0/node-0/proc-0 + engine3 + port0 + devAddr0xC0 + i2cMuxBusSelector0x0D + i2cMuxPathphysical:sys-0/node-0/i2c_mux-0 + + + + ORDINAL_ID + 11 + + + PHYS_PATH + physical:sys-0/node-0/pmic-1 + + + REL_POS + 1 + + + + + sys0node0pmic12 + pmic + + HUID + 0x0036000C + + + AFFINITY_PATH + affinity:sys-0/node-0/proc-0/mc-0/mi-1/mcc-1/omi-0/ocmb_chip-0/pmic-0 + + + FAPI_NAME + pmic:k0:n0:s0:p12 + + + FAPI_I2C_CONTROL_INFO + + i2cMasterPathphysical:sys-0/node-0/proc-0 + engine3 + port0 + devAddr0x90 + i2cMuxBusSelector0x0E + i2cMuxPathphysical:sys-0/node-0/i2c_mux-0 + + + + ORDINAL_ID + 12 + + + PHYS_PATH + physical:sys-0/node-0/pmic-0 + + + REL_POS + 0 + + + + + sys0node0pmic13 + pmic + + HUID + 0x0036000D + + + AFFINITY_PATH + affinity:sys-0/node-0/proc-0/mc-0/mi-1/mcc-1/omi-0/ocmb_chip-0/pmic-1 + + + FAPI_NAME + pmic:k0:n0:s0:p13 + + + FAPI_I2C_CONTROL_INFO + + i2cMasterPathphysical:sys-0/node-0/proc-0 + engine3 + port0 + devAddr0xC0 + i2cMuxBusSelector0x0E + i2cMuxPathphysical:sys-0/node-0/i2c_mux-0 + + + + ORDINAL_ID + 13 + + + PHYS_PATH + physical:sys-0/node-0/pmic-1 + + + REL_POS + 1 + + + + + sys0node0pmic14 + pmic + + HUID + 0x0036000E + + + AFFINITY_PATH + affinity:sys-0/node-0/proc-0/mc-0/mi-1/mcc-1/omi-1/ocmb_chip-0/pmic-0 + + + FAPI_NAME + pmic:k0:n0:s0:p14 + + + FAPI_I2C_CONTROL_INFO + + i2cMasterPathphysical:sys-0/node-0/proc-0 + engine3 + port0 + devAddr0x90 + i2cMuxBusSelector0x0F + i2cMuxPathphysical:sys-0/node-0/i2c_mux-0 + + + + ORDINAL_ID + 14 + + + PHYS_PATH + physical:sys-0/node-0/pmic-0 + + + REL_POS + 0 + + + + + sys0node0pmic15 + pmic + + HUID + 0x0036000F + + + AFFINITY_PATH + affinity:sys-0/node-0/proc-0/mc-0/mi-1/mcc-1/omi-1/ocmb_chip-0/pmic-1 + + + FAPI_NAME + pmic:k0:n0:s0:p15 + + + FAPI_I2C_CONTROL_INFO + + i2cMasterPathphysical:sys-0/node-0/proc-0 + engine3 + port0 + devAddr0xC0 + i2cMuxBusSelector0x0F + i2cMuxPathphysical:sys-0/node-0/i2c_mux-0 + + + + ORDINAL_ID + 15 + + + PHYS_PATH + physical:sys-0/node-0/pmic-1 + + + REL_POS + 1 + + + + + sys0node0pmic16 + pmic + + HUID + 0x00360010 + + + AFFINITY_PATH + affinity:sys-0/node-0/proc-0/mc-1/mi-0/mcc-0/omi-0/ocmb_chip-0/pmic-0 + + + FAPI_NAME + pmic:k0:n0:s0:p16 + + + FAPI_I2C_CONTROL_INFO + + i2cMasterPathphysical:sys-0/node-0/proc-0 + engine3 + port1 + devAddr0x90 + i2cMuxBusSelector0xFF + i2cMuxPathphysical:sys-0 + + + + ORDINAL_ID + 16 + + + PHYS_PATH + physical:sys-0/node-0/pmic-0 + + + REL_POS + 0 + + + + + sys0node0pmic17 + pmic + + HUID + 0x00360011 + + + AFFINITY_PATH + affinity:sys-0/node-0/proc-0/mc-1/mi-0/mcc-0/omi-0/ocmb_chip-0/pmic-1 + + + FAPI_NAME + pmic:k0:n0:s0:p17 + + + FAPI_I2C_CONTROL_INFO + + i2cMasterPathphysical:sys-0/node-0/proc-0 + engine3 + port1 + devAddr0xC0 + i2cMuxBusSelector0xFF + i2cMuxPathphysical:sys-0 + + + + ORDINAL_ID + 17 + + + PHYS_PATH + physical:sys-0/node-0/pmic-1 + + + REL_POS + 1 + + + diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml index 1c5f51f0b..421288d40 100644 --- a/src/usr/targeting/common/xmltohb/target_types.xml +++ b/src/usr/targeting/common/xmltohb/target_types.xml @@ -961,6 +961,14 @@ + + + chip-vreg-generic + pmic + + enc-node-power9 base @@ -1352,6 +1360,46 @@ + + pmic + asic + + 1 + DECONFIG_GARDABLE + + + FAPI_I2C_CONTROL_INFO + + + HWAS_STATE_CHANGED_SUBSCRIPTION_MASK + 0x00000031 + + + + + childRollupAllowed + 0 + + + deconfigureParent + 1 + + + valid + 1 + + + PARENT_DECONFIG_RULES + + + REL_POS + + + TYPE + PMIC + + + power-supply unit -- cgit v1.2.1