From 102eab796fbfb6b72d90bcfc4496088066a78575 Mon Sep 17 00:00:00 2001 From: Joe McGill Date: Thu, 15 Dec 2016 00:12:48 -0600 Subject: Add MSS customization support from CRP0 Lx MVPD Keyword V0 offsets are the same as V1 Move bad-bits error processing to 1.03 Change-Id: I01e44c83f775b77e4ecc7afd7a5d92db524dfc98 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34073 Dev-Ready: Joseph J. McGill Tested-by: Jenkins Server Tested-by: PPE CI Reviewed-by: Martin Gloff Reviewed-by: Daniel M. Crowell Tested-by: Hostboot CI Reviewed-by: Matt K. Light Reviewed-by: Jennifer A. Stofer Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34135 Reviewed-by: Hostboot Team Tested-by: FSP CI Jenkins --- .../p9/procedures/hwp/memory/lib/fir/unmask.C | 4 +- .../chips/p9/procedures/hwp/memory/lib/mc/port.C | 5 +- .../chips/p9/procedures/hwp/memory/lib/mc/port.H | 31 ++ .../hwp/memory/lib/mss_attribute_accessors.H | 154 ++++++- .../memory/lib/mss_attribute_accessors_manual.H | 52 +-- .../procedures/hwp/memory/lib/shared/mss_const.H | 4 +- .../hwp/memory/lib/workarounds/dp16_workarounds.C | 16 +- .../hwp/memory/lib/workarounds/dp16_workarounds.H | 53 +-- .../p9/procedures/hwp/memory/p9_mss_attr_update.C | 506 ++++++++++++++++++++- .../p9/procedures/hwp/memory/p9_mss_attr_update.H | 22 +- .../p9/procedures/hwp/memory/p9_mss_attr_update.mk | 5 +- .../p9/procedures/hwp/memory/p9_mss_draminit_mc.C | 6 +- .../chips/p9/procedures/hwp/perv/p9_getecid.C | 14 +- .../chips/p9/procedures/hwp/perv/p9_getecid.H | 4 +- .../xml/attribute_info/chip_ec_attributes.xml | 36 +- .../xml/attribute_info/memory_mcs_attributes.xml | 18 +- .../memory_workarounds_attributes.xml | 26 +- .../xml/error_info/p9_mss_attr_update_errors.xml | 48 ++ src/import/hwpf/fapi2/include/mvpd_access_defs.H | 10 +- src/usr/fapi2/plat_mvpd_access.C | 10 +- .../targeting/common/xmltohb/attribute_types.xml | 22 + src/usr/targeting/common/xmltohb/target_types.xml | 5 +- 22 files changed, 840 insertions(+), 211 deletions(-) create mode 100644 src/import/chips/p9/procedures/xml/error_info/p9_mss_attr_update_errors.xml diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/fir/unmask.C b/src/import/chips/p9/procedures/hwp/memory/lib/fir/unmask.C index f03e65e37..7ba8663c1 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/fir/unmask.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/fir/unmask.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016 */ +/* Contributors Listed Below - COPYRIGHT 2016,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -173,7 +173,7 @@ fapi2::ReturnCode after_scominit( const fapi2::Target& i_tar // to Nimbus. If they can be generic,this whole thing can go back in the H file and the specifics // of the registers and bits can be handled generically. - for (const auto& p : mss::find_targets(i_target)) + for (const auto& p : mss::find_targets_with_magic(i_target)) { fir::reg l_mca_fir_reg(p, l_rc); FAPI_TRY(l_rc, "unable to create fir::reg for %d", MCA_IOM_PHY0_DDRPHY_FIR_REG); diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mc/port.C b/src/import/chips/p9/procedures/hwp/memory/lib/mc/port.C index 1ee2353bb..907655022 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/mc/port.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/mc/port.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016 */ +/* Contributors Listed Below - COPYRIGHT 2016,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -93,11 +93,14 @@ fapi2::ReturnCode enable_periodic_cal( const fapi2::Target #include +#include #include #include @@ -507,5 +508,35 @@ fapi_try_exit: return fapi2::current_err; } +/// +/// @brief Apply mark store bits from module VPD +/// @tparam T, the fapi2 target type of the target +/// @tparam TT, the class traits for the port +/// @param[in] i_target A target representing a port +/// @return FAPI2_RC_SUCCESS if and only if ok +/// +template< fapi2::TargetType T, typename TT = portTraits > +fapi2::ReturnCode apply_mark_store( const fapi2::Target& i_target ) +{ + FAPI_INF("Enable marks from MVPD"); + + uint32_t l_fwms[MARK_STORE_COUNT]; + + FAPI_TRY( mss::mvpd_fwms(i_target, &(l_fwms[0])) ); + + for (size_t l_mark = 0; l_mark < MARK_STORE_COUNT; ++l_mark) + { + if (l_fwms[l_mark] != 0) + { + fapi2::buffer l_fwms_data; + l_fwms_data.insertFromRight < MCA_FWMS0_MARK, MCA_FWMS0_EXIT_1 - MCA_FWMS0_MARK + 1 > (l_fwms[l_mark]); + FAPI_TRY( mss::putScom(i_target, MCA_FWMS0 + l_mark, l_fwms_data) ); + } + } + +fapi_try_exit: + return fapi2::current_err; +} + } #endif diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H index 10908f668..73ae873ae 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H @@ -10380,21 +10380,77 @@ fapi_try_exit: /// /// @brief ATTR_MSS_VREF_DAC_NIBBLE getter -/// @param[out] uint8_t& reference to store the value -/// @note Generated by gen_accessors.pl generateParameters (SYSTEM) +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint8_t +/// @note Generated by gen_accessors.pl generateParameters (D) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK /// @note Value for VREF DAC -/// nibbles +/// nibble /// -inline fapi2::ReturnCode vref_dac_nibble(uint8_t& o_value) +inline fapi2::ReturnCode vref_dac_nibble(const fapi2::Target& i_target, uint8_t& o_value) { + uint8_t l_value[2]; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_VREF_DAC_NIBBLE, fapi2::Target(), o_value) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_VREF_DAC_NIBBLE, i_target.getParent(), l_value) ); + o_value = l_value[mss::index(i_target)]; return fapi2::current_err; fapi_try_exit: - FAPI_ERR("failed accessing ATTR_MSS_VREF_DAC_NIBBLE: 0x%lx (system target)", - uint64_t(fapi2::current_err)); + FAPI_ERR("failed accessing ATTR_MSS_VREF_DAC_NIBBLE: 0x%lx (target: %s)", + uint64_t(fapi2::current_err), mss::c_str(i_target)); + return fapi2::current_err; +} + +/// +/// @brief ATTR_MSS_VREF_DAC_NIBBLE getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint8_t +/// @note Generated by gen_accessors.pl generateParameters (D.1) +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note Value for VREF DAC +/// nibble +/// +inline fapi2::ReturnCode vref_dac_nibble(const fapi2::Target& i_target, uint8_t& o_value) +{ + uint8_t l_value[2]; + auto l_mca = i_target.getParent(); + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_VREF_DAC_NIBBLE, l_mca.getParent(), l_value) ); + o_value = l_value[mss::index(l_mca)]; + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed accessing ATTR_MSS_VREF_DAC_NIBBLE: 0x%lx (target: %s)", + uint64_t(fapi2::current_err), mss::c_str(i_target)); + return fapi2::current_err; +} + +/// +/// @brief ATTR_MSS_VREF_DAC_NIBBLE getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] uint8_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (E) +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note Value for VREF DAC +/// nibble +/// +inline fapi2::ReturnCode vref_dac_nibble(const fapi2::Target& i_target, uint8_t* o_array) +{ + if (o_array == nullptr) + { + FAPI_ERR("nullptr passed to attribute accessor %s", __func__); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + } + + uint8_t l_value[2]; + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_VREF_DAC_NIBBLE, i_target, l_value) ); + memcpy(o_array, &l_value, 2); + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed accessing ATTR_MSS_VREF_DAC_NIBBLE: 0x%lx (target: %s)", + uint64_t(fapi2::current_err), mss::c_str(i_target)); return fapi2::current_err; } @@ -16813,6 +16869,90 @@ fapi_try_exit: return fapi2::current_err; } +/// +/// @brief ATTR_MSS_MVPD_FWMS getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint32_t +/// @note Generated by gen_accessors.pl generateParameters (F) +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note Mark store records from MPVD Lx +/// keyword +/// +inline fapi2::ReturnCode mvpd_fwms(const fapi2::Target& i_target, uint32_t& o_value) +{ + uint32_t l_value[2][8]; + auto l_mca = i_target.getParent(); + auto l_mcs = l_mca.getParent(); + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_MVPD_FWMS, l_mcs, l_value) ); + o_value = l_value[mss::index(l_mca)][mss::index(i_target)]; + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed accessing ATTR_MSS_MVPD_FWMS: 0x%lx (target: %s)", + uint64_t(fapi2::current_err), mss::c_str(i_target)); + return fapi2::current_err; +} + +/// +/// @brief ATTR_MSS_MVPD_FWMS getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] uint32_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (G) +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note Mark store records from MPVD Lx +/// keyword +/// +inline fapi2::ReturnCode mvpd_fwms(const fapi2::Target& i_target, uint32_t* o_array) +{ + if (o_array == nullptr) + { + FAPI_ERR("nullptr passed to attribute accessor %s", __func__); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + } + + uint32_t l_value[2][8]; + auto l_mcs = i_target.getParent(); + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_MVPD_FWMS, l_mcs, l_value) ); + memcpy(o_array, &(l_value[mss::index(i_target)][0]), 32); + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed accessing ATTR_MSS_MVPD_FWMS: 0x%lx (target: %s)", + uint64_t(fapi2::current_err), mss::c_str(i_target)); + return fapi2::current_err; +} + +/// +/// @brief ATTR_MSS_MVPD_FWMS getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] uint32_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (H) +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note Mark store records from MPVD Lx +/// keyword +/// +inline fapi2::ReturnCode mvpd_fwms(const fapi2::Target& i_target, uint32_t* o_array) +{ + if (o_array == nullptr) + { + FAPI_ERR("nullptr passed to attribute accessor %s", __func__); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + } + + uint32_t l_value[2][8]; + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_MVPD_FWMS, i_target, l_value) ); + memcpy(o_array, &l_value, 64); + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed accessing ATTR_MSS_MVPD_FWMS: 0x%lx (target: %s)", + uint64_t(fapi2::current_err), mss::c_str(i_target)); + return fapi2::current_err; +} + /// /// @brief ATTR_EFF_DRAM_GEN getter diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors_manual.H b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors_manual.H index d3521a28c..7b77aa04d 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors_manual.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors_manual.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016 */ +/* Contributors Listed Below - COPYRIGHT 2016,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -173,31 +173,6 @@ fapi_try_exit: return false; } -/// -/// @brief ATTR_CHIP_EC_FEATURE_MSS_VCCD_OVERRIDE getter -/// @tparam T the fapi2 target type of the target -/// @param[in] const ref to the target -/// @return bool true iff feature is enabled -/// -template< fapi2::TargetType T > -inline bool chip_ec_feature_mss_vccd_override(const fapi2::Target& i_target) -{ - const auto l_chip = mss::find_target(i_target); - uint8_t l_value = 0; - uint8_t l_do_value = 0; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_MSS_VCCD_OVERRIDE, l_chip, l_value) ); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_DO_MSS_VCCD_OVERRIDE, l_chip, l_do_value) ); - - return (l_value != 0) && (l_do_value == fapi2::ENUM_ATTR_DO_MSS_VCCD_OVERRIDE_YES); - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_CHIP_EC_FEATURE_MSS_VCCD_OVERRIDE or ATTR_DO_MSS_VCCD_OVERRIDE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - fapi2::Assert(false); - return false; -} - /// /// @brief ATTR_CHIP_EC_FEATURE_MSS_VREF_DAC getter /// @tparam T the fapi2 target type of the target @@ -223,31 +198,6 @@ fapi_try_exit: return false; } -/// -/// @brief ATTR_CHIP_EC_FEATURE_MSS_VREG_COARSE getter -/// @tparam T the fapi2 target type of the target -/// @param[in] const ref to the target -/// @return bool true iff feature is enabled -/// -template< fapi2::TargetType T > -inline bool chip_ec_feature_mss_vreg_coarse(const fapi2::Target& i_target) -{ - const auto l_chip = mss::find_target(i_target); - uint8_t l_value = 0; - uint8_t l_do_value = 0; - - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_MSS_VREG_COARSE, l_chip, l_value) ); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_DO_MSS_VREG_COARSE, l_chip, l_do_value) ); - - return (l_value != 0) && (l_do_value == fapi2::ENUM_ATTR_DO_MSS_VREG_COARSE_YES); - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_CHIP_EC_FEATURE_MSS_VREG_COARSE or ATTR_DO_MSS_VREG_COARSE: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - fapi2::Assert(false); - return false; -} - /// /// @brief ATTR_CHIP_EC_FEATURE_MSS_WAT_DEBUG_ATTN getter /// @tparam T the fapi2 target type of the target diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H b/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H index d21083e85..908687495 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* Contributors Listed Below - COPYRIGHT 2015,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -63,6 +63,8 @@ enum sizes MAX_NUM_CAL_SLEW_RATES = 4, ///< 3V/ns, 4V/ns, 5V/ns, 6V/n MAX_DQ_BITS = 72, /// TODO RTC:157753 This is Nimbus specific. Should be attribute/trait of processor. + MARK_STORE_COUNT = 8, ///< Elements in a VPD mark/store array + BYTES_PER_GB = 1000000000, ///< Multiplier to go from GB to B T_PER_MT = 1000000, ///< Multiplier to go from MT/s to T/s CYCLES_PER_CMD = 4, ///< Best case cycles per MCBIST command diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dp16_workarounds.C b/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dp16_workarounds.C index de792ba17..90a17d239 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dp16_workarounds.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dp16_workarounds.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016 */ +/* Contributors Listed Below - COPYRIGHT 2016,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -171,20 +171,6 @@ fapi2::ReturnCode after_phy_reset( const fapi2::Target, fapi2::buffer> > l_vreg_coarse; std::vector< std::pair, fapi2::buffer> > l_vref_cntl; - // Fix up VREG Coarse - { - // Read, modify, write - FAPI_TRY( mss::scom_suckah(p, TT::DLL_VREG_COARSE_REG, l_vreg_coarse) ); - std::for_each(l_vreg_coarse.begin(), l_vreg_coarse.end(), - [&p](std::pair, fapi2::buffer >& v) - { - // Checks for EC level - v.first = mss::workarounds::dp16::vreg_coarse(p, v.first); - v.second = mss::workarounds::dp16::vreg_coarse(p, v.second); - }); - FAPI_TRY( mss::scom_blastah(p, TT::DLL_VREG_COARSE_REG, l_vreg_coarse) ); - } - // Fix up vref dac if (!is_sim) { diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dp16_workarounds.H b/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dp16_workarounds.H index cb3be6cfa..c7fc99d96 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dp16_workarounds.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dp16_workarounds.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016 */ +/* Contributors Listed Below - COPYRIGHT 2016,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -150,7 +150,7 @@ inline uint64_t vref_dac( const fapi2::Target& i_target, // We have an attribute for VREF DAC nibble, if it's 0 then we'll not do anything uint8_t l_vref_dac_nibble = 0; - FAPI_TRY( mss::vref_dac_nibble(l_vref_dac_nibble) ); + FAPI_TRY( mss::vref_dac_nibble(i_target, l_vref_dac_nibble) ); // We want to set the EN_FORCE on no matter what. l_value.setBit() @@ -177,55 +177,6 @@ fapi_try_exit: return 0; } -/// -/// @brief DP16 VREG Coarse override -/// In DD1.0 Nimbus VREG Coarse work arounds are needed -/// @param[in] i_target the port target for this override -/// @param[in] i_original_value a value to which we add the workaround bits -/// @return uint64_t the original value with the bits added -/// -inline uint64_t vreg_coarse( const fapi2::Target& i_target, const uint64_t i_original_value ) -{ - -// Anuwat has asked that we don't enforce this right now. -#ifdef ANUWAT_SAYS_DONT_DO_THIS_NOW - - fapi2::buffer l_value(i_original_value); - uint8_t l_vccd_override = 0; - - // Check for whether we apply this workaround or not - if (! mss::chip_ec_feature_mss_vreg_coarse(i_target) ) - { - return i_original_value; - } - - FAPI_TRY( mss::vccd_override(l_vccd_override) ); - - if (fapi2::ENUM_ATTR_MSS_VCCD_OVERRIDE_YES == l_vccd_override) - { - l_value.insertFromRight(0b0000100); - } - - FAPI_INF("vref_coarse 0x%016lx, 0x%016lx", i_original_value, uint64_t(l_value)); - return l_value; - -fapi_try_exit: - // Probably bigger problems ... - FAPI_ERR("Unable to get vccd_override attribute"); - fapi2::Assert(false); - - // Not reached - return 0; - -#else - - return i_original_value; - -#endif - -} - /// /// @brief DP16 workarounds to be run after PHY reset /// In DD1.0 Nimbus various work arounds are needed diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_attr_update.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_attr_update.C index b1109e481..283cf49e1 100644 --- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_attr_update.C +++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_attr_update.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* Contributors Listed Below - COPYRIGHT 2015,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -27,26 +27,518 @@ /// @file p9_mss_attr_update.C /// @brief Programatic over-rides related to effective config /// -// *HWP HWP Owner: Andre Marin +// *HWP HWP Owner: Joe McGill // *HWP HWP Backup: Brian Silver // *HWP Team: Memory // *HWP Level: 2 // *HWP Consumed by: FSP:HB + +//------------------------------------------------------------------------------ +// Includes +//------------------------------------------------------------------------------ #include +#include +#include +#include #include using fapi2::TARGET_TYPE_MCS; +using fapi2::TARGET_TYPE_MCA; +using fapi2::TARGET_TYPE_PROC_CHIP; +using fapi2::TARGET_TYPE_MCBIST; using fapi2::FAPI2_RC_SUCCESS; +//------------------------------------------------------------------------------ +// Constant definitions +//------------------------------------------------------------------------------ + +// expected field size 255B +constexpr uint32_t CRP0_Lx_RECORD_SIZE_EXP = 255; + +// offset of keyword version information +constexpr uint8_t Lx_VERSION_OFFSET = 0; +constexpr uint8_t Lx_V1_VALUE = 1; +constexpr uint8_t Lx_V0_VALUE = 0; + +// Lx version 1 parsing/extraction constants +// group offsets within section +constexpr uint8_t Lx_V1_S_OFFSET_TO_G0 = 2; +constexpr uint8_t Lx_V1_S_OFFSET_TO_G1 = 34; +// data offsets within group (0) +constexpr uint8_t Lx_V1_G0_OFFSET_TO_VALID = 0; +constexpr uint8_t Lx_V1_G0_OFFSET_TO_FWMS[mss::MARK_STORE_COUNT] = { 1, 4, 7, 10, 13, 16, 19, 22 }; +constexpr uint8_t Lx_V1_G0_OFFSET_TO_VREF_DAC = 25; +constexpr uint8_t Lx_V1_G0_OFFSET_TO_VDDR_BIAS = 26; +// data offsets within group (1) +constexpr uint8_t Lx_V1_G1_OFFSET_TO_VALID = 0; +constexpr uint8_t Lx_V1_G1_OFFSET_TO_DPHY_RLO = 1; +constexpr uint8_t Lx_V1_G1_OFFSET_TO_TSYS_ADR = 2; +constexpr uint8_t Lx_V1_G1_OFFSET_TO_TSYS_DATA = 3; + +//------------------------------------------------------------------------------ +// Function definitions +//------------------------------------------------------------------------------ + /// -/// @brief Programatic over-rides related to effective config +/// @brief Given target and memory frequency, return MVPD Lx keyword and +/// offset to first byte in frequency-specific customization section +/// @param[in] i_target the port target (e.g., MCA) +/// @param[out] o_keyword Lx keyword ID for this port +/// @param[out] o_s_offset frequency-specific section byte offset +/// @return FAPI2_RC_SUCCESS iff ok +/// +fapi2::ReturnCode +p9_mss_attr_update_get_lx_offsets(const fapi2::Target& i_target, + fapi2::MvpdKeyword& o_keyword, + uint8_t& o_s_offset) +{ + FAPI_DBG("Start"); + + switch( mss::pos(i_target) ) + { + case 0: + o_keyword = fapi2::MVPD_KEYWORD_L1; + break; + + case 1: + o_keyword = fapi2::MVPD_KEYWORD_L2; + break; + + case 2: + o_keyword = fapi2::MVPD_KEYWORD_L3; + break; + + case 3: + o_keyword = fapi2::MVPD_KEYWORD_L4; + break; + + case 4: + o_keyword = fapi2::MVPD_KEYWORD_L5; + break; + + case 5: + o_keyword = fapi2::MVPD_KEYWORD_L6; + break; + + case 6: + o_keyword = fapi2::MVPD_KEYWORD_L7; + break; + + case 7: + o_keyword = fapi2::MVPD_KEYWORD_L8; + break; + + default: + // Can't actually happen and if it did it's a huge programming error elsewhere. + // We test for this in the CI tests, too, to make sure this assertion is a good one. + FAPI_ERR("Unknown port position %d in p9_mss_attr_update_get_lx_offsets", mss::pos(i_target)); + fapi2::Assert(false); + break; + }; + + uint64_t l_freq = 0; + + FAPI_TRY( mss::freq(mss::find_target(i_target), l_freq) ); + + switch (l_freq) + { + case (fapi2::ENUM_ATTR_MSS_FREQ_MT2666): + o_s_offset = Lx_V1_R_OFFSET_TO_F3S; + break; + + case (fapi2::ENUM_ATTR_MSS_FREQ_MT2400): + o_s_offset = Lx_V1_R_OFFSET_TO_F2S; + break; + + case (fapi2::ENUM_ATTR_MSS_FREQ_MT2133): + o_s_offset = Lx_V1_R_OFFSET_TO_F1S; + break; + + case (fapi2::ENUM_ATTR_MSS_FREQ_MT1866): + o_s_offset = Lx_V1_R_OFFSET_TO_F0S; + break; + + default: + // Can't actually happen and if it did it's a huge programming error elsewhere. + FAPI_ERR("Invalid MSS frequency in p9_mss_attr_update_get_lx_offsets"); + fapi2::Assert(false); + break; + } + +fapi_try_exit: + FAPI_DBG("End"); + return fapi2::current_err; +} + + +/// +/// @brief Set ATTR_MSS_MVPD_FWMS from MVPD Lx keyword +/// @param[in] i_target, the port target (e.g., MCA) +/// @param[in] i_record_data, pointer to VPD keyword data +/// @parmm[in] i_f_s_offset, byte offset to frequency-specific section +/// @return FAPI2_RC_SUCCESS iff ok +/// +fapi2::ReturnCode +p9_mss_attr_update_fwms(const fapi2::Target& i_target, + const uint8_t* i_record_data, + const uint8_t i_f_s_offset) +{ + FAPI_DBG("Start"); + + // if group is valid, update attribute value associated with this port + if (i_record_data[i_f_s_offset + + Lx_V1_S_OFFSET_TO_G0 + + Lx_V1_G0_OFFSET_TO_VALID]) + { + fapi2::ATTR_MSS_MVPD_FWMS_Type l_fwms; + const auto& l_mcs_target = mss::find_target(i_target); + const auto l_index = mss::index(i_target); + + // read current attribute value + FAPI_TRY( mss::mvpd_fwms(l_mcs_target, &(l_fwms[0][0])) ); + + // update attribute value for this port + for (size_t l_ms = 0; l_ms < mss::MARK_STORE_COUNT; l_ms++) + { + uint8_t l_offset_to_fwms = + i_f_s_offset + // offset to section + Lx_V1_S_OFFSET_TO_G0 + // offset to group + Lx_V1_G0_OFFSET_TO_FWMS[l_ms]; // offset to mark + + // clear value, build final value for this index + l_fwms[l_index][l_ms] = 0; + l_fwms[l_index][l_ms] |= (i_record_data[l_offset_to_fwms++] << 16); + l_fwms[l_index][l_ms] |= (i_record_data[l_offset_to_fwms++] << 8); + l_fwms[l_index][l_ms] |= (i_record_data[l_offset_to_fwms]); + } + + // update attribute value + FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_MSS_MVPD_FWMS, l_mcs_target, l_fwms), + "Error from FAPI_ATTR_SET (ATTR_MSS_MVPD_FWMS) on target: %s", + mss::c_str(l_mcs_target)); + } + +fapi_try_exit: + FAPI_DBG("End"); + return fapi2::current_err; +} + + +/// +/// @brief Set ATTR_MSS_VREF_DAC_NIBBLE from MVPD Lx keyword +/// @param[in] i_target, the port target (e.g., MCA) +/// @param[in] i_record_data, pointer to VPD keyword data +/// @parmm[in] i_f_s_offset, byte offset to frequency-specific section +/// @return FAPI2_RC_SUCCESS iff ok +/// +fapi2::ReturnCode +p9_mss_attr_update_dac_nibble(const fapi2::Target& i_target, + const uint8_t* i_record_data, + const uint8_t i_f_s_offset) +{ + FAPI_DBG("Start"); + + // if group is valid, update attribute value associated with this port + if (i_record_data[i_f_s_offset + + Lx_V1_S_OFFSET_TO_G0 + + Lx_V1_G0_OFFSET_TO_VALID]) + { + fapi2::ATTR_MSS_VREF_DAC_NIBBLE_Type l_vref_dac_nibble; + const auto& l_mcs_target = mss::find_target(i_target); + + // read current attribute value + FAPI_TRY( mss::vref_dac_nibble(l_mcs_target, l_vref_dac_nibble) ); + + // update attribute value for this port + l_vref_dac_nibble[mss::index(i_target)] = + i_record_data[i_f_s_offset + // offset to section + Lx_V1_S_OFFSET_TO_G0 + // offset to group + Lx_V1_G0_OFFSET_TO_VREF_DAC]; // offset to data + + // update attribute value + FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_MSS_VREF_DAC_NIBBLE, l_mcs_target, l_vref_dac_nibble), + "Error from FAPI_ATTR_SET (ATTR_MSS_VREF_DAC_NIBBLE) on target: %s", + mss::c_str(l_mcs_target)); + } + +fapi_try_exit: + FAPI_DBG("End"); + return fapi2::current_err; +} + + +/// +/// @brief Set ATTR_MSS_VOLT_VDDR from MVPD Lx keyword +/// @param[in] i_target, the port target (e.g., MCA) +/// @param[in] i_record_data, pointer to VPD keyword data +/// @parmm[in] i_f_s_offset, byte offset to frequency-specific section +/// @return FAPI2_RC_SUCCESS iff ok +/// +fapi2::ReturnCode +p9_mss_attr_update_vddr(const fapi2::Target& i_target, + const uint8_t* i_record_data, + const uint8_t i_f_s_offset) +{ + FAPI_DBG("Start"); + + // if group is valid, update attribute value associated with this port + if (i_record_data[i_f_s_offset + + Lx_V1_S_OFFSET_TO_G0 + + Lx_V1_G0_OFFSET_TO_VALID]) + { + fapi2::ATTR_MSS_VOLT_VDDR_Type l_mss_volt_vddr; + const auto& l_mcbist_target = mss::find_target(i_target); + + // update attribute value for this port + l_mss_volt_vddr = + i_record_data[i_f_s_offset + // offset to section + Lx_V1_S_OFFSET_TO_G0 + // offset to group + Lx_V1_G0_OFFSET_TO_VDDR_BIAS]; // offset to data (byte 0) + l_mss_volt_vddr = l_mss_volt_vddr << 8; + + l_mss_volt_vddr |= + i_record_data[i_f_s_offset + // offset to section + Lx_V1_S_OFFSET_TO_G0 + // offset to group + Lx_V1_G0_OFFSET_TO_VDDR_BIAS + 1]; // offset to data (byte 1) + + // update attribute value + FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_MSS_VOLT_VDDR, l_mcbist_target, l_mss_volt_vddr), + "Error from FAPI_ATTR_SET (ATTR_MSS_VOLT_VDDR) on target: %s", + mss::c_str(l_mcbist_target)); + } + +fapi_try_exit: + FAPI_DBG("End"); + return fapi2::current_err; +} + + + +/// +/// @brief Set ATTR_MSS_VPD_MR_DPHY_RLO from MVPD Lx keyword +/// @param[in] i_target, the port target (e.g., MCA) +/// @param[in] i_record_data, pointer to VPD keyword data +/// @parmm[in] i_f_s_offset, byte offset to frequency-specific section +/// @return FAPI2_RC_SUCCESS iff ok +/// +fapi2::ReturnCode +p9_mss_attr_update_dphy_rlo(const fapi2::Target& i_target, + const uint8_t* i_record_data, + const uint8_t i_f_s_offset) +{ + FAPI_DBG("Start"); + + // if group is valid, update attribute value associated with this port + if (i_record_data[i_f_s_offset + + Lx_V1_S_OFFSET_TO_G0 + + Lx_V1_G1_OFFSET_TO_VALID]) + { + fapi2::ATTR_MSS_VPD_MR_DPHY_RLO_Type l_vpd_mr_dphy_rlo; + const auto& l_mcs_target = mss::find_target(i_target); + + // read current attribute value + FAPI_TRY( mss::vpd_mr_dphy_rlo(l_mcs_target, l_vpd_mr_dphy_rlo) ); + + // update attribute value for this port + l_vpd_mr_dphy_rlo[mss::index(i_target)] = + i_record_data[i_f_s_offset + // offset to section + Lx_V1_S_OFFSET_TO_G1 + // offset to group + Lx_V1_G1_OFFSET_TO_DPHY_RLO]; // offset to data + + // update attribute value + FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_MSS_VPD_MR_DPHY_RLO, l_mcs_target, l_vpd_mr_dphy_rlo), + "Error from FAPI_ATTR_SET (ATTR_MSS_VPD_MR_DPHY_RLO) on target: %s", + mss::c_str(l_mcs_target)); + } + +fapi_try_exit: + FAPI_DBG("End"); + return fapi2::current_err; +} + + +/// +/// @brief Set ATTR_MSS_VPD_MR_TSYS_ADR from MVPD Lx keyword +/// @param[in] i_target, the port target (e.g., MCA) +/// @param[in] i_record_data, pointer to VPD keyword data +/// @parmm[in] i_f_s_offset, byte offset to frequency-specific section +/// @return FAPI2_RC_SUCCESS iff ok +/// +fapi2::ReturnCode +p9_mss_attr_update_tsys_adr(const fapi2::Target& i_target, + const uint8_t* i_record_data, + const uint8_t i_f_s_offset) +{ + FAPI_DBG("Start"); + + // if group is valid, update attribute value associated with this port + if (i_record_data[i_f_s_offset + + Lx_V1_S_OFFSET_TO_G0 + + Lx_V1_G1_OFFSET_TO_VALID]) + { + fapi2::ATTR_MSS_VPD_MR_TSYS_ADR_Type l_vpd_mr_tsys_adr; + const auto& l_mcs_target = mss::find_target(i_target); + + // update attribute value for this port + l_vpd_mr_tsys_adr = + i_record_data[i_f_s_offset + // offset to section + Lx_V1_S_OFFSET_TO_G1 + // offset to group + Lx_V1_G1_OFFSET_TO_TSYS_ADR]; // offset to data + + // update attribute value + FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_MSS_VPD_MR_TSYS_ADR, l_mcs_target, l_vpd_mr_tsys_adr), + "Error from FAPI_ATTR_SET (ATTR_MSS_VPD_MR_TSYS_ADR) on target: %s", + mss::c_str(l_mcs_target)); + } + +fapi_try_exit: + FAPI_DBG("End"); + return fapi2::current_err; +} + + +/// +/// @brief Set ATTR_MSS_VPD_MR_TSYS_DATA from MVPD Lx keyword +/// @param[in] i_target, the port target (e.g., MCA) +/// @param[in] i_record_data, pointer to VPD keyword data +/// @parmm[in] i_f_s_offset, byte offset to frequency-specific section +/// @return FAPI2_RC_SUCCESS iff ok +/// +fapi2::ReturnCode +p9_mss_attr_update_tsys_data(const fapi2::Target& i_target, + const uint8_t* i_record_data, + const uint8_t i_f_s_offset) +{ + FAPI_DBG("Start"); + + // if group is valid, update attribute value associated with this port + if (i_record_data[i_f_s_offset + + Lx_V1_S_OFFSET_TO_G0 + + Lx_V1_G1_OFFSET_TO_VALID]) + { + fapi2::ATTR_MSS_VPD_MR_TSYS_DATA_Type l_vpd_mr_tsys_data; + const auto& l_mcs_target = mss::find_target(i_target); + + // update attribute value for this port + l_vpd_mr_tsys_data = + i_record_data[i_f_s_offset + // offset to section + Lx_V1_S_OFFSET_TO_G1 + // offset to group + Lx_V1_G1_OFFSET_TO_TSYS_DATA]; // offset to data + + // update attribute value + FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_MSS_VPD_MR_TSYS_DATA, l_mcs_target, l_vpd_mr_tsys_data), + "Error from FAPI_ATTR_SET (ATTR_MSS_VPD_MR_TSYS_DATA) on target: %s", + mss::c_str(l_mcs_target)); + } + +fapi_try_exit: + FAPI_DBG("End"); + return fapi2::current_err; +} + + +/// +/// @brief Apply chip specific overrides from module VPD +/// @param[in] i_target, the port target (e.g., MCA) +/// @return FAPI2_RC_SUCCESS iff ok +/// +fapi2::ReturnCode +p9_mss_attr_update_lx_mvpd(const fapi2::Target& i_target) +{ + FAPI_INF("Start"); + + uint32_t l_keyword_size; + uint8_t l_keyword_data[CRP0_Lx_RECORD_SIZE_EXP]; + fapi2::MvpdKeyword l_keyword; + uint8_t l_section_offset; + const auto& l_chip_target = mss::find_target(i_target); + + // determine keyword/section offset for lookup + FAPI_TRY(p9_mss_attr_update_get_lx_offsets(i_target, l_keyword, l_section_offset), + "Error from p9_mss_attr_update_lx_mvpd_offsets"); + + // check VPD field size + FAPI_TRY(fapi2::getMvpdField(fapi2::MVPD_RECORD_CRP0, + l_keyword, + l_chip_target, + NULL, + l_keyword_size), + "Error from getMvpdField (CRP0, keyword:%d, size check) on target: %s", + l_keyword, mss::c_str(l_chip_target)); + + FAPI_ASSERT(l_keyword_size == CRP0_Lx_RECORD_SIZE_EXP, + fapi2::P9_MSS_ATTR_UPDATE_MVPD_READ_ERR() + .set_TARGET(l_chip_target) + .set_KEYWORD_SIZE(l_keyword_size), + "Invalid CRP0 keyword:%d record size (%s)", + l_keyword, mss::c_str(l_chip_target)); + + // retrieve data + FAPI_TRY(fapi2::getMvpdField(fapi2::MVPD_RECORD_CRP0, + l_keyword, + l_chip_target, + l_keyword_data, + l_keyword_size), + "Error from getMvpdField (CRP0, keyword:%d, retrieval) on target: %s", + l_keyword, mss::c_str(l_chip_target)); + + // check version number. currently v0 == v1, so we check for either and make sure we + // use the V1 offsets. + FAPI_ASSERT(((l_keyword_data[Lx_VERSION_OFFSET] == Lx_V0_VALUE) || + (l_keyword_data[Lx_VERSION_OFFSET] == Lx_V1_VALUE)), + fapi2::P9_MSS_ATTR_UPDATE_MVPD_VERSION_ERR(). + set_TARGET(l_chip_target). + set_VERSION(l_keyword_data[Lx_VERSION_OFFSET]), + "Invalid CRP0 keyword:%d record version: %02X (%s)", + l_keyword, l_keyword_data[Lx_VERSION_OFFSET], mss::c_str(l_chip_target)); + + // update from frequency specific areas + FAPI_TRY(p9_mss_attr_update_fwms(i_target, l_keyword_data, l_section_offset), + "Error from p9_mss_attr_update_fwms"); + FAPI_TRY(p9_mss_attr_update_dac_nibble(i_target, l_keyword_data, l_section_offset), + "Error from p9_mss_attr_update_dac_nibble"); + FAPI_TRY(p9_mss_attr_update_vddr(i_target, l_keyword_data, l_section_offset), + "Error from p9_mss_attr_update_vddr"); + FAPI_TRY(p9_mss_attr_update_dphy_rlo(i_target, l_keyword_data, l_section_offset), + "Error from p9_mss_attr_update_dphy_rlo"); + FAPI_TRY(p9_mss_attr_update_tsys_adr(i_target, l_keyword_data, l_section_offset), + "Error from p9_mss_attr_update_tsys_adr"); + FAPI_TRY(p9_mss_attr_update_tsys_data(i_target, l_keyword_data, l_section_offset), + "Error from p9_mss_attr_update_tsys_data"); + +fapi_try_exit: + FAPI_INF("End"); + return fapi2::current_err; +} + + +/// +/// @brief Programatic over-rides related to effective config, including data +/// from module VPD /// @param[in] i_target, the controller (e.g., MCS) /// @return FAPI2_RC_SUCCESS iff ok /// -fapi2::ReturnCode p9_mss_attr_update( const fapi2::Target& i_target ) +fapi2::ReturnCode +p9_mss_attr_update(const fapi2::Target& i_target) { - FAPI_INF("Start attr update"); - FAPI_INF("End attr update"); - return FAPI2_RC_SUCCESS; + FAPI_INF("Start"); + + // if there are no DIMM, exit + if (mss::count_dimm(i_target) == 0) + { + FAPI_INF("Seeing no DIMM on %s, no attribute overrides to set", mss::c_str(i_target)); + return FAPI2_RC_SUCCESS; + } + + // apply MPVD overrides per MCA port + for (const auto& p : mss::find_targets(i_target)) + { + FAPI_TRY(p9_mss_attr_update_lx_mvpd(p), + "Error from p9_mss_attr_update_lx_mvpd (target: %s)", mss::c_str(p)); + } + +fapi_try_exit: + FAPI_INF("End"); + return fapi2::current_err; } diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_attr_update.H b/src/import/chips/p9/procedures/hwp/memory/p9_mss_attr_update.H index 58eea1ba0..cd4c698c2 100644 --- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_attr_update.H +++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_attr_update.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* Contributors Listed Below - COPYRIGHT 2015,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -38,8 +38,28 @@ #include +// Lx version 1 parsing/extraction constants +// section offsets +constexpr uint8_t Lx_V1_R_OFFSET_TO_F0S = 24; +constexpr uint8_t Lx_V1_R_OFFSET_TO_F1S = 82; +constexpr uint8_t Lx_V1_R_OFFSET_TO_F2S = 140; +constexpr uint8_t Lx_V1_R_OFFSET_TO_F3S = 198; + typedef fapi2::ReturnCode (*p9_mss_attr_update_FP_t) (const fapi2::Target&); +// Define some of the helper API so we can test them in CI +/// +/// @brief Given target and memory frequency, return MVPD Lx keyword and +/// offset to first byte in frequency-specific customization section +/// @param[in] i_target the port target (e.g., MCA) +/// @param[out] o_keyword Lx keyword ID for this port +/// @param[out] o_s_offset frequency-specific section byte offset +/// @return FAPI2_RC_SUCCESS iff ok +/// +fapi2::ReturnCode p9_mss_attr_update_get_lx_offsets( const fapi2::Target& i_target, + fapi2::MvpdKeyword& o_keyword, + uint8_t& o_s_offset); + extern "C" { diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_attr_update.mk b/src/import/chips/p9/procedures/hwp/memory/p9_mss_attr_update.mk index ed66a0546..b7f29d6a9 100644 --- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_attr_update.mk +++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_attr_update.mk @@ -5,7 +5,7 @@ # # OpenPOWER HostBoot Project # -# Contributors Listed Below - COPYRIGHT 2015,2016 +# Contributors Listed Below - COPYRIGHT 2015,2017 # [+] International Business Machines Corp. # # @@ -22,5 +22,8 @@ # permissions and limitations under the License. # # IBM_PROLOG_END_TAG +-include 00common.mk + PROCEDURE=p9_mss_attr_update +$(eval $(call ADD_MEMORY_INCDIRS,$(PROCEDURE))) $(call BUILD_PROCEDURE) diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit_mc.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit_mc.C index c0995bed0..a3aa5d35d 100644 --- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit_mc.C +++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit_mc.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* Contributors Listed Below - COPYRIGHT 2015,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -36,6 +36,7 @@ #include #include +#include #include #include #include @@ -138,6 +139,9 @@ extern "C" // Step Six: Setup Control Bit ECC FAPI_TRY( mss::enable_read_ecc(p) ); + + // apply marks from MVPD + FAPI_TRY( mss::apply_mark_store(p) ); } // At this point the DDR interface must be monitored for memory errors. Memory related FIRs should be unmasked. diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_getecid.C b/src/import/chips/p9/procedures/hwp/perv/p9_getecid.C index cc5d86eb4..04fd11d43 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_getecid.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_getecid.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016 */ +/* Contributors Listed Below - COPYRIGHT 2016,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -61,9 +61,16 @@ static fapi2::ReturnCode setup_memory_work_around_attributes( // All these attributes have 1 as their 'YES' enum value uint8_t l_value = 1; FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_DO_MSS_WR_VREF, i_target, l_value) ); - FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_DO_MSS_VCCD_OVERRIDE, i_target, l_value) ); FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_DO_MSS_VREF_DAC, i_target, l_value) ); - FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_DO_MSS_VREG_COARSE, i_target, l_value) ); + } + + // Workarounds for modules which are before 1.03 (memory part 2) + if (l_version < ddLevelMemoryPart2) + { + FAPI_DBG("seeing version < 1.03 (0x%x) setting attributes", l_version); + + // All these attributes have 1 as their 'YES' enum value + uint8_t l_value = 1; FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_DO_MSS_TRAINING_BAD_BITS, i_target, l_value) ); } @@ -117,4 +124,3 @@ fapi_try_exit: return fapi2::current_err; } - diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_getecid.H b/src/import/chips/p9/procedures/hwp/perv/p9_getecid.H index 0dd964723..0027876ef 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_getecid.H +++ b/src/import/chips/p9/procedures/hwp/perv/p9_getecid.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016 */ +/* Contributors Listed Below - COPYRIGHT 2016,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -46,7 +46,7 @@ enum P9_GETECID_Private_Constants { fuseString_len = 176, // fuse string length ddLevelMemoryPart1 = 0b110, // bit field in ecid buffer representing DD1.02 - ddLevelMemoryPart2 = 0b111, // bit field in ecid buffer representing DD1.02 + ddLevelMemoryPart2 = 0b111, // bit field in ecid buffer representing DD1.03 }; typedef fapi2::ReturnCode (*p9_getecid_FP_t)(const fapi2::Target&, diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index ceb8bfeae..39ab680af 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -216,7 +216,7 @@ - + ATTR_CHIP_EC_FEATURE_HW388878 TARGET_TYPE_PROC_CHIP @@ -466,23 +466,6 @@ - - ATTR_CHIP_EC_FEATURE_MSS_VCCD_OVERRIDE - TARGET_TYPE_PROC_CHIP - - Override VREG control information - - - - ENUM_ATTR_NAME_NIMBUS - - 0x20 - LESS_THAN - - - - - ATTR_CHIP_EC_FEATURE_MSS_VREF_DAC TARGET_TYPE_PROC_CHIP @@ -500,23 +483,6 @@ - - ATTR_CHIP_EC_FEATURE_MSS_VREG_COARSE - TARGET_TYPE_PROC_CHIP - - VREG Coarse work-around for Nimbus DD1.0 - - - - ENUM_ATTR_NAME_NIMBUS - - 0x20 - LESS_THAN - - - - - ATTR_CHIP_EC_FEATURE_MSS_WAT_DEBUG_ATTN TARGET_TYPE_PROC_CHIP diff --git a/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml index 8b0385386..5f7c9c673 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml @@ -2166,11 +2166,12 @@ ATTR_MSS_VREF_DAC_NIBBLE - TARGET_TYPE_SYSTEM - Value for VREF DAC nibbles + TARGET_TYPE_MCS + Value for VREF DAC nibble uint8 + 2 vref_dac_nibble @@ -3117,4 +3118,17 @@ ignore_plug_rules + + ATTR_MSS_MVPD_FWMS + TARGET_TYPE_MCS + + Mark store records from MPVD Lx keyword + + + uint32 + + 2 8 + mvpd_fwms + + diff --git a/src/import/chips/p9/procedures/xml/attribute_info/memory_workarounds_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/memory_workarounds_attributes.xml index b71de4091..1d40c3ced 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/memory_workarounds_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/memory_workarounds_attributes.xml @@ -5,7 +5,7 @@ - + @@ -43,18 +43,6 @@ - - ATTR_DO_MSS_VCCD_OVERRIDE - TARGET_TYPE_PROC_CHIP - - Override VREG control information sub DD1.02 - - - uint8 - NO = 0, YES = 1 - - - ATTR_DO_MSS_VREF_DAC TARGET_TYPE_PROC_CHIP @@ -67,18 +55,6 @@ - - ATTR_DO_MSS_VREG_COARSE - TARGET_TYPE_PROC_CHIP - - VREG Coarse work-around for Nimbus sub DD1.02 - - - uint8 - NO = 0, YES = 1 - - - ATTR_DO_MSS_TRAINING_BAD_BITS TARGET_TYPE_PROC_CHIP diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_mss_attr_update_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_mss_attr_update_errors.xml new file mode 100644 index 000000000..a84229d0d --- /dev/null +++ b/src/import/chips/p9/procedures/xml/error_info/p9_mss_attr_update_errors.xml @@ -0,0 +1,48 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RC_P9_MSS_ATTR_UPDATE_MVPD_VERSION_ERR + + Procedure: p9_mss_attr_update + Unsupported MVPD CRP0 Lx Keyword version + + TARGET + VERSION + + + + RC_P9_MSS_ATTR_UPDATE_MVPD_READ_ERR + + Procedure: p9_mss_attr_update + Unexpected MVPD CRP0 Lx Keyword size + + TARGET + KEYWORD_SIZE + + + diff --git a/src/import/hwpf/fapi2/include/mvpd_access_defs.H b/src/import/hwpf/fapi2/include/mvpd_access_defs.H index 75f017afb..548b596a9 100644 --- a/src/import/hwpf/fapi2/include/mvpd_access_defs.H +++ b/src/import/hwpf/fapi2/include/mvpd_access_defs.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* Contributors Listed Below - COPYRIGHT 2015,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -113,6 +113,14 @@ enum MvpdKeyword MVPD_KEYWORD_PB = 0x21, MVPD_KEYWORD_CH = 0x22, MVPD_KEYWORD_IQ = 0x23, + MVPD_KEYWORD_L1 = 0x24, + MVPD_KEYWORD_L2 = 0x25, + MVPD_KEYWORD_L3 = 0x26, + MVPD_KEYWORD_L4 = 0x27, + MVPD_KEYWORD_L5 = 0x28, + MVPD_KEYWORD_L6 = 0x29, + MVPD_KEYWORD_L7 = 0x2a, + MVPD_KEYWORD_L8 = 0x2b, MVPD_KEYWORD_LAST, //useful for testcases MVPD_KEYWORD_FIRST = MVPD_KEYWORD_VD, //useful for testcases }; diff --git a/src/usr/fapi2/plat_mvpd_access.C b/src/usr/fapi2/plat_mvpd_access.C index 47e5c63e5..8200c1b22 100755 --- a/src/usr/fapi2/plat_mvpd_access.C +++ b/src/usr/fapi2/plat_mvpd_access.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016 */ +/* Contributors Listed Below - COPYRIGHT 2016,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -237,6 +237,14 @@ fapi2::ReturnCode MvpdKeywordXlate(const fapi2::MvpdKeyword i_fapiKeyword, {MVPD::PB, MVPD_KEYWORD_PB}, {MVPD::CH, MVPD_KEYWORD_CH}, {MVPD::IQ, MVPD_KEYWORD_IQ}, + {MVPD::L1, MVPD_KEYWORD_L1}, + {MVPD::L2, MVPD_KEYWORD_L2}, + {MVPD::L3, MVPD_KEYWORD_L3}, + {MVPD::L4, MVPD_KEYWORD_L4}, + {MVPD::L5, MVPD_KEYWORD_L5}, + {MVPD::L6, MVPD_KEYWORD_L6}, + {MVPD::L7, MVPD_KEYWORD_L7}, + {MVPD::L8, MVPD_KEYWORD_L8}, /*Keywords available in HB but not in FAPI enum*/ //{MVPD::PM, MVPD_KEYWORD_PM}, diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml index cf03952ea..2d04775d7 100644 --- a/src/usr/targeting/common/xmltohb/attribute_types.xml +++ b/src/usr/targeting/common/xmltohb/attribute_types.xml @@ -32084,6 +32084,7 @@ Measured in GB + 2 volatile-zeroed @@ -32094,6 +32095,25 @@ Measured in GB + + MSS_MVPD_FWMS + + Mark store records from MPVD Lx keyword + + + + + 2,8 + + volatile-zeroed + + + + ATTR_MSS_MVPD_FWMS + DIRECT + + + MSS_VCCD_OVERRIDE @@ -32256,6 +32276,7 @@ Measured in GB + DO_MSS_VCCD_OVERRIDE @@ -32293,6 +32314,7 @@ Measured in GB + DO_MSS_VREG_COARSE diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml index 2a2fd82d7..413fc5be1 100755 --- a/src/usr/targeting/common/xmltohb/target_types.xml +++ b/src/usr/targeting/common/xmltohb/target_types.xml @@ -884,7 +884,6 @@ IVRM_STABILIZATION_DELAY_NS SYSTEM_RESCLK_ENABLE MSS_MRW_REFRESH_RATE_REQUEST - MSS_VREF_DAC_NIBBLE MSS_VCCD_OVERRIDE RAW_MTM MSS_MEM_PORT_POS_OF_FAIL_THROTTLE @@ -1279,9 +1278,7 @@ SECUREBOOT_PROTECT_DECONFIGURED_TPM DO_MSS_WR_VREF - DO_MSS_VCCD_OVERRIDE DO_MSS_VREF_DAC - DO_MSS_VREG_COARSE DO_MSS_TRAINING_BAD_BITS @@ -1820,6 +1817,8 @@ EFF_DRAM_RTT_NOM EFF_DRAM_RTT_WR EFF_DRAM_RTT_PARK + MSS_VREF_DAC_NIBBLE + MSS_MVPD_FWMS -- cgit v1.2.1