From 08b4146e8dc8aca824d8a8cc5dc62c23cc23827c Mon Sep 17 00:00:00 2001
From: Daniel Howe <dchowe@us.ibm.com>
Date: Wed, 10 Jan 2018 13:20:07 -0600
Subject: Extend xbus oc expiration timers and updated epsilon for fleetwood

Change-Id: I168c64e12e7d0ebe60e0a6ffc021d55aa77fd0a0
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51730
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51739
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
---
 .../chips/p9/procedures/hwp/initfiles/p9_fbc_cd_hp1_scom.C   | 12 ++++++++++--
 src/import/chips/p9/procedures/hwp/nest/p9_fbc_eff_config.C  | 10 +++++-----
 2 files changed, 15 insertions(+), 7 deletions(-)

diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_cd_hp1_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_cd_hp1_scom.C
index 7b5b05874..9471d90ea 100644
--- a/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_cd_hp1_scom.C
+++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_cd_hp1_scom.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2017                             */
+/* Contributors Listed Below - COPYRIGHT 2017,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -107,6 +107,10 @@ fapi2::ReturnCode p9_fbc_cd_hp1_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC
         fapi2::ATTR_PROC_FABRIC_X_LINKS_CNFG_Type l_TGT0_ATTR_PROC_FABRIC_X_LINKS_CNFG;
         FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_FABRIC_X_LINKS_CNFG, TGT0, l_TGT0_ATTR_PROC_FABRIC_X_LINKS_CNFG));
         uint64_t l_def_NUM_X_LINKS_CFG = l_TGT0_ATTR_PROC_FABRIC_X_LINKS_CNFG;
+        fapi2::ATTR_PROC_FABRIC_PUMP_MODE_Type l_TGT1_ATTR_PROC_FABRIC_PUMP_MODE;
+        FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_FABRIC_PUMP_MODE, TGT1, l_TGT1_ATTR_PROC_FABRIC_PUMP_MODE));
+        uint64_t l_def_CHIP_IS_GROUP = (l_TGT1_ATTR_PROC_FABRIC_PUMP_MODE ==
+                                        fapi2::ENUM_ATTR_PROC_FABRIC_PUMP_MODE_CHIP_IS_GROUP);
         fapi2::ATTR_FREQ_PB_MHZ_Type l_TGT1_ATTR_FREQ_PB_MHZ;
         FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_FREQ_PB_MHZ, TGT1, l_TGT1_ATTR_FREQ_PB_MHZ));
         fapi2::ATTR_FREQ_X_MHZ_Type l_TGT1_ATTR_FREQ_X_MHZ;
@@ -170,7 +174,11 @@ fapi2::ReturnCode p9_fbc_cd_hp1_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC
                 {
                     l_scom_buffer.insert<54, 5, 59, uint64_t>(literal_0b01010 );
                 }
-                else if ((l_def_NUM_X_LINKS_CFG == literal_3))
+                else if (((l_def_NUM_X_LINKS_CFG == literal_3) && ( ! l_def_CHIP_IS_GROUP)))
+                {
+                    l_scom_buffer.insert<54, 5, 59, uint64_t>(literal_0b10100 );
+                }
+                else if (((l_def_NUM_X_LINKS_CFG == literal_3) && l_def_CHIP_IS_GROUP))
                 {
                     l_scom_buffer.insert<54, 5, 59, uint64_t>(literal_0b01100 );
                 }
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_fbc_eff_config.C b/src/import/chips/p9/procedures/hwp/nest/p9_fbc_eff_config.C
index fcbf75eb8..4a40bb1f4 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_fbc_eff_config.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_fbc_eff_config.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2016,2017                        */
+/* Contributors Listed Below - COPYRIGHT 2016,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -61,10 +61,10 @@ const uint32_t EPSILON_W_T1_LE[] = {    9,   10,   11,   13,   15,   27 };
 
 // HE epsilon (4 chips per-group)
 const uint32_t EPSILON_R_T0_HE[] = {    7,    7,    8,    8,   10,   22 };
-const uint32_t EPSILON_R_T1_HE[] = {   77,   78,   81,   84,   89,  113 };
-const uint32_t EPSILON_R_T2_HE[] = {  187,  189,  191,  194,  199,  223 };
-const uint32_t EPSILON_W_T0_HE[] = {   12,   13,   14,   16,   18,   30 };
-const uint32_t EPSILON_W_T1_HE[] = {   96,   97,   98,   99,  102,  114 };
+const uint32_t EPSILON_R_T1_HE[] = {   86,   88,   90,   93,   98,  122 };
+const uint32_t EPSILON_R_T2_HE[] = {  197,  198,  201,  204,  209,  233 };
+const uint32_t EPSILON_W_T0_HE[] = {   22,   23,   24,   26,   28,   40 };
+const uint32_t EPSILON_W_T1_HE[] = {  105,  106,  107,  109,  111,  123 };
 
 // HE epsilon (flat 4 Zeppelin)
 const uint32_t EPSILON_R_T0_F4[] = {    7,    7,    8,    8,   10,   22 };
-- 
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