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* SW419349: Handle override of deconfig by Error vs FCO reasons by associationAmit Tendolkar2018-06-183-28/+126
| | | | | | | | | | | | | | | | | | | | | | 1. Override the deconfig reason of a parent .. a) getting deconfig by association due to error on its child && b) has at least 1 other child already deconfig by FCO .. to deconfig by FCO 2. Override the deconfig reason of a child .. c) whose parent is getting deconfig by an error && d) that is itself already deconfig by FCO .. to deconfig by that error Change-Id: I9c73fe35aedb832f9a4b33bd299bb30fe589095c CQ: SW419349 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59934 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Update bbuild to b0608a_1823.920 and CUMULUS/Jenkins FixMike Baiocchi2018-06-183-11/+4
| | | | | | | | | | | | | | | | This commit updates the bbuild to b0608a_1823.920 and removes some workarounds that aren't needed anymore. It also contains a fix in autocitest that should allow the CUMULUS standalone config to run correctly on Jenkins. Change-Id: I500353152af1126a2d5e016378dd7e0784b15c99 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60690 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Update MAGIC instruction for SimicsDan Crowell2018-06-181-2/+2
| | | | | | | | | | | | Fixed some bad asm code Change-Id: I6786a6010c682ce8bb5de74999da659ad2eb43d7 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60775 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* shift OBUS FIR programming inits for secure bootJoe McGill2018-06-171-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | p9_sbe_scominit: unmask all OBUS EXTFIR bits, use PB CENT FIR 14 to mark update for downstream code (qualify XBUS/OBUS EXTFIR updates to apply to PPE platform only) p9_fab_iovalid: conditionally unmask OBUS EXTFIR based on state of PB CENT FIR 14 (will handle unmasking here when insecure -- Cronus or old SBE images) p9_obus_extfir_setup: new HWP for HB to call, mask OBUS EXTFIR bits for unused busses Change-Id: I07e7da4a7c61c041451ff4ddfeec3c266385d404 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60358 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60363 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* p9_fab_iovalid -- remove code setting ABUS security lockJoe McGill2018-06-171-20/+0
| | | | | | | | | | | | | | | | | | per HW FW interlock, Hostboot will lock down later Change-Id: I70f692e0c81a283c8f1ceec2073e01668b02f0da Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60121 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60686 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* PRD: Set 'too many bus errors' in DMIFIR to UNIT_CSZane Shelley2018-06-172-6/+6
| | | | | | | | | | | | | | | This is to match behavior on the processor side of the DMI bus. Change-Id: I71c9b5e5dc9e9e96071feec1568168eb6ead48f0 CQ: SW432739 Backport: release-fips920 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60226 Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60587 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
* PRD: DMI Lane RepairBrian Stegmiller2018-06-178-172/+742
| | | | | | | | | | | | Change-Id: I0c96c32387cb068138c9a7de0f73fdfeaf02af6c RTC:144057 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59208 Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60586 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
* PRD: Do not abort on UE during MBA TPSZane Shelley2018-06-171-4/+3
| | | | | | | | | | | | | | Change-Id: I9f21151fddd0d95a593df486eb419b7e78eb2677 CQ: SW433373 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60429 Reviewed-by: Benjamin J. Weisenbeck <bweisenb@us.ibm.com> Reviewed-by: Caleb N. Palmer <cnpalmer@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60564 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
* PRD: MNFG spare DRAM deploy needs to deploy on both MBA portsZane Shelley2018-06-171-3/+1
| | | | | | | | | | | | | Change-Id: Ie0b5f800545a1331449e906945296e587217fbaf CQ: SW433363 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60477 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Benjamin J. Weisenbeck <bweisenb@us.ibm.com> Reviewed-by: Caleb N. Palmer <cnpalmer@us.ibm.com> Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60563 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
* PRD: Add missing centaur PLL CheckErrorType pluginBenjamin Weisenbeck2018-06-171-0/+25
| | | | | | | | | | | | Change-Id: I766f82059433a1a66cbd9082d56be40c5efb09b1 CQ: SW433084 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60397 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60523 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
* Temp remove bad bit translation until attr enabled for FleetwoodCaleb Palmer2018-06-161-2/+2
| | | | | | | | | | | Change-Id: I943f7a63f0c45320dcfc0ba52c4728c54512cadd Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60753 Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
* Implement the VPD backend for these attributesSwathi Madhuri Bhattiprolu2018-06-153-0/+104
| | | | | | | | | | | | | | | | - ATTR_CEN_VPD_CDIMM_SENSOR_MAP_PRIMARY - ATTR_CEN_VPD_CDIMM_SENSOR_MAP_SECONDARY Change-Id: Idb20b53f1fe9d5a8fbdbef608fb3ab3faa64330b CQ:SW422858 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60473 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Debug improvements for exceptions and OOM hangsDan Crowell2018-06-158-16/+109
| | | | | | | | | | | | | | | | | There are two main changes in this commit: 1) Forcing an assert if we cannot allocate pages after 10,000 attempts to yield. 2) Adding a backtrace for a lot of exception paths. Change-Id: I755ada753b78abed56e553f7c669f0f98ae68700 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/58224 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Deprecate legacy ATTR_MBA_PORT/ATTR_MBA_DIMMChristian Geddes2018-06-158-218/+312
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are currently two competing sets of attributes related to the DIMM position. - Legacy (P8) MBA_PORT/MBA_DIMM - New (P9) CEN_MBA_PORT/CEN_MBA_DIMM These two sets of attributes are not currently being populated with the same data in all of the MRW xml files. The P9 HWPs are using the CEN_ versions but there is a lot of code on the FSP that is still using the old versions. Additionally, the Nimbus MRW XMLs are using MBA_PORT to represent the dimm position behind the MCA (even though there is only a single port on the MCA and MBA is erroneous). This commit attempts to consolidate things into a new set of more generic (and hopefully more descriptive) attributes to use for all system types. The MRW parsing logic has been modified to consume whatever data it can to populate all 3 sets of data with the same values. Eventually we will deprecate the 2 previous attribute sets once we've cleaned all the existing files up. The new attributes are: - MEM_PORT - POS_ON_MEM_PORT CQ: SW430317 Change-Id: If63929d78dcaacc1120709a659d6094ce576918d Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59077 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* support IO reconfig loop for OBUS DL link training failuresJoe McGill2018-06-151-38/+206
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - p9c DD1.1+ only, DD1.0 not supported - FW to trigger reconfig loop back to step 0 from sys_proc_fab_iovalid if: 1) sys_proc_fab_iovalid rc = FAPI2_RC_SUCCESS -- AND -- 2) new output o_obus_dl_rcs (vector of P9_FAB_IOVALID_DL_NOT_TRAINED_ERR rc objects identifying links which failed on this chip) has entries - attribute changes: ATTR_LINK_TRAIN -- remove platinit tag, attr should init to zero (both even and odd), and reconfig loop will adjust value as we go Change-Id: Ib7a0c6e342f1d98893585d72be1bfddf67acde55 Original-Change-Id: I95eebd2b893db6d2511aae40798c0a4e049835d6 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59022 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60655 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* dd1.1+ DL training procedure updatesDaniel Howe2018-06-151-0/+4
| | | | | | | | | | | | | | | | | | Change-Id: I83a306531f4bd668e323a1bd1c8af17dee7d5e72 Original-Change-Id: I94b879d9eecdea6eadcebd9e50beb1b4d31ae8ca Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55046 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Dev-Ready: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60654 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Disable-CI: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* p9_fab_iovalid -- secure ABUS mailboxes after iovalid is assertedJoe McGill2018-06-151-0/+20
| | | | | | | | | | | | | | | | | | | | Setting ABUS_LOCK in security switch register will return all zero data on future reads to secure mailboxes (even half-link, mbox 0) Change-Id: Id36204f016bc766ccd39d7bdae16123dab73a5d1 Original-Change-Id: I6c661839b8661e073ba0e16ce594843e60355f85 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51817 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60653 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Disable-CI: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* shift XBUS FIR programming inits for secure bootJoe McGill2018-06-151-31/+36
| | | | | | | | | | | | | | | | | | | | | | | | | general approach: - enable runtime FIR settings in SBE code, for all present XBUS regions - remove FIR initialization from HB code which runs prior to SMP build - update HB HWPs to re-mask XBUSes which are present but not functionally used CQ: SW409902 CQ: SW409903 CQ: SW409905 Change-Id: Icb42cceabb2d9c869974a2a6eea0507be0d057e8 Original-Change-Id: I378ed2ca39c0d5be894420bfc3257e41e3e95de5 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50519 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60652 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Disable-CI: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Shorten A-link timers for sim. Add polling for A-link training.Ben Gass2018-06-151-15/+32
| | | | | | | | | | | | | | | | Change-Id: Ic55d4ad2e8e11bb07f2e5f67cf8fe907782611fc Original-Change-Id: Iad63bc098741d328c4ccf90268b3817f4cf67858 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50536 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60651 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Disable-CI: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* IO, FBC updates to enable ABUS for FleetwoodJoe McGill2018-06-151-22/+106
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Attributes: ------------------------------------------------------------------------------- nest_attributes.xml add ATTR_LINK_TRAIN, written by platform on X, O endpoints to specify whether half or full link should be trained add ATTR_PROC_FABRIC_LINK_ACTIVE, written by p9_fbc_eff_config_links adjust enums for ATTR_PROC_FABRIC_[XA]_ATTACHED_CHIP_CNFG, written by p9_fbc_eff_config_links add ATTR_PROC_FABRIC_[XA]_LINKS_CNFG, written by p9_fbc_eff_config_links pervasive_attributes.xml create ATTR_PROC_NPU_REGION_ENABLED to encapsulate accessibility of NPU logic domain, written by p9_chiplet_scominit chip_ec_attributes.xml add EC feature attribute controlling DL training workaround Initfiles: ------------------------------------------------------------------------------- p9.fbc.ab_hp.scom.initfile add logic to permit reset of chg_rate master dials in second phase SMP build adjust link enable expressions to reflect new ATTACHED_CHIP_CNFG enums p9.fbc.cd_hp.scom.initfile p9.fbc.no_hp.scom.initfile consume number of configured X/A links from new attribute, simple addition won't work any longer given new ATTACHED_CHIP_CNFG enums p9.fbc.ioe_dl.scom.initfile support half-link operation, based on ATTR_LINK_TRAIN on X endpoint target p9.fbc.ioe_tl.scom.initifle adjust link enable expressions to reflect new ATTACHED_CHIP_CNFG enums p9.fbc.ioo_dl.scom.initfile support half-link operation, based on ATTR_LINK_TRAIN on O endpoint target qualify OLL enablement based on use as active fabric link adjust PHY training parameters based on current lab learning p9.fbc.ioo_tl.scom.initfile adjust link enable expressions to reflect new ATTACHED_CHIP_CNFG enums support half-link operation, based on ATTACHED_CHIP_CNFG qualify TOD_ENABLE to apply only to O links carrying X traffic p9.npu.scom.initfile clear OPTICAL_IO_CONFIG when not actively using NVLINK, finer-grained updates needed to support mix of O SMP and NVLINK usage HWPs: ------------------------------------------------------------------------------- p9_io_obus_dccal execute only on links actively carrying fabric protocol p9_io_obus_linktrain p9_io_regs encapsulate PHY FIFO reset sequence needed prior to FBC DL training execution p9_chiplet_scominit p9_npu_scominit partial good updates for NPU region p9_fab_iovalid adjust iovalid manipulation/checking, as well as link delay reporting, to support half-link configuration p9_smp_link_layer support half-link configuration via ATTR_PROC_FABRIC_[XA]_ATTACHED_CHIP_CNFG implement OBUS PHY specific workarounds p9_eff_config_links update ATTR_PROC_FABRIC_[XA]_ATTACHED_CHIP_CNFG to support half-link configuration write ATTR_PROC_FABRIC_LINK_ACTIVE on X/O endpoint targets write ATTR_PROC_FABRIC_[XA]_LINKS_CNFG to reflect total number of logically configured links, for initfile consumption Istep wrappers: ------------------------------------------------------------------------------- p9_build_smp_wrap correctly loop over all system targets for second phase SMP build p9_sys_chiplet_scominit_wrap initial release Change-Id: I9110eeabed0d222171039532de690cf7141e3857 Original-Change-Id: Ic1d87df4d3ff0feca7ac2437fa61b6d2fc4a2d68 CQ: HW419022 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43905 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: DANIEL C. HOWE <dchowe@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60650 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Disable-CI: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* L3 update -- p9_fab_iovalidJoe McGill2018-06-151-61/+471
| | | | | | | | | | | | | | | | | | | | add infrastructure to collect TL,DL FFDC in the event of a training failure add HW callouts to TL,DL training failure return codes, others callout code Change-Id: If0029f9312f1bdcd471a231ad4b77b0d8deabac4 Original-Change-Id: I9f5439981bb3972b8e259d7ef2fba2431baaa8fd Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40348 Reviewed-by: Thi N. Tran <thi@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60649 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Disable-CI: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* p9_fab_iovalid -- invoke link validation subroutineJoe McGill2018-06-151-0/+8
| | | | | | | | | | | | | | | | | | call to p9_fab_iovalid_link_validate was missing, invoke to verify link state when HWP is called to raise iovalid Change-Id: Ife69d259b1f56d1bc87e766adf64f53915d73b2d Original-Change-Id: I43872a281c008d52d88c05f662adeb5f51f4e524 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37095 Reviewed-by: CHRISTINA L. GRAVES <clgraves@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60648 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Disable-CI: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* p9_fab_iovalid fix to clear action0/1 bits corresponding w/ link being enabledCHRISTINA L. GRAVES2018-06-151-0/+14
| | | | | | | | | | | | | | | Change-Id: I55c690d59a48a0c9e2e1813afb6e8afc7d9cf8ad Original-Change-Id: Ibc6b1f53bc9d625293e0fc5f2def7f0dd4ef4789 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27830 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60647 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Disable-CI: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* L2 - Fabric updates for multi-chip supportJoe McGill2018-06-151-61/+283
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Refactor p9_build_smp code Add FBC effective config (attribute-only) HWPs Add/call FBC initfiles HWP flow p9_fbc_eff_config p9_fbc_eff_config_links p9_chiplet_scominit p9_smp_link_layer p9_fab_iovalid p9_fbc_eff_config_aggregate p9_build_smp Update engd used in build to e9035 u087 Change-Id: I6b6e1291ac64a9b55169eb0a077801bec41867d9 Original-Change-Id: I9ab9e967847d380596e896a14e481ad8cf247b9a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21643 Tested-by: PPE CI Tested-by: Hostboot CI Tested-by: Jenkins Server Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60646 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Disable-CI: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* L2 HWPs -- p9_smp_link_layer and p9_fab_iovalidJoe McGill2018-06-151-2/+145
| | | | | | | | | | | | | | | | | | | | Tested on n10_e9031_tp030_soa_mc_u008_01 Rebased on e9034 SCOM address header implementation Change-Id: Ib3c2408e890f4151d6951edfcd83d0a9fb79ba7b Original-Change-Id: Iae352ca9392f3e863c9881c90a8a07969befe727 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22942 Tested-by: Jenkins Server Tested-by: Auto Mirror Tested-by: Hostboot CI Tested-by: PPE CI Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: CHRISTINA L. GRAVES <clgraves@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60645 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Disable-CI: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* FBC Level 1 proceduresJoe McGill2018-06-151-0/+59
| | | | | | | | | | | | | | | | | Shells for p9_build_smp, p9_fab_iovalid, p9_smp_link_layer Supporting attribute definitions Change-Id: I0967a4f69fbf362934a34b8a1972487af70223fd Original-Change-Id: I59f7fb0f13ee190cd790ea5771f4a32faaa165d9 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21570 Tested-by: Jenkins Server Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: CHRISTINA L. GRAVES <clgraves@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60644 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Disable-CI: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Remove p9_fab_iovalid.C in order to re-mirror itNick Bofferding2018-06-151-1154/+0
| | | | | | | | Change-Id: I01cacea1d0f60a7176daafa9d729caab71425ec2 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60643 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Disable-CI: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Remove EXTERNAL_VRM_STEPDELAYDan Crowell2018-06-151-1/+0
| | | | | | | Change-Id: I12a3658baac34a10e2570f360ed61767b5377855 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60664 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Removes erroneous FAPI ERR printStephen Glancy2018-06-151-2/+0
| | | | | | | | | | | | | | | Change-Id: Ib24e68a846893b57c31e2985a77e7848b82ce289 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59688 Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Devon A. Baughen <devon.baughen1@ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59708 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fixes IPL UE callout codeStephen Glancy2018-06-152-169/+353
| | | | | | | | | | | | | | | | | Change-Id: I313fed687c6a82f404d886bd552ea4205ddef998 CQ:SW427493 RTC:192947 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59393 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Dev-Ready: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59399 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Correct Safe mode freqency to UltraTurbo compare error message.Ben Gass2018-06-151-1/+1
| | | | | | | | | | | | | | Change-Id: I98785881b9ee5ea7d676a7bb25c23d2c5be38e04 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59690 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59710 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fix bugs in core checkstop escalation manipulation during HBChristian Geddes2018-06-142-2/+17
| | | | | | | | | | | | | | | | | | | There was a bug where in fused mode we are not also setting the 2nd half of the fused core to have the appropriate scom values in the fir action registers. Also we were not re-applying the desired values back to the core fir action registers at the end of hostboot because of a simple bug. Change-Id: I32ae9c7839e27392cfdf0401d008a12941804beb CQ: SW432725 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60439 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Elizabeth K. Liner <eliner@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* getMBvpdAttr: Updates for DDR3 supportPrachi Gupta2018-06-141-8/+13
| | | | | | | | | | | | | | | | | | | | | | Changed the check from if (rc == false) to if (rc != success). This way we are not relying on plat code to return a specific rc in case VPD rec/kw is not found. This HWP relies on a few VPD rec/kw combinations that will not work and we need to ignore errors in that case. The HWP tries the combinations in the following order: VSPD+VM, VSPD+VD, VINI+VZ. For DDR3, first two combinations do not work. Change-Id: I43966493a1d7e9e2f6d9447dd3fda9c3206de417 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60488 Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Dev-Ready: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60493 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* PRD: use correct symbol when writing MBA markstoreZane Shelley2018-06-144-13/+25
| | | | | | | | | | | | | Change-Id: I94db83c4ff438a02df04d8c8e7f17cd491c6c720 CQ: SW433063 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60437 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Benjamin J. Weisenbeck <bweisenb@us.ibm.com> Reviewed-by: Caleb N. Palmer <cnpalmer@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
* PM:Remove deprecated attributesPrasad Bg Ranganath2018-06-141-14/+0
| | | | | | | | | | | | | | | | | RTC:173736 Change-Id: I49d8506f97f0fb61c1117fd57fe1fa302ad44b04 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59837 Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59841 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fixes CKE levels during RCD initializationStephen Glancy2018-06-1411-65/+136
| | | | | | | | | | | | | | | | | | Change-Id: Ic00be58a3e972407e944ebdeff9a16c01c1ee3e9 CQ:SW432711 RTC:194935 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59645 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Dev-Ready: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59652 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fix MBS mask FIR for Obus recoveryStephen Glancy2018-06-141-3/+2
| | | | | | | | | | | | | | | | | | | | | Sets the external timeout FIR to be masked off. Change-Id: I17095b43962ad9e8df694b91cc391829a99b500b CQ:SW432572 RTC:194981 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60211 Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: Marc Gollub <gollub@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Dev-Ready: STEPHEN GLANCY <sglancy@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Edgar R. Cordero <ecordero@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60219 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* p9_sbe_common -- mark TP LFIR bit 37 as recoverableJoe McGill2018-06-141-1/+1
| | | | | | | | | | | | | | | | | | | | | TP LFIR 37 is meant to be marked recoverable for Cumulus 60118 unmasked the bit, but the default action register settings are programmed to trigger a checkstop. This adjust the action1 register default to recoverable. Change-Id: I8d07fdac8eb060ba10929133fdbe93621b8b53e7 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60244 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Dev-Ready: Brent Wieman <bwieman@us.ibm.com> Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60262 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Change npu ATSD timeout to disabledRyan Black2018-06-141-4/+5
| | | | | | | | | | | | | | | Change-Id: I5ae0a32265afb2affda38c386942eb12a14eaf66 CQ: SW432772 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60242 Reviewed-by: Kevin F. Reick <reick@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60254 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Update p9n_23 engd with n23_e9108_3_tp105_ec408_soa_sc_u138_01 dataBen Gass2018-06-141-1/+15
| | | | | | | | | | | | | | | Change-Id: Ib586128b6152c2afb300b984c115d0d9fa8e0e15 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59588 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: James N. Klazynski <jklazyns@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59598 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* p9_sbe_scominit -- unmask TP LFIR bit 37 for CumulusJoe McGill2018-06-141-0/+17
| | | | | | | | | | | | | | | | Change-Id: Id216f65d5c240d88c4db62e374c9f3278d623fbb CQ: SW432374 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60118 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60126 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add bad bit setting to p9c training advancedLouis Stermole2018-06-142-27/+77
| | | | | | | | | | | | | | | | | Change-Id: Iee23ed09e2a196d8e3831ce9bf44d65afb44be0d Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59351 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Dev-Ready: Louis Stermole <stermole@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59367 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* support IO reconfig loop for OBUS DL link training failuresJoe McGill2018-06-1415-60/+446
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - p9c DD1.1+ only, DD1.0 not supported - FW to trigger reconfig loop back to step 0 from sys_proc_fab_iovalid if: 1) sys_proc_fab_iovalid rc = FAPI2_RC_SUCCESS -- AND -- 2) new output o_obus_dl_rcs (vector of P9_FAB_IOVALID_DL_NOT_TRAINED_ERR rc objects identifying links which failed on this chip) has entries - attribute changes: ATTR_LINK_TRAIN -- remove platinit tag, attr should init to zero (both even and odd), and reconfig loop will adjust value as we go CMVC-Prereq:1057645 Change-Id: I95eebd2b893db6d2511aae40798c0a4e049835d6 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59022 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59039 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fix unbalance FCO distribution between procsThi Tran2018-06-141-21/+70
| | | | | | | | | | | | | | | | | | | | | Current code doesn't take into account the case where an EX has no core under. In this scenario, the code skips the current proc and takes out the cores in the next proc. This leads to more cores taken out from the next proc if current proc has more EXs with no core. The fix is to look and take out the next available cores in current proc until no core available before move on to the next proc. Change-Id: I0e8650766c9f13c5616141b87e05967950d6fb56 CQ:SW424855 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/58460 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fix Bad Dq Centaur TranslationCaleb Palmer2018-06-141-7/+40
| | | | | | | | | | | | Change-Id: Id062c6088791987ef8975ab939be979064f68e2f CQ: SW431847 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60207 Reviewed-by: Brian J. Stegmiller <bjs@us.ibm.com> Reviewed-by: Benjamin J. Weisenbeck <bweisenb@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
* PRD: Fix core checkstop maskingBenjamin Weisenbeck2018-06-141-2/+4
| | | | | | | | | | | | | | Change-Id: Id47712240806db15d35217d9997af15448db2889 CQ: SW432632 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60253 Reviewed-by: Caleb N. Palmer <cnpalmer@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Brian J. Stegmiller <bjs@us.ibm.com> Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60517 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
* PRD: Cleanup RC handling in PLL codeBenjamin Weisenbeck2018-06-142-20/+20
| | | | | | | | | | | | Change-Id: If749f5ce6a4934ce6c52faced348c8165d320bef CQ: SW431060 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60394 Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60522 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
* PRD: enable FSP channel fail isolation on processor side of busZane Shelley2018-06-141-6/+0
| | | | | | | | | | | Change-Id: Ie8cbddc4b0b1987b4f57a9ca2a0816ad1883bbbb CQ: SW431530 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60410 Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60521 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
* PRD: add CE table traces for MNFG mode thresholdsZane Shelley2018-06-141-3/+10
| | | | | | | | | | | Change-Id: Ie0ee365b0eb9bc63cc782490eb433b2e8bb9260d Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60408 Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60520 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
* PRD: Callout both PCI clocks by position for double clock failureBenjamin Weisenbeck2018-06-144-24/+102
| | | | | | | | | | | | | Change-Id: I54b596ec49039f9bfd7df0f56a6f3ef1d2aea706 RTC: 193490 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60120 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Caleb N. Palmer <cnpalmer@us.ibm.com> Reviewed-by: Brian J. Stegmiller <bjs@us.ibm.com> Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60519 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
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