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* Add Memory Subsystem FIR supportBrian Silver2018-03-131-0/+17
| | | | | | | | | | | | | | | | | | | | | | | Add FIR.md to memory/docs Change some PHY workarounds, lab says hold off Add MC FIR to SBE code Change-Id: I1e69145f4d393d9185b93462ac42bbc9570983ad Original-Change-Id: I904079ab84d978637dd2b3e638c90d59395019fd Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33060 Dev-Ready: Brian R. Silver <bsilver@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55443 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Adding in defect HW395947,HW930007 to INT initfilesJenny Huynh2018-03-131-1/+72
| | | | | | | | | | | | | | | Change-Id: I2c3aab505b125e07d35071f824aff0ce1157bb0d Original-Change-Id: Iff8bed55ac363c8bd881fcc06f9cd3cd40261e15 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33369 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: DAVID M. KAUER <dmkauer@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55442 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add EC workaround for PHY training bad bit processingBrian Silver2018-03-131-1/+20
| | | | | | | | | | | | | | | | | | | | Change-Id: I0860f6cee709b81c455d219b04c1466272cbb7de Original-Change-Id: Ia23b7bb80ae0875c869104b0557e7758d4df80a5 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33465 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Dev-Ready: Brian R. Silver <bsilver@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Brian R. Silver <bsilver@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55441 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* scan inits for lab workaround for DI bug HW392781Shelton Leung2018-03-131-0/+17
| | | | | | | | | | | | | | | Change-Id: I89be74beb51ca7ea4cd3a1fdf86b5d2727f30503 Original-Change-Id: Ia71c4d0933112c6804774b76a08ec5fbbe254833 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32780 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55440 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* p9_sbe_lpc_init fix with GPIO resetCHRISTINA L. GRAVES2018-03-131-0/+16
| | | | | | | | | | | | | | Change-Id: I408f12ed6fcf46ab42d700547e7a91a674968b5f Original-Change-Id: I019d7ba16b4e39b5cf140fe1461218736ce329f5 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32199 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55439 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Adding workaround for HW930007 and HW386013Jenny Huynh2018-03-131-0/+18
| | | | | | | | | | | | | | | | | Change-Id: Ia2904b70db3e247343cea6c9db65325d6368f675 Original-Change-Id: I934d63af496da2789ab69d857afe36cb1657175c Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31500 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: DANIEL C. HOWE <dchowe@us.ibm.com> Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55438 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Istep4: Enable poll for DPLL lock in p9_hcd_cache_dpll_setupYue Du2018-03-131-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | changes in this commit: 1) enable dpll lock checking in non-sim envrionment 2) change FAPI_DBG lines on set/reset sdis_n ops as removing prints saying they are DD1 only workaround due to they are permenant steps now 3) add missing content of p9_hcd_core_dcc_skewadjust 4) add DD2 sram_enable support (NOOP for DD1) Change-Id: Ib03fa31f7ecc3eb2038a0342f89cb57db29d33b2 Original-Change-Id: I74fc3b05781e7cd13bb8c95b0dc7389029d7c5af Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31719 Reviewed-by: Joseph E. Dery <dery@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Reviewed-by: CHRISTOPHER M. RIEDL <cmriedl@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55437 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add EC feature levels to MSS workaroundsBrian Silver2018-03-131-12/+140
| | | | | | | | | | | | | | | | | Change-Id: I5a4c64e7a0ff61e4712a9efecab9291e29044170 Original-Change-Id: Iec6db88808f26353ce88f9038222db12f2d9b6c0 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32421 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55436 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* p9_psi_init -- parametrize link speed (half/full)Joe McGill2018-03-131-0/+18
| | | | | | | | | | | | | | | | | | | | Wrapper tested on zzfp033 Appears to correctly trigger half speed mode from FSP tool feedback $ cat /sys/devices/psi_link0/clock FSP-2, PSI(0) CLK overwrite: 1 Speed: 166 MHz Change-Id: Id03e7fd54a3eff8037ac677399472dbd8a89d1a1 Original-Change-Id: I45997c30e71457ceedfcba70550f0e6d98584a1e Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31497 Dev-Ready: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Kevin F. Reick <reick@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55435 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* PPM reg collision (HW389511) work-around: Special Wake-upChristopher Riedl2018-03-131-0/+17
| | | | | | | | | | | | | | | | | | | | - fixed screwed-up/duplicate commits - addressed code review comments and implemented FAPI_ASSERT conditions for the error case(s) Change-Id: Ie0ff20f2a9a5ed2d6cf9dc9ce797a14b0280a8f0 Original-Change-Id: I706b3247f0f9c3ea241ae2841fbce456577c78b6 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31379 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55434 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* p9.fbc.scan.initfile -- create initfile, add workaround for HW376651Joe McGill2018-03-131-0/+18
| | | | | | | | | | | | | | | | | Change-Id: I8203ea499195a1231d022233ef1f1a115a2b29c7 Original-Change-Id: Iaccfdf902d179819549f46ddee65631873fa023e Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31309 Reviewed-by: DANIEL C. HOWE <dchowe@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55433 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* HW388878 VCS workaroundJoe McGill2018-03-131-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | In pre-poweron HWP, Reset ROOT CTRL and PERV CTRL regs to cold IPL state Tested with poweron flow which: drops all rails (preserving Vstandby) executes pre-poweron HWP to reset cfam region regs enables rails (excluding VCS) executes cfam pop start sequence enables VCS rail Add defect number to feature attribute, used in all consumer HWPs Change-Id: I4575cd9de5bf0f6c933b8695de3f77e866156bb0 Original-Change-Id: I5bf5d61033bdca97527c8b499995eb6920ac1122 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31101 Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Dev-Ready: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55432 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Cache HWP: DD1 VCS WorkaroundYue Du2018-03-131-0/+18
| | | | | | | | | | | | | | | | Change-Id: If85a64ccd6de8872578e17a5669633ceb688a281 Original-Change-Id: I9634a767878904f810cb1e6a0767ba4bbad241cb Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30827 Reviewed-by: Joachim Fenkes <fenkes@de.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: James N. Klazynski <jklazyns@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55431 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Change chip to unsecure always for DD1 chipsSoma BhanuTej2018-03-131-0/+18
| | | | | | | | | | | | | | | | | Change-Id: Ic3380115d4beb6aa0ddd584cbeac53f561330021 Original-Change-Id: I73e2aace7ad9a56bfd528b4b2d82741148df971f RTC:158131 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30952 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55430 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* DD2 updates:p9_sbe_arrayinit,p9_sbe_tp_arrayinitAnusha Reddy Rangareddygari2018-03-131-19/+1
| | | | | | | | | | | | | | | | | | | | | set/reset of dis_n are permanent steps CQ : HW389256 Change-Id: I86d54da49c750553feccf1cb4bfe14d024dfb24c Original-Change-Id: I70022293b7d375f94166a90127c8980038cd08e1 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30872 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Reviewed-by: Tobias Webel <webel@de.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55429 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Procedures modified for DD1 changesSunil.Kumar2018-03-131-0/+17
| | | | | | | | | | | | | | | | Change-Id: I17510d3430f17ac782e0a23df7d8a887025437cf Original-Change-Id: Iaff301338637dac67457330698fa85383012186d Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27973 Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55428 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Ec_level attribute support for DD1 attributesAnusha Reddy Rangareddygari2018-03-131-0/+73
| | | | | | | | | | | | | | | | | --Fixig hb_temp_defaults.xml Change-Id: Ib0c5a588333e4273e10b36f1d0bde3c271797e6a Original-Change-Id: Iab140154483b10bd05a6dba092dad25f64eae742 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/26450 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com> Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55427 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add p9_proc_gettracearray procedureJoachim Fenkes2018-03-131-1/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Generic procedure to dump a trace array. The API is similar to the P8 procedure, but the procedure takes trace _bus_ IDs as opposed to trace _array_ IDs and uses these to check the trace array's primary trace MUXes prior to dumping. There is also a flag to skip this check if you want to dump a specific trace array no matter which bus is muxed into it. The FAPI2 target supplied must match the trace array; most will just need a TARGET_TYPE_PROC_CHIP target, but some are targeted at OBUS, MCBIST, EX or CORE granularity. There's an inline function proc_gettracearray_target_type() that will help determine the target type. Change-Id: Ied7602b05a7441e4d2610b96ea77026d7a40b3c7 Original-Change-Id: I093cd03bc90fbe93ed8fff3d18cd0676359fa5d1 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22847 Dev-Ready: Joachim Fenkes <fenkes@de.ibm.com> Tested-by: Jenkins Server Tested-by: PPE CI Tested-by: Hostboot CI Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55426 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Procedure crashes when trying to query an EC featureRichard J. Knight2018-03-131-0/+76
| | | | | | | | | | | | | | | | | | | | | | -Updated queryEcFeature to have two parts, base attribute reading is now in a library, while feature checking logic is now in small individual inline functions. Change-Id: Ie4c0f7d088624d4e444457fd795bed1ce2ba95d1 Original-Change-Id: I4c3685d6a85946297af31f7f3da4d918bca88039 RTC:151184 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23025 Tested-by: Jenkins Server Tested-by: PPE CI Tested-by: Hostboot CI Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55425 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Remirror chip_ec_attributes.xmlDan Crowell2018-03-132-7150/+4
| | | | | | | | Change-Id: I15738ac513ee440514698593dab0096999a06f32 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55424 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Only call PNOR::init() on systems with BMCMatt Derksen2018-03-121-9/+14
| | | | | | | | | | | | | Code to fix SW412798 forgot to check for non-fsp systems. FSP systems will return an error. 0 size FIRDATA section. Change-Id: Ic2c2c49707d49b29cc38358ef6ab9dd372e8ffab Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55373 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> CI-Ready: William G. Hoffa <wghoffa@us.ibm.com> Tested-by: William G. Hoffa <wghoffa@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Check the Section Headers in Non-Secure ModeIlya Smirnov2018-03-126-39/+100
| | | | | | | | | | | | | | | | | | | | | When a PNOR section without a header is flashed onto a system that doesn't have SECUREBOOT compiled in, no header checks are performed, but the code still acts as if the header is present, and so the virtual address of the section is set to point past the secure header, which is 0x1000 into the section image, which causes all kinds of issues. This change adds logic to check the headers even when Secure Boot features are compiled out. Change-Id: Ieece371014192f160273939a35cb175aef0ddb25 Resolves: #126 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54831 Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* No longer include BAR attributes in ServerWiz2 exportDan Crowell2018-03-121-0/+14
| | | | | | | | | | | | | | | | | | All of the BAR (Base Address Register) attributes are set based on an architected memory map. There is no reason to allow the MRW to modify these values. Change-Id: Ib4a8211a2251acfb66f786025ce7b3cd002d8331 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53863 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Wait for responses from all nodes for IPC_POPULATE_ATTRIBUTES msgRichard J. Knight2018-03-121-6/+10
| | | | | | | | | | | | | | | | | | | -In the message handling for IPC_POPULATE_ATTRIBUTES the master node should wait for a response from all messages, the current code only waits for a single response. The change in this commit adds a loop to capture a response from each message sent. Change-Id: Iec3d3f666a3f00e01b850a822674d3f479f8bc89 RTC:189354 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55249 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Richard Ward <rward15@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Secure Boot: Dynamically set TPM I2C master path in MRW parserNick Bofferding2018-03-121-1/+101
| | | | | | | | | | | | | | | | | | | | | | | | | | Historically the TPM target as described in the MRW passes directly through to the Hostboot targeting model without modification (other than filtering out unwanted attributes). This approach does not work in multi-TPM or multi-node systems since the TPM object's I2C master path gets cloned within and across nodes. Instead, for multi-node systems, the MRW parser must now walk the I2C bus connections between each TPM and the chip driving it, and dynamically compute/set the TPM's I2C master path. This behavior only activates for multi-TPM systems due to limitations in other workbooks, as in these cases, the pre-existing behavior sufficies. Change-Id: I5845760a390841d083dc0bbe633bc19a90ab23e6 RTC: 184515 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55240 CI-Ready: Nicholas E. Bofferding <bofferdn@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Santosh S. Puranik <santosh.puranik@in.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: ILYA SMIRNOV <ismirno@us.ibm.com> Reviewed-by: Marshall J. Wilks <mjwilks@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Created individual update flags for both SEEPROM 0 and SEEPROM 1Roland Veloz2018-03-122-8/+20
| | | | | | | | | | | | | | | | | | I created individual update flags for both SEEPROM 0 and SEEPROM 1 to better target which seeprom to update. Now SEEPROM 0 or SEEPROM 1 or both can be singled out for update(s). Change-Id: I91f1b66f6a1f2e42d37173fb9e21f87e440d3a21 RTC: 189218 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55173 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Secure Boot: Check integrity of dynamically sized secure header copiesNick Bofferding2018-03-123-39/+141
| | | | | | | | | | | | | | | | | | | | When reading a secure header, the container header object can overrun a buffer when number of ECIDs or software keys specified is greater than the supported amount. This change implements hard enforcement to ensure that this is no longer possible. Change-Id: Ife9194763f858b37e2de6f12fa01d74da1145df3 CQ: SW419735 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55088 CI-Ready: Nicholas E. Bofferding <bofferdn@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: ILYA SMIRNOV <ismirno@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Marshall J. Wilks <mjwilks@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Do not elevate severity of reconfig error logDan Crowell2018-03-121-4/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The code as currently written will elevate the severity of any log that is used to terminate the hostboot ipl. In most cases this is the correct behavior as we always want a visible log. However, there are cases where hostboot terminates for the sole purpose of triggering a reconfig loop via the FSP in order to recover from a recoverable hardware issue. In this case the log shouldn't be visible since we don't want the customer to take any actions. The fix is to add a little bit of logic to differentiate these two scenarios to control the severity setting. Change-Id: I7253aec8c28a40c5cdebf4933ceccbecd119b9f4 CQ: SW420495 Backport: yes Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55379 CI-Ready: Nicholas E. Bofferding <bofferdn@us.ibm.com> CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Marshall J. Wilks <mjwilks@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Fixed MNFG Attribute handing for TCE CorrectionsMatthew Hickman2018-03-111-3/+4
| | | | | | | | | | | | | | | | | | Change-Id: I125bfbcb025b24a771d8c899d9045677878e064f CQ: SW419525 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55198 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Dev-Ready: STEPHEN GLANCY <sglancy@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55208 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fix EID range for HBRT logsDan Crowell2018-03-091-0/+1
| | | | | | | | | | | | | | Add back in the lost 0x89 subsystem specifier to the HBRT error logs. Change-Id: Idf9a5a90e79137df3745e5a3d387255e5c87f715 CQ: SW420482 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55364 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* PRD: extra FFDC for NPU0FIRZane Shelley2018-03-095-63/+640
| | | | | | | | | | | | | | | | Change-Id: I3782e674a0ca23d179f2f5def5489faa39040275 CQ: SW420231 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55300 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Benjamin J. Weisenbeck <bweisenb@us.ibm.com> Reviewed-by: Brian J. Stegmiller <bjs@us.ibm.com> Reviewed-by: Caleb N. Palmer <cnpalmer@us.ibm.com> Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55354 CI-Ready: Zane C. Shelley <zshelle@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
* PRD: DMD address translation bug.Zane Shelley2018-03-092-4/+8
| | | | | | | | | | | | | | | | | | | | First issue is that page garding is completely broken because we were using the wrong fields for the bank and bank group. Second issue is for MCAs that only have one DIMM plugged and that DIMM only has one rank of memory. In this case, rank/DIMM/port deallocation will deconfigure a range that is twice as big as the actual range. Change-Id: Ieb615260fe7ba6adb6a68ce3d4e3e24076351e72 CQ: SW419378 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55221 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Benjamin J. Weisenbeck <bweisenb@us.ibm.com> Reviewed-by: Caleb N. Palmer <cnpalmer@us.ibm.com> Reviewed-by: Brian J. Stegmiller <bjs@us.ibm.com> Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55360 CI-Ready: Zane C. Shelley <zshelle@us.ibm.com>
* MDIA: Cut mdia patterns from 9 to 4Caleb Palmer2018-03-091-4/+7
| | | | | | | | | | | | | Change-Id: I123bfb91b7a25364fd00c7902d2c50e537011efa CQ: SW418730 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54801 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Benjamin J. Weisenbeck <bweisenb@us.ibm.com> Reviewed-by: Brian J. Stegmiller <bjs@us.ibm.com> Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
* Removing old TODO for dropped requirementDan Crowell2018-03-081-4/+2
| | | | | | | | | | | | | We are going to live with the workaround we've had in place for several years now. Change-Id: I7966f517cac2d820dc086c163a7985112e2d0fa3 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53465 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Adds power control access functions for NVDIMMStephen Glancy2018-03-082-6/+199
| | | | | | | | | | | | | | | | Change-Id: Id72258da03e1e54a6edf2995a50dd25b3ede9a14 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55061 Reviewed-by: Louis Stermole <stermole@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55153 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* reduce number of non-zero npu error collection registersRyan Black2018-03-081-0/+204
| | | | | | | | | | | | | | | | Change-Id: Ib11f19abd7ceb68dfc0f7bd6977cee472f974d81 CQ: HW441288 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55236 Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Camille R. Mann <camille@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55254 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Remove mss::c_str dependency for SPD decoder for future reuseAndre Marin2018-03-0817-290/+303
| | | | | | | | | | | | | | | | | | | | | mss::c_str is attribute dependent on p9 nimbus attributes. In order to reuse this decoder going forward (Cumulus, Axone, etc) we need to remove this dependency by using fapi2::toString as an alternative for trace printouts. Updated SPD folder backup. Change-Id: I7b3f6e2fe2351519760c2fe54c66967052706671 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54550 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Dev-Ready: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54958 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* HW439321 - Disable CRC Performance DegradationLennard Streat2018-03-081-32/+0
| | | | | | | | | | | | | | | | Change-Id: I87a6aec506fea47592d395abf9b299f1ca697731 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54846 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Reviewed-by: Marc Gollub <gollub@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54859 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Force 25G Nvlink speed on P9N DD2.1Dean Sanner2018-03-082-2/+39
| | | | | | | | | | | | | | | | | | | | | Normally the OBUS PLL frequency is controlled via the MRW, however P9NDD2.1 has a bug that forces the OBus freq to 25G. Desire is to allow the MRW to set to a higher freq, but MRW doesn't have entries for per chip EC, so this commit just handles down leveling P9N DD2.1 (as a chip restriction) Change-Id: I542f7810a69facb919cc3889ae3ed5ca0a233445 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55195 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> CI-Ready: Dean Sanner <dsanner@us.ibm.com> CI-Ready: Corey V. Swenson <cswenson@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: ERICH J. HAUPTLI <ejhauptl@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* ATTR_PBAX_GROUPID: add global tagPrachi Gupta2018-03-082-1/+9
| | | | | | | | | | | | | | | | | | | | | | PBAX_GROUPID is a proc level attr that needs to be incrememnted per node. The only way to set this correctly in MRW is to add a global tag. However, making it global may break other systems as the global value in their respective MRW won't be set. It will be set on proc_socket level. Therefore, added a check to only copy global values if they are not empty (aka someone must explicitly set the global value for us to use those values). Change-Id: I3055d8296c010f996d98d7578a9adee5b763d316 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55257 Reviewed-by: Santosh S. Puranik <santosh.puranik@in.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Changes to Inband SCOM MMIO ranges for CumulusCorey Swenson2018-03-087-120/+326
| | | | | | | | | | | | | | | | | | - Add function to compress SCOM address - Old MCS target is now DMI - Add istep12 call to enable inband SCOMs - Set each DMI offset attribute in processMrw Change-Id: If5171f8da6c58404ac598047ca0177aead048771 RTC:147272 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54574 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* enforce strict 512 GB per socket limit on Witherspoon memory map (part2)Joe McGill2018-03-072-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | first commit merged before HW testing was complete, and caused issue with skiboot's detection of the MCD workaround mechanism this update restores the chip address extension HW programming to 0x7, (to avoid a coreq skiboot change) but should still restrict the allocation to lie within the first 512 GB of address space on each socket Change-Id: Ie844a609c16ffa1aa38091bae42145da9c7912a4 CQ: SW415901 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53594 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53641 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* PM: Added support for HWP p9_pm_callout.Prem Shanker Jha2018-03-072-8/+373
| | | | | | | | | | | | | | | | | | | | | | | | | | In case of PM Malfunction Alert, HBRT invokes PRD by setting bit OCC LFIR[stop_recovery_notify_prd] after collecting STOP Recovery FFDC. In response to FIR bit, PRD calls p9_pm_callout. It returns to PRD a bit vector which represent all the cores considered dead by PHYP due to PM malfunction. This commit accomplishes level2 implementation of p9_pm_callout. Key_Cronus_Test=PM_REGRESS HW-Image-Prereq: Ieb0bceeb141cc80b18f63b01e881e5ad3b50263d CQ: SW416531 Change-Id: I4b7c3e1e250fc779d5c1de2037131c62fba41e85 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50008 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52537 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* STOP: Support Suspend Entry/Exit and Fix Pig CollisionYue Du2018-03-071-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | 1) also cleanup todos in Stop Hcode 2) make STOP3 complete trans in SSH Key_Cronus_Test=PM_REGRESS Change-Id: I28a146e15e455f09f8d8ff588e122d5ecf34110a CQ: SW416550 CQ: HW437955 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54660 Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: RAHUL BATRA <rbatra@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54666 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* HW439321 - Trusty Birthday Alternative WorkaroundLennard Streat2018-03-072-7/+7
| | | | | | | | | | | | | | | | | | | Change-Id: Ied12567ab7fb600c5685fa81f73c0eb3df83bc4b CQ:HW439829 CQ:HW439321 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54651 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Dev-Ready: LENNARD G. STREAT <lstreat@us.ibm.com> Reviewed-by: John G. Rell III <jgrell@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Marc Gollub <gollub@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54662 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* resolve Zeppelin DMI channel framelock issuesJoe McGill2018-03-071-2/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | p9_sbe_chiplet_reset p9c_mc_scom resolve HW CQ 418671 set MC CPLT_CONF1 FASTX2 ratio controls in p9_sbe_chiplet_reset need to set prior to MC chiplet clock start for proper functional operation remove from initfile p9_cen_framelock resolve HW CQ 418901 analyze captured FRTL value along with FRTL counter overflow error FIR centaur.mcs.scan.initfile cen_scominits enable MBI trace array prior to framelock, to make usable for future debug Update p9c.mc.initfile to include fix for ZCAL to help with conflicts - bgass Change-Id: Id7d722122de6f570f012f46d618b21f29532c087 Original-Change-Id: I7897d41250b9c113adf22fe40a8ca5971bca2a6f CQ: HW418671 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44708 Dev-Ready: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: LENNARD G. STREAT <lstreat@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55176 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fixed port fail SUE bug for DD2 modulesMatthew Hickman2018-03-071-2/+6
| | | | | | | | | | | | | | | | | | Change-Id: I8e1ab78c688684ceba1805277d1473c747248104 CQ: SW408973 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50166 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Dev-Ready: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54464 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fixed Maint IUE unmasked with mnfg flagsMatthew Hickman2018-03-071-3/+4
| | | | | | | | | | | | | | | | Change-Id: I33eb20071e2b694bdaac9e1d625a08138ecfa360 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53319 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53497 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Remove PROC_FABRIC_LINK_ACTIVE from OBUS_FBC_ENABLED in p9.obus.scom.initfileBen Gass2018-03-071-4/+1
| | | | | | | | | | | | | | | | | | | | This is used to shorten the timers for training in simulation (only). ATTR_PROC_FABRIC_LINK_ACTIVE is not set during p9_obus_scominit in step 10 so remove it from the definition. Change-Id: Icf3ca18779b339d2d2dab56186f182844370f1df Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52656 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: John G. Rell III <jgrell@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52666 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Removes overrideonly in a broadcast mode MRW attributeStephen Glancy2018-03-071-1/+0
| | | | | | | | | | | | | | | | | Change-Id: I5fde81349fcf147bbb17b4e041cb355362c9bbea CQ:SW418027 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54388 Reviewed-by: ANUWAT SAETOW <asaetow@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54399 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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