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* Update FBC cd_hp initfile to reference serial mode spys directlydchowe2018-03-131-0/+18
| | | | | | | | | | | | | | | | | Change-Id: I6aeda66916e31f84d0da913e2c961c094a95efbb Original-Change-Id: I7672defe7313413867199a9c486faf3d04e9ebd3 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42857 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55543 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* PSTATE_PARAMETER_BLOCK structure alignment and error handlingPrasad Bg Ranganath2018-03-131-0/+17
| | | | | | | | | | | | | | | | | | - Add VDM EC attribute to generally disable VDMs on Nimbus DD1 Change-Id: Ie9abb25033c514456cf93fa9fc23c873aa2553bc Original-Change-Id: I7743bbff9c8f975074068d760373b8b9b8294d32 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42714 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Adam S. Hale <adam.samuel.hale@ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55542 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Disabling LVext for all P9 partsLuke C. Murray2018-03-131-18/+0
| | | | | | | | | | | | | | | | | | | LVext is removed in P10, so it was decided to remove LVext for all of P9 rather than add and then take back. Change-Id: I3a0acfc4ed65a50205a11c62d935c93613c9f6f2 Original-Change-Id: I51d76174de5eaa91f442e59083afa74b3bd81d37 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42823 Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55541 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* p9.npu.scom.initfile -- Nimbus DD2 updatesJoe McGill2018-03-131-18/+0
| | | | | | | | | | | | | | | | | | | | mask NPU.IDIAL_SM_MASK_NLGX_0 for all ECs set NPU.CONFIG_DISABLE_VG_NOT_SYS for all ECs Change-Id: Ia6a3b753f4aba83446361d3573f73c3d241df85a Original-Change-Id: Ief91a75430932f01d643cadee60f3d707e1ea048 CQ: HW413726 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42691 Reviewed-by: RYAN BLACK <rblack@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55540 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Cumulus proc updatesAnusha Reddy Rangareddygari2018-03-131-2/+3
| | | | | | | | | | | | | | | | | | for osc switch settings Change-Id: I3cd8f2c5be26e93f86dd0909e0e218afb31f9dae Original-Change-Id: I9e762d2c4b552e84a3a2cc48ec0d9d75732b07cf Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41676 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55539 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* p9.pci.scan.initfile -- initial releaseJoe McGill2018-03-131-0/+16
| | | | | | | | | | | | | | | | | Change-Id: I9cd80b7ae61aa6bf0da05ddb9c065281b55c1690 Original-Change-Id: Ibcb861641ff420ecdb763fde2db4577037b64f03 CQ: HW399276 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42774 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Dev-Ready: Ricardo Mata <ricmata@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55538 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* DD2 updated scan overrides, Cumulus DD1 initfile updatesdchowe2018-03-131-0/+25
| | | | | | | | | | | | | | | | | | Change-Id: Ic05e0d6e494e56a94a761e085662d36ee525c866 Original-Change-Id: I1b66fdf7786a2358b304b6b3d5bbc6b92d06e4e1 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42380 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: DANIEL C. HOWE <dchowe@us.ibm.com> Dev-Ready: Brent Wieman <bwieman@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55537 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add WAs for HW413799 HW413853 HW413917 HW414249 HW414375 HW414871 HW414829Nick Klazynski2018-03-131-0/+119
| | | | | | | | | | | | | | | | | - Commented out HW413853 until we get risk level working for DD2 Change-Id: I7c581f4714f64ca1e489fdbf2bd308fef4b36e3d Original-Change-Id: Ia07c08032e75fd295b2275e1785cbe47db381a64 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42515 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55536 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Adding HW414702 workaround to INT scan initfilesJenny Huynh2018-03-131-0/+18
| | | | | | | | | | | | | | | | | Change-Id: I4ee7ee74a5648d0d117c2438ed661e93fd3061a0 Original-Change-Id: I107ae828c1a7c4fc56a4ec520f05fff00560adb5 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42402 Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: DAVID M. KAUER <dmkauer@us.ibm.com> Reviewed-by: Kahn C. Evans <kahnevan@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55535 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* PCIe updates for Nimbus DD2 GEN4 operationJoe McGill2018-03-131-0/+18
| | | | | | | | | | | | | | | | | | | | adjust REFISRC, REFISINK, VBGENDOC in PCIE PLL inits for all ECs set EDMOD in RX VGA Control Register 1 for DD2 only Change-Id: I2944edbba2ac7121f0ee0e57b3667d0de3215506 Original-Change-Id: Ib10b02fb49dbf7ccf8dcad2ada5ac463a927d4c7 CQ: HW414759 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42423 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Ricardo Mata <ricmata@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55534 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* p9.core.scan.initfile -- set disable 241 for Nimbus DD2Joe McGill2018-03-131-3/+3
| | | | | | | | | | | | | | | | | | Change-Id: I2c797802fcf06402f2754249cbed6e20276f8ccd Original-Change-Id: Icb27247b318b612664c25f1121a8f80a5feb014c CQ: HW413718 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42425 Reviewed-by: Kevin F. Reick <reick@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: James N. Klazynski <jklazyns@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55533 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fixed DLL workarounds to always runStephen Glancy2018-03-131-17/+0
| | | | | | | | | | | | | | | | | | | | | | | DLL workarounds will not be fixed in hardware, in the foreseeable future. As such, always run the workarounds. Change-Id: I735a6c94222a931a7395d880ab11fcb644bfcaf2 Original-Change-Id: Iaa48b1b976908fdbb8af1eb8d518147fabc8cdce Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41998 Reviewed-by: LUCAS W. MULKEY <lwmulkey@us.ibm.com> Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Dev-Ready: STEPHEN GLANCY <sglancy@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55532 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Workarounds for HW407385 HW408629 HW410389 HW408901Nick Klazynski2018-03-131-0/+68
| | | | | | | | | | | | | | | Change-Id: Ia65dbc4926a058dc58faa1c6e63f069b1b688ec0 Original-Change-Id: Ibede50b260275ce35703a411d6f622e444b1ed4a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41890 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55531 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* L3 Initfile: Qualify divide_minor settingAlex Taft2018-03-131-0/+17
| | | | | | | | | | | | | | | | | | | | L3_REF_TIMER_DIVIDE_MINOR needs to be left at default value of Divide by 10 for DD1.X, DD2.0 due to bug Change-Id: I968835bd53776a2d51d263fa2d7da4a36129849f Original-Change-Id: I9bfbf243ecf854c2375e852f60d0bcb47812fe87 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41893 Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: LUKE MURRAY <murrayl@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55530 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* dd2 phy scom initsShelton Leung2018-03-131-0/+17
| | | | | | | | | | | | | | | | | | | Change-Id: Ied68fb7343087fbfe3edd639ece47417167981f1 Original-Change-Id: Icb3b25a75b71e40135237c784ac584ec54516d2e Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41849 Dev-Ready: SHELTON LEUNG <sleung@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Kahn C. Evans <kahnevan@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55529 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Use obus p9ndd1 spy name attribute for obus initfileBen Gass2018-03-131-0/+17
| | | | | | | | | | | | | | | | | Change-Id: I014e8616e5151cf4cb5cde51841a9f663e92ed8d Original-Change-Id: I0b51976c6ee4094825128a30dca042e37ccfe3e3 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41880 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55528 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add core workaround for HW407136Nick Klazynski2018-03-131-17/+17
| | | | | | | | | | | | | | | | | | | Remove ATTR for HW396388; EN_ATTN is needed for all chips Mask PC_OTHER_CORE_CHIPLET_SYS_XSTOP_ERROR for SW390012 Change-Id: I4f5ad10bcaedbffd55dc3a6cd3ae5c4e15b2ad11 Original-Change-Id: I70280ca7dfdd22ee88780c8cf76444283d1a4213 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41646 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Kevin F. Reick <reick@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55527 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Disable mem clk stop when in STR for DD2.* onlyAndre Marin2018-03-131-0/+17
| | | | | | | | | | | | | | | | | Change-Id: I9ba4b4cb4c43b7860b5be2930db1f6b5f90e3a74 Original-Change-Id: Ieeea636a6f0d62344f72d339a52c4a1b862fa258 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41459 Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Michael D. Pardeik <pardeik@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55526 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* L3 update -- p9_pcie_configJoe McGill2018-03-131-0/+17
| | | | | | | | | | | | | | | | | | | | | update owner comments address remaining todo items define constants to replace hardcoded bit definitions cleanup trace messages Change-Id: I8885f82aae43f6ce627e16e869788ec5a4dd8e12 Original-Change-Id: Ibc075046d4494d3ec5bf85780ee58c919c6b68a2 CQ: HW363246 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41116 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55525 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* PM: refine enablement attributes for advanced functions (VDM,RESCLK,WOF,IVRM)Greg Still2018-03-131-2/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Move to a "disable feature" attribute paradigm for SYSTEM control - Add consistent system enablement (eg Cronus, MRW) control attributes - Added HWP attributes to allow p9_pstate_parameter_block to indicate validation status to p9_hcode_image_build for Hcode header updates - Mark attributes as deprecated for future removal - Added HB system defaults to auto enable RESCLK, VDM and WOF. IVRM is disabled. - RESCLK only has override attributes so will enable function once code that looks the attributes is in a driver - VDM enablement forces the need for #W to be there and valid. Valid will be if #W is all zero, disable VDMs; if any of #W is non-zerom, failing validity checks (non-decreasing VID Compares) will fail the IPL. - WOF enablement needs IQ to fill out the OCC parameter block. If not present, WOF is disabled. Longer term (future commit), RESCLKs and VDMs will also gate WOF but not for early development and testing. - Add a Chip EC attribute to discern the DD levels that WOF is supported - Move to IVRM vs IVRMS - Made all *ENABLED HWP attributes PROC_CHIP in scope to avoid collisions from multiple chip targets - Made all HWP attributes writeable - Deprecate (preped rename) an HWP attribute - Added throttle control attributes Change-Id: I527b67c7b3111da6313c22c0af558c23e71da7bf Original-Change-Id: I5e56a36a9e2a4b3e6964ed66ff5c1013be26ed33 RTC: 173673 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40063 Dev-Ready: Gregory S. Still <stillgs@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: CHRISTOPHER M. RIEDL <cmriedl@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55524 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Undo some p9 Cumulus spy workarounds in initfilesThi Tran2018-03-131-18/+0
| | | | | | | | | | | | | | | | | Change-Id: I0b768f7fa44751fbf7867b2e03ea454b220377b3 Original-Change-Id: I961ec9e52962b1d5e1295e484922095acd6697a8 RTC:174656 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41234 Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55523 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Cumulus initfile update for OBUS & XBUS PLLsSoma BhanuTej2018-03-131-0/+18
| | | | | | | | | | | | | | | | Change-Id: Iea4f597ee6d58d8fc5d700bbc1273a69d77fc995 Original-Change-Id: I81e288c9160036bb3768c9172e860293f325a8d3 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41099 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55522 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* adjusted mem 2400 nest 1600 workaround and make dd1 onlyShelton Leung2018-03-131-0/+17
| | | | | | | | | | | | | | | | | | Change-Id: I23f74b4c525ac37460f5fb1a7b8fff16863ae314 Original-Change-Id: Iabf4b8a03eb2ae6c97ed2b6c96a0f6eed190fba6 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41128 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Dev-Ready: SHELTON LEUNG <sleung@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55521 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* P9 Cumulus InitCompiler supportis - Part 3Thi Tran2018-03-131-4/+5
| | | | | | | | | | | | | | | | | | | | | - Update *.mk files to support p9c chip ID - Workaround some spy issues p9c 10 engd issues - Fix bug to allow compilation without ENGD Change-Id: I9ba7057ddf5271a633bb87d8aa4df3a4b572d153 Original-Change-Id: Ie94b55c93081108668725d3ee9b88bd34eaa794f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40904 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55520 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* future proof EC feature attributes, add missing P9N DD2 initsJoe McGill2018-03-131-153/+130
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | redefine EC feature attributes, using inverse logic where required, to qualify inits specific to P9N DD1 where possible, to eliminate need for updates for future chips in plan attempt to remove usage of generic P9N_DD1_SPY_NAMES and P9N_DD2_SPY_NAMES attributes added to support initial P9NDD2 engineering data -- several spies were not being set as a result ----------------- initfile updates: ----------------- p9.cme.scan.initfile add HW391162, SCAN_SICR_TLBIE_QUIESCE feature attributes p9.core.common.scan.initfile remove fused core init, it was applying scan default for P9N DD1 and is not needed for P9N DD2+ given fuse controls p9.core.scan.initfile add CORE_P9NDD1 to qualify P9N DD1 specific register hierarchy and dial programming replace usage of P9N_DD1_SPY_NAMES, P9N_DD2_SPY_NAMES using CORE_P9NDD1 and inverse, to pick up initial pass at P9C DD1 inits p9.cxa.scom.initfile add CXA_P9NDD1_SPY_NAMES to qualify P9N DD1 specific register hierarchy p9.ddrphy.scom.initfile add DDRPHY_P9NDD1_SPY_NAMES to qualify P9N DD1 specific register hierarchy p9.dpll.scan.initfile remove POSTDD1N_DPLL_SETTINGS feature attribute, use DD1_DPLL_SETTINGS attribute and inverse to drive inits p9.l2.scan.initfile invert definition of OPTIMAL_LARX_STCX_PERF, HW409069 feature attributes p9.l3.scan.initfile p9.l3.scom.initifle remove OPTIMAL_LCO_SCOM, HW396230_SCOM feature attributes use HW386657, HW396230 attributes to drive inits p9.mca.scom.initfile add MCA_P9NDD1_ASYNC to differentiate asynchronous boundary crossing programming and dial name differences between P9N DD1, P9N DD2 p9.mmu.scan.initfile p9.mmu.scom.initfile invert definition of NMMU_DMT_DD2, NMMU_ISS734_DD2_1 feature attributes p9.ncu.scan.initfile p9.ncu.scom.initifle remove HW396230_SCOM, use HW396230 attribute to drive inits p9.npu.scom.initfile remove usage of P9N_DD1_SPY_NAMES, refactor CONFIG_ENABLE_PBUS specification to work for both P9NDD1, P9NDD2 ENGD p9.obus.scan.initfile remove EC qualification of OBUS FIR mask for simulation sample.ec.scan.initfile remove testcase requiring use of P9N_DD1_SPY_NAMES, properties of testcase are covered by other tests ----------------- HWP updates: ----------------- p9_xip_customize add customization of epsilon attributes for NMMU application p9_chiplet_scominit invert definition of P9_NDL_IOVALID feature attribute remove usage of P9N_DD1_SPY_NAMES p9_npu_scominit replace usage of P9N_DD1_SPY_NAMES with SETUP_BARS_NPU_DD1_ADDR p9_sbe_tracearray invert definition of CORE_TRACE_SCOMABLE feature attribute p9_sim_get_nia remove usage of P9N_DD1_SPY_NAMES, directly process CT/EC attributes (ok as this HWP is used for VBU sim only and not consumed by FW) Change-Id: I3269e9945cb9ef04dfd597e9c6f40d5ac3f01b0d Original-Change-Id: I63bfe8a4bfb8824b94e35a3688a6c69eecc1cf01 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40911 Reviewed-by: SHELTON LEUNG <sleung@us.ibm.com> Reviewed-by: LUKE MURRAY <murrayl@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55519 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* jgr17050500 Added Centaur and DMI IO SCOM initfilesJohn Rell2018-03-131-0/+18
| | | | | | | | | | | | | | | | Change-Id: I7e036d07bbb94cee5ecbef7d2a332a6aa5fd13b2 Original-Change-Id: I66e57795b5f9ca8c39ed244c7590a31e0c4cd79f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40154 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55518 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Update core inits for DD2Nick Klazynski2018-03-131-5/+314
| | | | | | | | | | | | | | | | | | | | Added update for new eng data Added missing spys to enable LSU trace Change-Id: If3d64ae9d97725dd8de478a542f49876854fbf37 Original-Change-Id: Iaed4992c45668c3da7cc692a3ccd02f6d1a5920a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40380 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55517 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Updated memory DD1 vs DD2 attributeStephen Glancy2018-03-131-2/+2
| | | | | | | | | | | | | | | | | | Change-Id: If7395dc72ab91c14240037aa1f15d2e76e3bcd09 Original-Change-Id: Ie6d0f188a2ce94375535b0bf16c8ed1756558e5f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40632 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55516 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* L3 updates -- p9_build_smp, p9_fbc_utilsJoe McGill2018-03-131-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | p9_build_smp: constrain FFDC collection at 16 chips (current max size for P9 based systems) scrub node references, replace with group clarify X link requirements based on pump mode review and complete callouts p9_fbc_utils: add feature attribute to support pb_init sampling on NDD2+ replace locally defined bit constants with SCOM header file constants Change-Id: Icb2a2d4ab67a18537048ffef12203a1642efae06 Original-Change-Id: Ib1f71488ffd07580a647709d9227112f7d73384f CQ: HW328175 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40308 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: DHRUVARAJ SUBHASH CHANDRAN <dhruvaraj@in.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55515 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Adds DCD calibration control attributesStephen Glancy2018-03-131-0/+17
| | | | | | | | | | | | | | | | | | | Change-Id: Ifef1f631e84e2a46254968b844356e474ac0f8be Original-Change-Id: I2c3783eba2e5638e20136494ad897b420737566e Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40178 Dev-Ready: STEPHEN GLANCY <sglancy@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55514 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Initfile updates for FBC DD2dchowe2018-03-131-0/+18
| | | | | | | | | | | | | | | | | | | Change-Id: I4b5705afd3ebcf52b91d03e2955f56a966a5c1bb Original-Change-Id: I18bf87b49f9bfba577bfc55fdf3cadc1fe09849f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39973 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: DANIEL C. HOWE <dchowe@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Dev-Ready: Thi N. Tran <thi@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55513 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* p9.int.scan.initfile -- init PSIHB to LSI modeJoe McGill2018-03-131-0/+17
| | | | | | | | | | | | | | | | Change-Id: Icd106a42e65f07193cb885c75d7b3e20acf4907b Original-Change-Id: I4d6811161d975b51063ad7e29e6b13b0d18750a3 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39593 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55512 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Update INT DD2 initfilesDavid Kauer2018-03-131-0/+17
| | | | | | | | | | | | | | | | | Change-Id: I301a6d2abe76e351bb7d129bbc5f05e347fc6d92 Original-Change-Id: Ia99d0dc53d5e18fdea9f430f0ec64ac40afe4eca Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40232 Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55511 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Updates for P9 NX DD2 initfilesChris Hanudel2018-03-131-54/+72
| | | | | | | | | | | | | | | | | Change-Id: Ie2ffe09ce1427326f9c0c7732625fb536c7e89ea Original-Change-Id: I811890df85ad59929c2ace02f9fe09b9fa3feb90 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38549 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55510 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add DLL workaround and unit testsAndre Marin2018-03-131-54/+73
| | | | | | | | | | | | | | | | | | | Change-Id: I4f554e26cc96b30a8dbb132cbc56e1216069306d Original-Change-Id: I142ecd417abb92f4f8ec7d3748563b30359c486d Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39673 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Dev-Ready: ANDRE A. MARIN <aamarin@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55509 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* NMMU Nimbus dd2 scom/scan updates, updated commentsEmmanuel Sacristan2018-03-131-0/+82
| | | | | | | | | | | | | | | | | Change-Id: Ibfbc6652fba311f951ce8f43d607748891064df1 Original-Change-Id: I4b9296793fc8802f03bfebcb46446c8bc1a1d4e3 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39782 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55508 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Implementing Michael Floyds improvements.Michael Koch2018-03-131-4/+37
| | | | | | | | | | | | | | | | Change-Id: I98bc95095f71d9d795b37cfb0cfb5c37f959a0b4 Original-Change-Id: I719f5f2ab79755ec09f2420b6279569b0e05f3b2 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40148 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Anusha Reddy Rangareddygari <anusrang@in.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55507 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Added DQS alignment workaroundStephen Glancy2018-03-131-0/+19
| | | | | | | | | | | | | | | | | | Change-Id: I25b48abdb4952b486ed2f4b1828800ad6570514c Original-Change-Id: Id03b903b964ae088bd427e333d4620a3412ea23c Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39508 Dev-Ready: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55506 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* p9.xbus.pll.scan.initfile -- restore full frequency settings for Nimbus DD2+Joe McGill2018-03-131-0/+18
| | | | | | | | | | | | | | | | | Change-Id: I70370e6e39282167a5b9da970bf50c866f5861a8 Original-Change-Id: Ie19e0898f1b38087fc3fc95b9609c31152c7969a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39866 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Megan P. Nguyen <pmegan@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55505 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* dd2 initsShelton Leung2018-03-131-34/+103
| | | | | | | | | | | | | | | | | | | Change-Id: I9c0bdb4656551a5747038f557d1bc3a9d943ca13 Original-Change-Id: Ice48f5752dcf18926b07fdd35bcc124c984ae2c3 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39732 Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55504 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* derate NVLINK frequency for Nimbus DD1Joe McGill2018-03-131-0/+17
| | | | | | | | | | | | | | | | | | | | limit to 20gbs Change-Id: I06c1cdf12a3516fe19574d0b45418c6412b444c4 Original-Change-Id: Ie348a42f0a0c305012dc91453d384b18459a0545 CQ: SW387041 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39616 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55503 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Performance updates for HW409069Luke Murray2018-03-131-0/+25
| | | | | | | | | | | | | | | | | | Change-Id: I31f39c48fa5584a9a857c4ce57ea6a654bb93de9 Original-Change-Id: I29c153d700f4fb8809f34cdf3ebaba4d6c4aff2b Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39959 Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: ALEXANDER M. TAFT <amtaft@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55502 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Change RD_CTR workaround val and update attr nameJacob Harvey2018-03-131-8/+8
| | | | | | | | | | | | | | | | | | | | Change-Id: I1502ba89751c47828203fcbb93188e6643c310ec Original-Change-Id: I00b2cf9cb54fdc4ec54b8f75ae1b9e687d2d4549 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39649 Reviewed-by: ANUWAT SAETOW <asaetow@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Dev-Ready: JACOB L. HARVEY <jlharvey@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55501 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* L3 initfile updatesAlex Taft2018-03-131-17/+18
| | | | | | | | | | | | | | | | | | | | | | 1) L3_CERRS_LRU_DECR_PROB_SEL_CFG should be left at default value and not altered 3) HW375255 should be applied to all systems since rejected by ccb 4) rddsp_demotion_init_lru_cnt_cfg performance chages Change-Id: I0a317d14b2c583837ebf4e5d7c977ea0d128985f Original-Change-Id: Ic36f360da342c8f98e940642b15111d0540ddfc6 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39577 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: LUKE MURRAY <murrayl@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55500 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Adding HW401552 to cxa initfile to workaround clockgating bugJenny Huynh2018-03-131-0/+17
| | | | | | | | | | | | | | | | | | Change-Id: I644d47ae75e896e676c21b0215889f392118fd98 Original-Change-Id: I384afb523b07ed61e26c538a2477d1fb9eeaea6f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39474 Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Oren Lev <orenle@il.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55499 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Updating HW363605 workaround to be applied to all chipsLuke Murray2018-03-131-17/+0
| | | | | | | | | | | | | | | | | | | MB was decommitted for all of P9 Change-Id: I2ef078eb3a9739491f1df680e2fd5ec99ff523e3 Original-Change-Id: I38850b1e0bdfe04290622fe1bf95e34ae9e9bf9a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39448 Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55498 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Disable cp_me from the L3 for Nimbus DD1 and DD2.0.Luke Murray2018-03-131-0/+17
| | | | | | | | | | | | | | | | | | | | | | By default the L3 only sends these when the addres is non-local. This is needed for the MCU to send early data. However MCU early data is broken in DD1 and DD2.0 and this eats up X-link bandwidth, so for DD1 and DD2.0 we're disabling cp_me from the L3. Change-Id: I02eae05d75265b6e25984e620e5ea3524b03b22e Original-Change-Id: I13a894f91434cc19f5f9502f54cc59bad9a0ae0f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39483 Reviewed-by: ALEXANDER M. TAFT <amtaft@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55497 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* INT scan initfile change to add workaround for HW408972Jenny Huynh2018-03-131-0/+18
| | | | | | | | | | | | | | | | | Change-Id: I942d7ce7785e556c58668dba76e4a7e810286afb Original-Change-Id: Ice09a8348e121a0cfbed458807486e46d2957813 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39390 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: DAVID M. KAUER <dmkauer@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55496 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* p9_setup_bars -- support DD2 NPU SCOM address changesCHRISTINA L. GRAVES2018-03-131-0/+18
| | | | | | | | | | | | | | | Change-Id: Ief409a8a4bae838c89888abbb17f44e430ce6c3c Original-Change-Id: I33afb42e7b29f58447aa430a07ca052c60f79cd4 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34965 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55495 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Updating optimal larx/stcx dials for performanceLuke Murray2018-03-131-0/+24
| | | | | | | | | | | | | | | | | Change-Id: I529aafd311b2ec3f6230ee17e3289ef4d104e9d2 Original-Change-Id: I4bb2fb68d1fe3383a435f0d938820cfa6d7db7eb Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39004 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: ALEXANDER M. TAFT <amtaft@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55494 CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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