summaryrefslogtreecommitdiffstats
path: root/src/usr/targeting/xmltohb
Commit message (Collapse)AuthorAgeFilesLines
...
* Targeting Updates for Centaur VPD SupportAdam Muhle2013-01-211-0/+1
| | | | | | | | | | | Updating target types, Murano and Venice targeting data, and Tuleta XML gen script to add VPD_REC_NUM to Centaur chips. Change-Id: Ice03b18a6f9ba51e7edb309feefd14bbc9021bfc RTC: 44009 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2952 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* TRACS override attribute for SCAN traces.Patrick Williams2013-01-022-3/+5
| | | | | | | | | Change-Id: Ia2bd15babe8ad7bd25293e72a7285c0a278b89c2 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2792 Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com> Tested-by: Jenkins Server Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* add VMEM_IDayma2013-01-021-1/+5
| | | | | | | | | | | | adding VMEM_ID back to the attributes by modifying the genHwsvMrwXml.pl file The change will resolve the issue with the second processor voltage rail enable This fix is related to defect 864984 Change-Id: Iffde1c00c4900e4b5a427ad6ed3600481397d85f Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2793 Tested-by: Jenkins Server Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Changes to add support for dynamic VIDs on HB.ayma2012-12-181-19/+8
| | | | | | | | | | | | | Changes to put code into HB to do the istep 13.1 and 13.5 which is disable_vddr and enable_vddr respectively This is in conjunction with story 37517 on the hwsv side RTC: 34041 Change-Id: Id09a78e581d2a778d781e2683cc7ec26c8d45153 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2687 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Add support for EI_BUS_TX_LANE_INVERT attributeAndrew Geissler2012-12-171-6/+108
| | | | | | | | Change-Id: I1b48acb122a99e172aa00340c875ec9fbad8dd12 RTC:59275 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2667 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Move continuous trace attribute.Patrick Williams2012-12-152-5/+17
| | | | | | | | | | | | FSP team wanted to have the ability to write the attribute that configures continuous trace. Created a new non-volatile r/w attribute that allows FSP to configure function in HB. Change-Id: I76784c0f97c1b8ed01aa404c9394975a6fe80e6d Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2724 Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Lockless trace implementationPatrick Williams2012-12-142-0/+2
| | | | | | | | | RTC: 35396 Change-Id: I96ea0d95606f04abb4dc2b0470345ca475b53912 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2520 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Support FSP SEEPROM device stringsNick Bofferding2012-12-141-4/+46
| | | | | | | | | | | | - Added FSP SEEPROM device string support to MRW parser - Removed duplicate VMEM_ID attribute from MRW parser Change-Id: Ibeaf852f778b7f2f2b21359783a918e05f3a005e RTC: 36818 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2668 Tested-by: Jenkins Server Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* HWP: integrate opt_memmap into hostbootVan Lee2012-12-131-11/+0
| | | | | | | | | Change-Id: I3c38143c5e4e8272dde94d7743f7e1f742178647 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2486 Tested-by: Jenkins Server Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Host Data ServiceDan Crowell2012-12-131-0/+33
| | | | | | | | | | | | | | | | Implemented functions to load the Host Interface Data into memory and retrieve pointers to specific pieces of data therein. Verified in Murano and Tuleta configs. RTC: 49509 Change-Id: I18b44cd53f2cab91b83ecad283b998783e275d4f Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2367 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Terry J. Opie <opiet@us.ibm.com> Reviewed-by: Melissa J. Connell <missyc@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Fix 80 char MRW parser wrapping not to split entity pathsNick Bofferding2012-12-111-24/+24
| | | | | | | | | | | | - Updated MRW parser to adhere to 80 column wrapping while removing entity path splits from the resulting output Change-Id: I88c2525c5727351a18ee58f64259a06f20a2f0db Defect: 863799 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2615 Tested-by: Jenkins Server Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* change to use tuleta-cent-vrds.xml instead of tuleta-vmem.xmlayma2012-12-091-3/+3
| | | | | | | | | | for the genHwsvMrwXml.pl script Change-Id: I5483a8d6ce2e129345b52e96bd7fa8f3f84faae5 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2603 Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com> Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Support FSP only PCIE attributesNick Bofferding2012-12-081-88/+330
| | | | | | | | | | - Added FSP only PCIE attributes to processor FSP specific output in MRW parser Change-Id: I95afc0c333fd980ddbbb169ec847592241b90e7c RTC: 46988 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2564 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Additional tweaks to MPIPL attributes.CamVan Nguyen2012-12-083-297/+2
| | | | | | | Change-Id: I43f9f9dd38d2cfe90a0f2df6984e4f715a822157 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2560 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Attributes for dynamic VIDSayma2012-12-071-2/+129
| | | | | | | | RTC: 37517 Change-Id: I9cab78e87f6bde8848e29bc437ab26a27df70174 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2566 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Sync up common files after HWSV review and changesVan Lee2012-12-062-64/+70
| | | | | | | Change-Id: Ida41d514bb565f79049f77d432181e98ab6991b9 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2449 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Add support for new hwp: proc_cen_set_inband_addr.Brian Horton2012-12-041-1/+65
| | | | | | | | | | | | | HWP is called in step 11.10. Following versions are included: . proc_cen_set_inband_addr.C 1.7 . proc_cen_set_inband_addr.H 1.2 . proc_cen_set_inband_addr_attributes.xml 1.2 Change-Id: I34b27bb2ba59e96f1acb593aa6cda24c45bed9f5 RTC: 42177 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2343 Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com> Tested-by: Jenkins Server
* Create new PNOR heap zero initialized section for Hostboot only attributes.CamVan Nguyen2012-12-044-16/+483
| | | | | | | | | | | New section is needed for Hostboot specific attributes that we don't want to sync to/from FSP. This is needed for MPIPL. Change-Id: Ic40bec73c9b1331906a81b5804999865c0ec1616 RTC: 51687 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2445 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* IBSCOM Good Path base supportAdam Muhle2012-12-041-0/+14
| | | | | | | | | | | | This drop contains only the base IBSCOM good path support Future Tasks will cover error path, improved test cases, enabling IBSCOM, etc. Change-Id: I8405de9c6c46b7c035b664713e5820268863210d RTC: 50369 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2337 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Syncing with FSP version for defect 859598Andrew Geissler2012-11-151-6/+50
| | | | | | | | | | See http://gfw160.austin.ibm.com:8080/gerrit/#/c/2313/ for FSP Review. Multiple CEC HUB FRU structures populated for single DCM multichip (HDAT) Change-Id: I1c3e1e2dad160ad53aa361875915c6b8013a0a79 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2351 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Add PCIE attributes supportVan Lee2012-11-152-139/+570
| | | | | | | | | Change-Id: Icfd0639cf694622a9f2bdb23a48b7fb9f5b41961 RTC: 42175 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2242 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Only enable candidate PSI linksCamVan Nguyen2012-11-072-8/+19
| | | | | | | | | Change-Id: Ie3cc120d05ac17126bde15b213a80701878f4a59 RTC: 50561 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2187 Reviewed-by: Van H. Lee <vanlee@us.ibm.com> Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Fix HUID to use new enum values of target TYPE attributeVan Lee2012-11-072-177/+177
| | | | | | | | | Change-Id: I49ca3ab38a8e43e95cd97a7651e04a0b17ac096e Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2235 Tested-by: Jenkins Server Reviewed-by: Brian H. Horton <brianh@linux.ibm.com> Reviewed-by: CAMVAN T. NGUYEN <ctnguyen@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* To add MBOX device path to FSP targetsachin gupta2012-10-311-1/+20
| | | | | | | | Change-Id: Ic655d7c4fd10e6da77baca5a169c9ca281a8a91d RTC: 48886 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2177 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Update MRW parser to generate new system attributesVan Lee2012-10-271-1/+1
| | | | | | | Change-Id: I8a26708e30a0f02040e3eba4d220f20b09034197 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2050 Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com> Tested-by: Jenkins Server
* Fix proc_setup_bars fails on large config (4 procs 4 centaurs)Van Lee2012-10-242-613/+344
| | | | | | | | Change-Id: I8203c863f26aeb3a0ea20964e4c4bef64802c4e8 RTC: 50426 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2118 Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com> Tested-by: Jenkins Server
* Synchonize FSP + HB MRW parser scriptsNick Bofferding2012-10-241-121/+737
| | | | | | | | | | | | | | | | | - Added ordinal IDs and RIDs to targets - Added FSP, PSI targets - Sorted most targets by ECMD target (node, position, chip unit) - Set DIMM, Centaur RIDs based on DIMM instance path - Configured FSP specific attributes only to be built in FSP build - Removed TP chiplet generation - Fixed various tab, output format issues - Added multinode TODOs Change-Id: I5022bc9cbb6a8d3fd62fabacc4769b5d5d102fa7 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2047 Tested-by: Jenkins Server Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Remove unneeded/unused TARGETING type attributes.Brian Horton2012-10-102-309/+136
| | | | | | | | | | | | | | | | | | | | TYPE_SCM TYPE_DCM TYPE_MEMVRM TYPE_PROCVRM TYPE_PERVASIVE TYPE_MEM_PORT TYPE_DMI TYPE_TP TYPE_POWERBUS This includes the Story 46851 work as well (TP and POWERBUS) Change-Id: I6a9ca86ba11eb42b65d530320b02a8ed52836a7c RTC: 38757 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1939 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Remove Salerno and non-present Murano unitsDan Crowell2012-10-041-3/+5
| | | | | | | | | Change-Id: I64c2d979d3b7a92ef6563e52cf6a3459a4ba7cd2 RTC: 45796 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1896 Tested-by: Jenkins Server Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* add attributes and target types for the pnor device to add it to targeting filesayma2012-10-011-0/+129
| | | | | | | | | RTC:47730 Change-Id: Iecd2f5e123356a7e01921c41fd6327618b5f3043 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1881 Tested-by: Jenkins Server Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* HWP: integrate new version of proc_chiplet_scominit into HostbootVan Lee2012-09-242-6/+6
| | | | | | | Change-Id: I7253d1a10a90f66a6fd9dd3280cb2aa3744bdbef Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1844 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Set up POSITION attribute for DIMM targetsVan Lee2012-09-242-1277/+1071
| | | | | | | | | Change-Id: I7633b8c624c54cb447910a3a58212901e650ae3a Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1843 Tested-by: Jenkins Server Reviewed-by: Terry J. Opie <opiet@us.ibm.com> Reviewed-by: Brian H. Horton <brianh@linux.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Fix DIMM instance path sort orderNick Bofferding2012-08-201-18/+42
| | | | | | | | | | | | - Added DIMM instance path sort function to MRW parser - Fixed MRW parser bug where DIMM instances were not normalized correctly Change-Id: Ida107f76be62eb3fc9a30263f7f163bcb4bb5fe4 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1562 Tested-by: Jenkins Server Reviewed-by: Van H. Lee <vanlee@us.ibm.com> Reviewed-by: Andrea Y. Ma <ayma@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Change to genHwsvMrwXml.pl to include fips attributes and typesayma2012-08-081-6/+129
| | | | | | | | | | | | | | Added the fips attributes to the genHwsvMrwXml.pl script. The script is common between host boot and hwsv/fips so the changes specific to the fips environment are under checks to verify that the build is for fsp and not hb (hostboot) RTC: 44011 Change-Id: I9eaf56fdb0348c7fe1a51d049792d80c00484a2d Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1457 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Support modified MSS_CACHE_ENABLE HWPF AttributeMike Jones2012-08-082-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | The HW team changed memory_attributes.xml. The target-type of the MSS_CACHE_ENABLE attribute was changed from system to membuf-chip. This attribute is initialized by the platform (Hostboot) and indicates if a Centaur has its L4 cache enabled. The HW team wanted the ability to turn this off/on for a particular chip. I also changed from non-volatile/read-only to volatile/writeable (i.e. on the heap, initialized from PNOR) so that firmware has the ability to disable an L4 cache, but it is not remembered across a power cycle. How firmware will decide to actually disable an L4 cache is TBD and this decision may drive further changes to this attribute (e.g. it could be changed to non-volatile/writeable). The reason for doing this change now is that the current version of mss_scominit is accessing MSS_CACHE_ENABLE as a Centaur attribute and Hostboot fails because it thinks it is a system attribute Change-Id: Iacd774e482340d95b439579b76230026f38f0440 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1491 Tested-by: Jenkins Server Reviewed-by: CAMVAN T. NGUYEN <ctnguyen@us.ibm.com> Reviewed-by: Van H. Lee <vanlee@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Add attributes for PHYP Memory MapDan Crowell2012-08-031-0/+132
| | | | | | | | RTC: 34095 Change-Id: I33b4820490898744e9849a52457db37c735e396b Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1429 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Compile Hostboot without -fshort-enumsNick Bofferding2012-08-031-6/+5
| | | | | | | | | | | | | | | | - Removed -fshort-enums from config.mk - Fixed incorrect buffer size calculation in target.C - Disabled short enums in targeting compiler - Removed unnecessary assert - Updated enum storage space Change-Id: Ia83f942b54bc5ee246ce8d69750081714d458dcf RTC: 35808 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1437 Tested-by: Jenkins Server Reviewed-by: Brian H. Horton <brianh@linux.ibm.com> Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* FSI fix for VPODan Crowell2012-08-032-0/+2
| | | | | | | | | | | A previous fix for Simics broke VPO. I had to add a new attribute to split the 2 halves of FSI initialization since Simics and VPO have different behaviors. Change-Id: Ib06a9969475e8033dff24b5083cdf411054e2b78 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1441 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* XSCOM Support to remote ProcessorMissy Connell2012-07-122-42/+0
| | | | | | | | | | | | | | | Added support to XSCOM remote processor. Create testcase to perform an xscom on the remote processor Testing on a multip chip murano environment. Removed XSCOM_CHIP_INFO attribute. Now using FABRIC_NODE_ID and FABRIC_CHIP_ID RTC: 35529 Change-Id: I372740e817212361dfd7311d9b8c46a65ce52880 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1288 Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com> Tested-by: Jenkins Server
* Update genHwsvMrwXml.pl to generate new system attributes for TuletaVan Lee2012-07-102-3/+443
| | | | | | | Change-Id: Ia0aee8d4f9ae3fecf726a530e58ef3ffb6de51a7 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1260 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Preload PNOR VPD correctlyTerry J. Opie2012-06-182-129/+151
| | | | | | | | | | | | | | | - Handle Venice, Murano, Tuleta - Change SPD code to use VPD_REC_NUM attribute - Modify FAPI/HWPF tests to use present DIMM targets Change-Id: I2348a2da90ea85a966f3724f8b3694a0b8f03916 RTC: 40774 Depends-on: I7d1b41c9f9e87baa9d42b78bf4351e3b6d774cb5 RTC: 39133 Depends-on: Ia0f22c87f8bc3959324fa8347e191f2b47b4325c RTC: 35835 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/950 Tested-by: Jenkins Server Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Common Attributes and FSP attributes seperationVan Lee2012-05-102-64/+214
| | | | | | | Change-Id: Ic286a6f700c909b89d296074fcf22d1c6d2ae0f8 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/961 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Support targeting code commonalityNick Bofferding2012-04-2411-37876/+58
| | | | | | | | | | | | | | | - Moved common targeting code to own subtrees - Updated many components with header file changes - Implemented abstract pointer class - Implemented Hostboot specific support for targeting commonality - Changed attribute VMM base address to 4 GB (From 3 GB) - Removed tabs, fixed > 80 character lines Change-Id: Ie5a6956670bfa4f262f7691b4f0ce5a20ed289fe RTC: 35569 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/909 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Do not init FSI slaveDan Crowell2012-04-207-1/+83
| | | | | | | | | | | | | | | Added a new attribute SP_FUNCTIONS to control some of the functionality that the FSP may or may not be handling. Updated FSI code to key off of new attribute instead of looking for VPO mode Migrated over to using HUID for tracing/logging and added a utility function for other code to use. Change-Id: Ide410d088b24a15004236d39b3e4bde784248a52 RTC: 39704 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/877 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* HWPF: Pull in latest memory_attributes.xml fileMike Jones2012-04-181-2/+2
| | | | | | | | | | | | | The latest memory_attributes.xml from the memory HW team contains some changes that need to be pulled in. This has co-reqs to a few HWPs that have also been pulled in - but these changes are not significant enough to go through the full HWP review process (a simple type change and a typo fix) Change-Id: I2816aeab51efcefa819b1c971918edb5564f280e Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/903 Tested-by: Jenkins Server Reviewed-by: Van H. Lee <vanlee@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Add VPD_REC_NUM AttributeDan Crowell2012-04-166-1/+804
| | | | | | | | | | | Added VPD_REC_NUM attribute to the processor chip and dimm targets. The value matches the sequence id of the target Change-Id: I7d1b41c9f9e87baa9d42b78bf4351e3b6d774cb5 RTC: 39133 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/880 Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com> Tested-by: Jenkins Server
* HWPF Attributes: Support ATTR_EXECUTION_PLATFORMMike Jones2012-04-165-0/+31
| | | | | | | | | | | | | | | | Some HWPs (e.g. special wakeup) use different registers depending on which platform the HWP is executing on (FSP/Hostboot) to avoid arbitration problems when multiple platforms do the same thing concurrently. This attribute allows those HWPs to query the platform. Dean/John agree with this attribute. See RTC task 40409 for details. Change-Id: I761ba03b43905c7bdc268fae8ffb4c5796ece21b RTC: 40409 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/878 Tested-by: Jenkins Server Reviewed-by: Van H. Lee <vanlee@us.ibm.com> Reviewed-by: Brian H. Horton <brianh@linux.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Add HUID AttributeDan Crowell2012-04-107-68/+1961
| | | | | | | | | | | | | Added a HUID attribute to every target and filled the value in for the existing system configurations. Updated mrw script to generate the HUID as well. Change-Id: Id8f53e548b97fd293cfac4e4b1d0e6bda848c4ea RTC: 39270 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/822 Tested-by: Jenkins Server Reviewed-by: Van H. Lee <vanlee@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* HWPF Attributes: Support ATTR_CHIP_HAS_SBEMike Jones2012-04-092-1/+26
| | | | | | | | | | | | | This was reuqested by Jeshua. One of his HWPs will run on both Venice and Murano and needs to know if the chip has an SBE in order to initialize some SBE related registers. Venice has an SBE, Murano doesn't Change-Id: I8e606a6168873f8aef4fdd11e0d3f4e1cb8597d9 RTC: 39971 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/823 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Build Tuleta PNOR image.Patrick Williams2012-04-062-1/+24
| | | | | | | | Change-Id: I0967f385e7859fa2f2b9f9e6e179a6efe11bbcab Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/835 Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com> Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
OpenPOWER on IntegriCloud