| Commit message (Collapse) | Author | Age | Files | Lines |
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noticed that the first dimm in the VENICE.system.xml file is incorrect -
it was missing the number 0 in the name and physical path. i've
fixed it (as well as my script that put it in there, just in case i have
to rerun that again.)
Change-Id: Ife1b5e96f22cec7ee23b244179f3244704afface
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/809
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Tested-by: Jenkins Server
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- generate 8 logical DIMMs target per physical DIMM
- use strict and XML::Simple parser
RTC: 38209
Change-Id: I37f0fdee5468424b1564e5aff7e725a205bf4b20
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/778
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Tested-by: Jenkins Server
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Work for Task 38385
I modified the attribute parsing script (xmltohb.pl) to generate
a debug function that will loop over all targets and trace out
the value of every defined attribute. Note that this is not the
permanent direction, eventually we will do the parsing offline
using the debug framework. This is a stop-gap until that is
ready.
For review I have a copy of the trace output here:
/gsa/ausgsa/home/d/c/dcrowell/public/hostboot/RTC_35202_output.txt
RTC: 35202
Change-Id: I038dfd0fd0eb10b25203fe91fa23933fd24fe62f
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/770
Tested-by: Jenkins Server
Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com>
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Includes Xbus, Abus support and all indirect scom address ranges known to date.
Task 36903 - Scom Translate for A and X Bus
Task 37697 - Code updates for Scom Translate Abus/Xbus
Task 38765 - fix for Indirect Scom/Scom translate for MBA targets currently not yet supported
Added Murano XML targets for Xbus and Abus
Final Merge with Murano/Venice on 810 verified
Change-Id: I75d9e642efc4e020e39a2b87ab541cfa5ecd56ba
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/761
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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This is work for Task 38048
-Updated bbuild to an 810 build with the latest Simics support
-Pulled support for Salerno from build tools
-Changed DEFAULT_MACHINE to MURANO
-Updated testcases to follow error logging guidelines
-Fixed up some FSI error handling bugs
-Disabled FSI loopback on VENICE (fix with Task 39187)
-Disabled a few testcases (see Impediment 39188)
Verified both MURANO and VENICE configurations
Change-Id: Ie7761f49c9e653489c8c4dad261b1c8852fa7548
RTC: 35596
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/791
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: I22112ca863b19759eec9080742148bd71751b144
RTC: 39190
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/793
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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- Updated targeting test makefile to enable access to targ trace
- Added testcases to verify string attribute behavior
- Added string attribute types for testing
- Added string attributes to target types for testing
- Updated attribute compiler to output string attribute typedefs + sizes
- Updated attribute compiler to emit more friendly attribute alias
- Updated attribute compiler to process and emit string attributes
Change-Id: I4fe1bbd402319e7f40d90f6448cd342f714c1058
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/767
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Update bbuild to released 1209 driver (b0229a_1209.760)
RTC: 35596
Change-Id: Ifeb06070ac61943982509e88df6a1ca27c5e0aea
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/717
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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RTC: 35819
Change-Id: I8502e8a8974935cccf60e38b02cc1fbff86a18ce
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/728
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: I0e22eec71f7aab0e0e7b5ca9edd03358034078c4
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/700
Tested-by: Jenkins Server
Reviewed-by: Mark W. Wenning <wenning@us.ibm.com>
Reviewed-by: Brian H. Horton <brianh@linux.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: I05e6f4f435574e25f65702c875e332e253927ff7
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/686
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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- Implement binary_search algorithm for keyword lookup table
Change-Id: If7526d84fe3415ca0d2bf7a1de31816b77a912c5
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/674
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: I7ddf2ffb36b453ccf37dc6d3138752c1c8c4079d
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/682
Tested-by: Jenkins Server
Reviewed-by: Brian H. Horton <brianh@linux.ibm.com>
Reviewed-by: CAMVAN T. NGUYEN <ctnguyen@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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In the weekly "scrum of scrums" meeting this morning, we touched on your change to add DIMMs to the targeting XML files.
I asked you to reduce the number of chips from 8 to 4 because there are no systems planned with more than 4 chips in a
drawer. However, Dan Crowell said that he still wanted 8 chips because that is what the hardware supports. Patrick agreed.
So... Would you mind adding back those 4 chips?
I'm thinking that you can start with the old XML file and just use your script to add in the 512 DIMMs. I don't think this
is a big change. Apologies for the confusion.
Change-Id: I17e172eb48007dd56f24c8a530a3ea1ef6ac62a0
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/678
Tested-by: Jenkins Server
Reviewed-by: MIKE J. JONES <mjjones@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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* add logic to hwas.C to find DIMMs and mark them as poweredOn, present and functional
* correct bugs (s/CLASS_CARD/CLASS_LOGICAL_CARD) in other code that looked for TYPE_DIMM
* add all possible DIMMs (256) to simics_VENICE.system and (8) to vbu.system.xml
* also reduced simics_VENICE.system.xml file - it had 8 drawers; VENICE will only have 4.
Change-Id: I7fb4913359c7153061ed1adaddf626943ee13957
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/673
Tested-by: Jenkins Server
Reviewed-by: MIKE J. JONES <mjjones@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: I6307ae3a6a3c151bb85fd86081a5bac4d16076f4
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/666
Tested-by: Jenkins Server
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: I4557a6a67ea73f13e2bcca6e05af57cba8d5a9e1
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/613
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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- Fixed whitespace pruning of entity paths in attribute compiler
- Added *.mrw.xml files (empty) to hold logical DIMM target instances
- Updated makefile to process *.mrw.xml files
- Updated SALERNO system XML to reference logical DIMM cards
- Updated attribute XML with new postion, mba port, mba slot attributes
- Updated attribute XML with new class type
- Updated target type XML with classes/attributes for logical DIMMs
Change-Id: I2981405fdf1e8706d7380a7963ede8e9fd6bc323
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/639
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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- branch HWP_test3
Add support for IStep HWPs:
HostBoot - DMI Training
11.7 proc_cen_framelock : Initialize EDI Frame
HostBoot - Establish System SMP
11.4 dmi_io_run_training : Run training on ext buses
- add support for 2 centaurs
- push to Gerrit for full review
- review responses
- final review responses
Change-Id: Iab9d7c145eb6834cec5edcd0a6b97622cf0ce86b
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/621
Tested-by: Jenkins Server
Reviewed-by: Mark W. Wenning <wenning@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Added locking
Change-Id: If2b3c2d69bb533a65cd9b41c1eaf595e979f93aa
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/562
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I51f9ac55afad27ff98eac07768ed52c986c05040
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/602
Tested-by: Jenkins Server
Reviewed-by: MIKE J. JONES <mjjones@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: I4543ea01f1f31e2b3018699753cd33efdcec0c5c
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/595
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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for each chip versus a single global mutex.
RTC Story 4389
Also stuck in a quick fix for Issue 4493 at the same time.
Verified against VENICE model with a Centaur.
Change-Id: I62fc2c979315b60594104550f8095aa80996c40f
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/599
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: I945224b9d4acf25730b5c9c8bee384b6a3669104
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/588
Tested-by: Jenkins Server
Reviewed-by: MIKE J. JONES <mjjones@us.ibm.com>
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Change-Id: I2b73ceb44af6717e92f8ade682596496545fab51
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/581
Tested-by: Jenkins Server
Reviewed-by: Van H. Lee <vanlee@us.ibm.com>
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Additionally:
- Static initializer for EEPROM mutex
- Move I2C back to extended image
Change-Id: I3cb4bd755aff7c223b3fd794ee88947b0e77f179
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/565
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Task 4086
If the powerbus is alive we will use the remote master's OPB logic
directly instead of using the master proc's logic and cascading
through the MFSI port.
Added a target-specific mutex to handle concurrency issues.
Note - the new code path cannot be tested until XSCOM is completed
with Story 4382
I also modified some error handling to take care of errors exposed
by the fsipres testcase.
Verified on SALERNO and 2-proc VENICE models.
Change-Id: If48ddde60cef819ff6b921e00bdbab5027830be4
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/569
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: Ia89d3aecb3192a2f99ef9fbb5abe0ce1d528a481
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/506
Tested-by: Jenkins Server
Reviewed-by: Terry J. Opie <opiet@us.ibm.com>
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- initial commit
- fix script to work with changes in simics, to test
- review fixes
- review fixes 2 - add extra command to set (nonvolatile) ISTEP_MODE to OFF
- review fixes 3 - minor fixes, remove unit test
Change-Id: I9a1b7582da26a272393e3ea6c87c6979d0ea7c11
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/499
Tested-by: Jenkins Server
Reviewed-by: MIKE J. JONES <mjjones@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: I2eaef856d94a4d84db729e1f9d1e9b5b0f8d0845
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/496
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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- Prevented mutex attributes from being copied in target APIs
- Added target APIs to get/tryGet mutex attribute references
- Added testcases to verify mutex attributes
- Added mutex attribute type to XML definition
- Added test mutex attribute to system target XML definition
- Modified attribute compiler to support mutex attributes and restrictions
- Replaced 100000 cycle loop in synctest.H with nanosleep for 10 CTX switches
- Added context switch time macros to time.h
- Removed context switch time macros from taskwaittest.H
and renamed existing macro calls
- Removed context switch time macros from synctest.H
and renamed existing macro calls
Change-Id: I93fecfa75e00e509fa442e4dd5c9e3fd67866e98
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/491
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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- Create/update Centaur chips, MBS, MBA units
- Add unit testcase to query the Centaurs
- Update the Venice, VBU target instances
- Increase max endpoint pairs to 10
- Other general model updates for compatibility, consistency
- Register FSISCOM and SCOM operations with DD framework for Centaur chips
Change-Id: If43bc57888e66b7d2ea53704ca703328eec844f9
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/465
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: I8448480627ad478e8e16377027137e6df410053f
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/460
Tested-by: Jenkins Server
Reviewed-by: MIKE J. JONES <mjjones@us.ibm.com>
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RTC Story 3792
- Added 7 more Venice targets and 7 more Centaur targets to the
simics_VENICE.system.xml to match the latest simics config
Note: remove Centaurs are currently disabled due to SW107421
- Modified testcases to be more tolerant of system config differences
- Changes to initialization flow to be more tolerant of missing
chips
- Expanded the size of the HB_DATA section of PNOR to hold the
additional targets (up to 128KB space now, actual is 36KB)
Change-Id: Ic92708ccb147fb18bf992ef3ac318a287d32fafe
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/445
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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- Support enums inside of complex types
- Support native types (EntityPath) inside complex types
- Support integer types (int8,int16,int32,int64)
- Determine PNOR virtual base address from host boot code
- Allow reuse of enums across multiple attributes
Change-Id: I56501b79f354c83310e86854d27de8ce9be61952
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/454
Tested-by: Jenkins Server
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
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- Review comments - Made volatile-zeroed and created test case
- More review comments - Fixed bug in kernel code as well per Patrick assistance
- Another comment from Nick about the error message in perl script
Change-Id: Ia1dd66b2e9918695e534fd28c4d25260c92d0d8b
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/447
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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- first commit
- change isteplist to call hwas
- comment out test isteps
- modify xml to add HWAS_STATE attribute
- add macros to taskargs
- remove debug trace from taskargs
- add call to init_fsi
- post-review
- merge xml files
- forgot one printkd
Change-Id: Iab3b1f85c401f9a176ed84ddb91263caf25a3d56
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/430
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: I1fadb01b8f8e850fdc6c766138e8adb0ea2e0a51
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/436
Tested-by: Jenkins Server
Reviewed-by: MIKE J. JONES <mjjones@us.ibm.com>
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There are a group of attributes defined for FSI now.
-ATTR_FSI_MASTER_CHIP
-ATTR_FSI_MASTER_TYPE
-ATTR_FSI_MASTER_PORT
-ATTR_FSI_SLAVE_CASCADE
-ATTR_FSI_OPTION_FLAGS
Also includes work for Story 3996. The attributes are now broken
into 3 distinct pieces:
- attribute_types.xml : defines hostboot attributes
- target_types.xml : defines different types of targets
- XXX.system.xml : system-specific information, equivalent to what
we'll get from system workbook
These are then used to generic system-specific binaries, currently
for 3 platforms:
- simics_SALERNO_targeting.bin
- simics_VENICE_targeting.bin
- vbu_targeting.bin
Change-Id: I2bf920cc62cceb761ab44a07df433da44249d0e0
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/426
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I64551b85728d11da2e8fc5ba47023ff986688177
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/394
Tested-by: Jenkins Server
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
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Change-Id: I731b19ea027393e375993136f125fff2f6fb31e9
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/351
Tested-by: Jenkins Server
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: I71ca4f6ee6c33f3dacbda2f8729f6534109b7690
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/350
Tested-by: Jenkins Server
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Reviewed-by: MIKE J. JONES <mjjones@us.ibm.com>
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- Generate PNOR targeting image as part of the build process
- Load it into SIMICS physical memory
- Access image from targeting service at correct virtual address
- Bridge fapi attributes to host boot attributes using direct macro
- Support multidimensional arrays for simple attributes
- Removed support for fake PNOR image
Change-Id: I45d986d69397940a165c850d0db0fdeccd137d4d
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/341
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Reviewed-by: CAMVAN T. NGUYEN <ctnguyen@us.ibm.com>
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
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This reverts commit c82ba14ada9c80565b95ad9d3d05c678591ae328
Change-Id: Ifd9a62779b13d237c9e4c5d2818df6e433f17021
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/338
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Tested-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: I5233ea017d61d629da26aa63b628bb36187d63dd
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/335
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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