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* Revert "Add OCMB_CHIP_TYPE Attribute"Michael Baiocchi2019-04-192-36/+0
| | | | | | | | | | | | | | This reverts commit 0da6ad912fdfae1b8d3ed8e117beede01365fc04. Change-Id: I4fdf24bdb25a2cd99279d064d2647aac27e6b4a6 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76160 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Move MSS MRW attributes to generic XMLLouis Stermole2019-04-191-5/+0
| | | | | | | | | | | | | | | | Change-Id: I13c4b88523b4ebda84193dd711f0fbb0772672f7 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71436 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71465 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Add new PMIC target for AxoneMatt Derksen2019-04-183-3/+779
| | | | | | | | | | | | | | | | PMIC is a voltage regulator for the DDIMM. It supplies power to the OCMB and DIMM targets. Change-Id: I10c1b03169f53b070f521ec9cd60cdbd15c4a268 RTC:206184 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75136 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Glenn Miles <milesg@ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Update OCMB 9-15 to have valid i2c and eeprom infoMatthew Raybuck2019-04-181-36/+148
| | | | | | | | | | | | | | | | | | | | | | | | | The simics model only has 9 valid ocmbs represented on the master processor. ocmbs 0-7 are behind a 1-8 MUX and ocmb 8 is directly connected. This leaves ocmbs 9-15 for us to fill out. The information must be valid enough to allow the code to process the targets correctly, but we must fake out some information for the the sake of the awkward simics model. We have decided that for ocmbs 9-11 we will match everything from ocmb8 except increment the devAddr of the I2C info attributes A2,A4,A6, D2,D4,D6. For ocmbs 12-15 we have picked a new port (2) and used the same dev addr increments. This slightly invalid data allows the code to have the targets show up as PRESENT but not FUNCTIONAL Change-Id: I3aec520a04e89829554c277a4cf02e1981b7ed84 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75999 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Validate OMI INBAND BAR offset attributes against calculated valuesChristian Geddes2019-04-181-1/+11
| | | | | | | | | | | | | | | | | | | | | | | | | While setting up the virtual memory mapped IO to the OCMB chips we make some assumptions that the OCMB MMIO spaces will be contiguous. The p9a_omi_setup_bars HWP uses OMI_INBAND_BAR_BASE_ADDR_OFFSET to set the scom registers that determine the physical offset mapped to the IO. When setting up the Virtual addresses hostboot uses to represent the physical mmio address, we must validate that the attribute matches with what we calculated. While doing this we found that the virtual address attribute was being calculated incorrectly. It was not localizing the OCMB position relative to the MC which is required when calculating the offset into the MC bar. Change-Id: I0ebbcd38e19a238e2cc16791bb0595536788bb7f RTC: 201493 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75631 Reviewed-by: Matthew Raybuck <matthew.raybuck@ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add OCMB_CHIP_TYPE AttributeMike Baiocchi2019-04-182-0/+36
| | | | | | | | | | | | | | | | This commit adds the OCMB_CHIP_TYPE attribute and its associated enumeration. It adds this attribute to the generic OCMB Chip target. Change-Id: I0d0dfacf418a0990329bf9882276e79c524bd192 RTC:205563 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76020 Reviewed-by: Glenn Miles <milesg@ibm.com> Reviewed-by: Matthew Raybuck <matthew.raybuck@ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Test Cases for deconfig updates for AXONEMatthew Raybuck2019-04-122-0/+18
| | | | | | | | | | | | | | | | | Unit test cases for the MC->OMIC->OMI deconfig by association path. These test cases verify that deconfiguring an MC, OMIC, or an OMI will properly deconfig the other targets in the hierarchy. Change-Id: Ief665e76893a87324dc42fa66f8abd29190da30e RTC:196804 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70512 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Glenn Miles <milesg@ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* SMF: Logic For Creating Non-Secure HOMER Memory SpaceIlya Smirnov2019-04-121-0/+6
| | | | | | | | | | | | | | | | | | | For SMF to be enabled, HOMER requires a small amount of non-SMF (unsecure) memory where the "jump to Ultravisor" instruction can be put (to transition to UV mode). This commit sets up a region of non-secure memory space for that purpose. Change-Id: Ib91ec69f49a4e174e65f3c2aad337a68eaa0803b RTC: 205986 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70699 Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Update MAX_ALLOWED_DIMM_FREQ to support 3200 MHzChristian Geddes2019-04-101-0/+4
| | | | | | | | | | | | | | | | | Previously this attribute was defaulted to 2400 for all configs. For axone , in order to make the VPD that is exists in the model valid we must set this attribute to allow higher frequencies Change-Id: I209ea750e05814dd601a69dfab571d2f0da980bc Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75782 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Re-order i2c properties in Axone simics XML to align closer with simChristian Geddes2019-04-101-49/+49
| | | | | | | | | | | | | | | | | | | | In the simics model we have 9 OCMBs per processor, 8 behind MC01 that are behind an 1-to-8 MUX, and 1 behind MC23 that is directly attatched. Our XML was not portraying this correctly as it was showing that the directly attached OCMB was OCMB0, which according to our XML is behind MC01. This commit makes it so OCMBs 0-7 (behind MC01) have i2c attributes that say they are behind the mux. OCMB8 will be behind MC23 and will be the directly attached OCMB. Change-Id: I7ef0cba6021bccc07ca2ccfefa2e02c9ec68eba4 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75555 Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Chen Du <duchen@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Force UCD Updates on each IPLMike Baiocchi2019-04-081-2/+4
| | | | | | | | | | | | | | | | This commit updates the existing ATTR_UCD_MFR_REVISION_OVERRIDE to be non-zero such that it will force UCD updates on ZZ and Zeppelin systems on each IPL. Change-Id: I35e6aa7b990e45b16d2f3ce782c74f60d7668471 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75615 Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* HB Improvements: Fix compiler warnings on modern compilersLuis Fernandez2019-04-051-2/+10
| | | | | | | | | | | | | | | | Resolve warnings when compiling with gcc 4.8. Compiled with GCC 7.3, no more compile errors/warnings; build ends with caught exception from linker. This commit compiles with GCC 8.2, no more error/warnings; except for a linking warning. Change-Id: Ib5d7c2b5bd350edc76ee2c7de96896154cd44420 RTC: 202716 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72271 Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Set ATTR_MSS_INTERLEAVE_ENABLE to be 0xAF to allow all grouping sizesChristian Geddes2019-04-031-1/+1
| | | | | | | | | | | | | | | The eff_grouping code for axone is struggling to putting the 8 ddimms we have behind MC01 in the current axone simics model into groups <8. This change will allow all possible group sizes and allows the code to group these into 1 big group of 8. Change-Id: Ic9d48524f53883014ff57451b1265202d955ece4 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75227 Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Matthew Raybuck <matthew.raybuck@ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Set REL_POS to 0 on all DIMM target in simics AxoneChristian Geddes2019-04-021-0/+64
| | | | | | | | | | | | | | | REL_POS was not set and therefore was defaulted to 0xFF. This was causing calculations done by the MSS code to be off. Change-Id: I879761be5a6625775bc0dcb4c38f97477678e6b1 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75244 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Matthew Raybuck <matthew.raybuck@ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Create Attribute to force UCD UpdatesMike Baiocchi2019-03-302-0/+20
| | | | | | | | | | | | | | | | This commit adds ATTR_UCD_MFR_REVISION_OVERRIDE such that a user can override the MFR_REVISION seen on a UCD device. This could then force a UCD flash update. Change-Id: I3d807b3ddf2c62752046953f0f3d1754d80da381 RTC:205982 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75179 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
* Make pci cache injection attributes writeableDan Crowell2019-03-251-1/+12
| | | | | | | | | | | | | | | | The value of the cache injection attributes is based on the MTM of the system, therefore the FSP needs to be able to write to the attributes. -ATTR_PROC_PCIE_CACHE_INJ_MODE -ATTR_PROC_PCIE_CACHE_INJ_THROTTLE Change-Id: Iae59c3a045146ce617a0535f457ea467826e9e24 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/74880 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Set MUX i2c slave port to be 1Christian Geddes2019-03-221-1/+1
| | | | | | | | | | | | | The i2c controller info attribute for the I2C Mux target had the port information set incorrectly. This commit addresses that and adds a debug trace that was helpful in figuring out this issue Change-Id: I34b5c920e8fe4f0f0ea68ce5aaf268095aab9886 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/74864 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* OPAL/MPIPL: Processor Dump Area Table interfacesRaja Das2019-03-212-0/+74
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support to collect processor architected register data. SBE <--> Hostboot : ------------------- During first boot, hostboot reserves memory to copy architected register data by SBE and sends address to each SBE (see commit 9f49d11b). During MPIPL SBE collects architected register data and copies to reserved memory. Hostboot <--> Hypervisor : -------------------------- HDAT/SPIRAH has new ntuple (Processor Dump Area) to pass various architected register data. During IPL/runtime hypervisor reserves memory for architected register data and updates SPIRAH. During MPIPL (istep 14.8), hostboot converts SBE formated architected registers data to HDAT format and copies to hypervisor reserved memory. It uses NACA/SPIRAH pointers to get hypervisor reserved memory details. Hostboot has to update SPIRAH ntuple after loading new LID to memory. Hence this patch introdues below new attributes: - PDA_CAPTURED_THREAD_REG_ARRAY_ADDR - PDA_CAPTURED_THREAD_REG_ARRAY_SIZE - PDA_THREAD_REG_ENTRY_SIZE - PDA_THREAD_REG_STATE_ENTRY_FORMAT Change-Id: Idc7489e8cf6fc68fe80f028ba6deb97aa72486bf CC: Sampa Misra <sampmisr@in.ibm.com> CC: Daniel M. Crowell <dcrowell@us.ibm.com> Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/61627 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Set MAX_COMPUTE_NODES attribute so TOD code gets setup correctlyChristian Geddes2019-03-171-0/+4
| | | | | | | | | | | | | | | | | Without this change during istep 18 we hit errors trying to determine correct configs. This attribute was getting defaulted to 0 which got multiplied resulting the software telling us 0 procs were allowed. By setting this to 1 the issue was resolved Change-Id: I78ed0a82036f86daf8de02d14107de86ccbf2d7f Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/73151 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Allow single dimm configurations in AxoneChristian Geddes2019-03-171-1/+1
| | | | | | | | | | | | | | | | | | This attribute was likely copied from Cumulus where single dimm configurations we invalid. In Axone single dimm configurations should be valid. I hit this during bringup when I had the simics scripts configured in a way that was only making a single dimm detectable Change-Id: I13908a18ba22a63fae74c68f2d43221dce0a07f1 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/73194 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Chen Du <duchen@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Support UCD discoveryNick Bofferding2019-03-152-0/+32
| | | | | | | | | | | | | | | | | | - Added new attribute to indicate if target should be assumed present - Added that attribute to SP/BMC/UCD targets - Check for assumed present UCDs in discover targets - Iterate through every UCD for data flash update RTC: 201991 Change-Id: Ia535a58ea0355582621a23d3c1b50b2417ad362f Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/73047 Reviewed-by: Matthew Raybuck <matthew.raybuck@ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* UCD attribute and targeting updatesMatt Raybuck2019-03-112-1/+113
| | | | | | | | | | | Change-Id: I6e9f237b421f4eadac8c000784548cf5880582bd RTC: 201991 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71891 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Always use original defaults for attribute fields with no valueDan Crowell2019-03-115-29/+34
| | | | | | | | | | | | | | | | | | When a complex attribute is modified to add new fields, it is possible for the system xml to get generated with blank values for the new fields. This value will then get pushed into the final binary instead of a valid default from the metadata xml files. Change-Id: I26d5434c7039d62486b52eb79b395c6dd3d77db7 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/73089 Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Updates to testcases for AxoneDan Crowell2019-03-071-2/+2
| | | | | | | | | | | | | | | | | | Disabling a few testcases temporarily until Axone gets off the ground. Cleaned up some bad traces, etc in existing code. Add CI support for AXONE config Change-Id: I7a2140366e225971c91a50cec1f7e822e4847078 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72186 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Base HWP mirroring control on HB policyDean Sanner2019-03-061-0/+5
| | | | | | | | | | | | | | | | | | | PHYP can't support mixed mirroring/non mirroed memory, so MRW mirroring needs to be on/off. HB already has this info in a TARGETING ATTR (but not FAPI) and they don't match meaning one for one. Thus make ATTR writable and replicate FW setting to HWP setting Change-Id: I899272d338947f4c41f93c1ece88028053ce9d5f CQ:SW438826 CQ:SW459005 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64580 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Secure Boot: Log error when attribute override attempted in secure modeLuis Fernandez2019-03-062-0/+25
| | | | | | | | | | | | | | | | | | | | While in secure boot, the first time an attribute override is attempted, an error is logged to let the User know that the override did not take. A flag was created in hb only attributes which tracks if attribute override has been attempted. Change-Id: Ife99e0cfa17934a02abeb291dfd7e06fe86e75e2 RTC: 205071 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72079 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Reviewed-by: Matthew Raybuck <matthew.raybuck@ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Set early test case IPL step to be 14.7 in Axone simicsChristian Geddes2019-03-061-1/+1
| | | | | | | | | | | | | | | Currently in Axone simics we can boot up to exit_cache_contain before failing. Change-Id: I56ca91045c2645d69da5ba9cb18616db2a90706d Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72721 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Delete complextype fields in attributes if they have no valueDan Crowell2019-03-061-0/+10
| | | | | | | | | | | | | | | | | | | The targeting binary build will fail if it sees an attribute with a complex type that has a field with an empty value tag. However if the field isn't present at all, we properly fill in the default value from our xml metadata files. This change will delete any field that is found to have an empty value. Change-Id: I9d9b2b7870bef067d434f4698efac597043db2bf Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72875 Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Secureboot: Enhanced Multinode Comm: TPM_POISONEDIlya Smirnov2019-03-012-0/+26
| | | | | | | | | | | | | | | | | | | This commit introduces a new attribute TPM_POISONED used to indicate that a certain TPM was poisoned during the boot. This attribute is also used to adjust the trustedboot flag in HDAT: if the primary TPM was poisoned during the IPL, the trustedboot setting is turned off in HDAT. Change-Id: I32ff6e79ebba0e38c0e8b4b9bd4aa0f52a250d9a RTC: 203645 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72129 Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Method to execute testcases early in the bootDan Crowell2019-02-283-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | A new CONFIG variable has been created that will trigger the istep dispatcher to start the CXX unit test execution at some point during the boot rather than waiting until the end. This is useful for quick targeted testing and also for early bringup of new platforms. CONFIG_EARLY_TESTCASES is the new flag, and it uses ATTR_EARLY_TESTCASES_ISTEP to determine where in the boot to stop. Changes were required in several testcases to either skip the test completely (typically due to not having enough memory) or to add additional logic to load new support libraries on demand. The Axone platform has this flag enabled by default to execute testcases at the end of istep 6.9 (host_gard). Change-Id: I1da9479e2147d68102f44d60e064c3b79cc41bb6 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71693 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* OpenPOWER support for native and compatibility mode for DD2.3Matt Derksen2019-02-282-1/+74
| | | | | | | | | | | | | | | | | | | | | | | Witherspoon (OpenPOWER) will run in native mode, which means all the processors have to be at the same level (all DD2.2 or all DD2.3). Other systems (ZZ) we support running in a mixed configuration where DD2.3 processors will be run in 2.2 compatibility mode. We also need to support arbitrary OP systems that might want to run in compatibility mode even without mixed parts. See src/usr/hwas/common/README.md for the rules and resulting mode. Change-Id: I80fb98e2687b945ba506f2d75b1533884443e10b RTC:201485 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72214 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* fix VINI RT HW LX keyword for PhypSampa Misra2019-02-211-0/+1
| | | | | | | | | | | Change-Id: I7757b11bdb8643d7f0ea85cc881e00826e5715bb Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68904 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Jayashankar Padath <jayashankar.padath@in.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add new path in EEPROM device op to allow reading from new EECACHEChristian Geddes2019-02-161-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | Recently a new EECACHE section was introduced to Hostboot. This section gets populated with a copy of every PRIMARY_VPD eeprom (someday could contain other eeprom roles also) during host_discover_targets. This commit add support to allow users to select where they want to perform their EEPROM device operation. If they pass CACHE to the deviceOp macro then a read will come from the pnor cache, writes will write to pnor cache and then also write to the eeprom HW. If HARDWARE is passed in then reads and writes will be directly done on the eeprom hardware. If AUTOSELECT is passed the code will check our cache to see if we have a copy of the eeprom in question, if we have a copy we will go the CACHE path, if no copy exists we will go the HARDWARE path. Along with this change some reorganization was done w/ the eeprom related files. RTC: 196805 Change-Id: If2c4e5d3e338a1a10780740c1a019eb4af003b73 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70822 Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Set simics xml to match simics model for OCMB port numberingChristian Geddes2019-02-151-7/+7
| | | | | | | | | | | | | | | | | There was a bug where the i2c controller information had the wrong port values for OCBM targets 2-8. Correct value for the port for these targets is 0. In the current axone simics model OCMB 0 is on port 1 and OCMBs 1-8 are behind a 8-1 mux on port 0. Port was correct for OCMB 0 and 1 but incorrect for 2-8. Change-Id: Id34a812e2f278d0bc90beb44ba26b0fec32d2087 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71700 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add EEPROM caching device opChristian Geddes2019-02-131-34/+174
| | | | | | | | | | | | | | | | | | | | | | | | | | This commit introduces a new EEPROM_CACHE deviceOp and registers the OCMB_CHIP, PROC, and DIMM targets to it. This is part of the larger effort to transition for a "VPD" cache to an "EEPROM" cache in pnor. The deviceOp is currently called in hwasPlat's platPresenceDetect if the target in question has a ATTR_EEPROM_VPD_PRIMARY_INFO associated with it. The layout for the new EECACHE section in pnor is defined in eepromCache_const.H. Essentially it is a header that contains an array of record headers that tell where in the EECACHE pnor section a given cached EEPROM can be found. All EEPROM targets will be allocated space in the EECACHE section but only present targets will have their cache filled in. RTC: 196805 Change-Id: I49c341c9784be04ddf0259bd444f06c9baf8c6f1 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70520 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add call to p9a_ocmb_enable to istep 10.4Christian Geddes2019-02-111-0/+64
| | | | | | | | | | | | | | | | Per IPL Flow doc for P9 Axone, p9a_ocmb_enable needs to be called on all processors during istep 10.4 RTC: 195553 Change-Id: I50fa98959008cccfe0620c8bc6e62f33ee91c135 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71229 Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fix deconfigure parent rollup policyMatt Derksen2019-01-313-46/+798
| | | | | | | | | | | | | | | | | | | Change to specifically designate if a target is allowed to be deconfigured by child rollup and if it should rollup to its parent. Need to cover the case where there are two different types of children and only one is allowed to rollup to the parent. Also prevent the deconfigure rollup from happening to the parent. Change-Id: I514876a46e9c8180e1fc99a969e0ca4247fbf2d9 CQ:SW454562 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70759 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Set the I2C MUX bus selector in the i2cPresence functionRoland Veloz2019-01-301-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | - Expanded the i2cPresence API to take in the I2C MUX bus selector and the I2C MUX path. This will facilitate setting the bus selector within the i2cPresence function. - Set the I2C MUX bus selector in the i2cPresence function via the call to i2cAccessMux. - Simplified the i2cAccessMux API. It only takes in what it really uses. - Added several dump utility functions that are strictly there to dump certain data structures on an as needed basis. Was useful to have these utilities to see certain data structures but does not slow down the run time because the user must explicitly call them. - The structures that can get dumped are TARGETING::EepromVpdPrimaryInfo, eeprom_addr_t, TARGETING::FapiI2cControlInfo and I2C::misc_args_t. Change-Id: I14943687a934bfb21bc5cf3db0540b7e629a6257 RTC:203596 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71011 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Do not gard cores on the initial core wakeup failureDan Crowell2019-01-292-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | We have seen rare (but non-zero) errors during slave core wakeup where we never see the new core reporting in. Currently this will result in a visible log and a core gard. However, there is currently no indication this failure is actually due to bad hardware. As a workaround, this commit adds an indicator that keeps track of if a core has failed wakeup previously. The first time we encounter the error there will be a visible log with a FW callout and no deconfig or gard of the core. That will trigger a boot failure and a reboot. If we don't fail on the next boot (which is expected), the counter will be cleared. If we do fail again there will be a visible log (with a new SRC) that calls out the core as the primary cause, plus does a deconfig+gard. Change-Id: I3a25537cf9c9c8e0b679519b67e9ae4e3492736d Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70992 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Set TPM model to be the x75 nuvoton for axone simicsChristian Geddes2019-01-241-0/+4
| | | | | | | | | | | | | | | | Current axone simics model has this as the x75. This might change but for now we will set it to be x75 in the hostboot xml so we dont get error logs. Change-Id: I7d86bb36cbb31fd4bae02a7e7f29bc3f385fd6d8 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70827 Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Hieu C. Nguyen <hieu.nguyen@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Inform PHYP of NVDIMM protection by OCCMatt Derksen2019-01-242-0/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The OCC is responsible for detecting the EPOW signal and triggering the save operation on the NVDIMM. Therefore, if the OCC is not running we are unprotected from a poweroff event. PHYP needs to inform the LPARs using the NV (non-volatile) memory of this state so they can behave accordingly. HBRT is responsible for telling PHYP when we get into this state. There are two ways we can detect this state: a) HBRT explicitly puts the PM complex into reset b) PRD detects a specific FIR bit The message should include this data: - what state we are in (protected or unprotected) - which processor is affected Work for this story will include: - Definition of the new message - Creating a utility function to send the message - Calling utility function to send 'unprotected' message inside of all pm reset paths at runtime Change-Id: Ib015d001d47883a247faedabedb0705ba0f1b215 RTC:201181 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68870 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: TSUNG K. YEUNG <tyeung@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add Support for Nuvoton 75x Model of TPMsMike Baiocchi2019-01-172-0/+20
| | | | | | | | | | | | | | | | | | This commit adds the ability for hostboot code to support the Nuvoton 75x TPMs along with the current support of the 65x models. A new attribute TPM_MODEL is used to configure the appropriate settings for each model. Change-Id: I14b0f6606a1a94d0ed300fd51bbf3f50e63dfb01 RTC:202356 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70464 Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Set the DIMM SPD sizeRoland Veloz2019-01-162-1/+18
| | | | | | | | | | | | | | | | | | | | - Created attribute DIMM_SPD_BYTE_SIZE to contain the DIMM SPD size - Added the attribute DIMM_SPD_BYTE_SIZE to target lcard-dimm so that all DIMMs get this attribute - Enumerated the sizes of DDR3, DDR4 and DDR5 for easy access and easy updates if necessary. - Added code in spd.C to set the size of the DIMM at presence detect Change-Id: Ia08fd41ef93f54f7f695c92e346e92bda8cd6d64 RTC: 202746 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70008 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Replace attribute I2C_MUX_INFO with attribute FAPI_I2C_CONTROL_INFORoland Veloz2019-01-154-103/+2
| | | | | | | | | | | | | | | -- Just removed all instances of I2C_MUX_INFO and replaced with FAPI_I2C_CONTROL_INFO if not already there. Change-Id: Ie161abb25ef75b632d6c429fb247ccbd04eb2135 RTC: 203024 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70022 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fix EEPROM_VPD_PRIMARY_INFO attribute on proc targ in axone sim XMLChristian Geddes2019-01-141-4/+8
| | | | | | | | | | | | | | | | | | | | | | Up until this point in P9 systems this attribute has had the maxMemorySizeKB = 0x80 (128 KB) and the chipCount = 0x02. While this is partially true, hostboot should never access the 2nd 64 KB chip. The MVPD is completely stored in the first 64 KB chip. This commit intentionally does not fix previous system XMLs but it might be worth investigating. MRW is still supplying the old 0x80, 0x02 values for Nimbus/Cumuls system so it was decided to leave old values in our sim xmls for those systems. RTC: 196805 Change-Id: Ibec7412359b6cda24a255ec612a5774a7ed3ac30 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70259 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* HTMGT: Clear OCC reset counts after an hourChris Cain2019-01-142-36/+36
| | | | | | | | | | | | | | | | | | - add HTMGT/OCC data to elogs - parse HTMGT/OCC data in elogs - add reset count per OCC since last boot - remove unused legacy pstate attributes/code Change-Id: I69f9fe504af13eae86ec423a329a7bc46286f906 RTC: 202016 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69717 Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Sheldon Bailey <baileysh@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* No parent rollup for OBUS childrenMatt Derksen2019-01-112-3/+13
| | | | | | | | | | | | | | | HWSV code is deconfiguring either SMPGROUP or OBUS_BRICKS under the OBUS. Need to prevent the deconfigures from also deconfiguring the parent OBUS. Change-Id: Ibca2766009b63582fcfa537139a078bef3a58f47 CQ:SW454103 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70322 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add presence detection for i2c mux targetsChristian Geddes2019-01-112-0/+12
| | | | | | | | | | | | | | | | | | | | | | | This commit removes the ddimm.C file that had the deviceFramework routing for OCMB presence detection and replaces it with a new file in src/usr/i2c/i2cTargetPres.C that is more generic for any target that has the FAPI_I2C_CONTROLLER_INFO attribute. The i2c_mux target also now uses this same code for its presence detection. As a result of this change the src/usr/i2c/mux_i2c.* files have also been removed. When getting rid of the ddimm.C file I had to put the IDEC device routing somewhere else so I moved it to the hwasPlat code where the other IDEC device routes are registered. RTC: 196805 Change-Id: I27e5e3e8d0fe107c3d44a450e20efa6f50fa0c5f Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69944 Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Real OCMB presence detection support for Axone simicsChristian Geddes2019-01-082-17/+358
| | | | | | | | | | | | | | Previously a hacked up copy of OCMB presence detection that always returned that the OCMB was present. This commit will actually look up the VPD to determine if the OCMB is present or not. Change-Id: Id8c51587b9e5c63dfd68d2463f24aa419426d9ab Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69905 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Deconfigure parent if no more functioning children of child's typeMatt Derksen2019-01-081-1/+5
| | | | | | | | | | | | | | | | | | Defect discovered that a DIMM deconfig did not rollup to the membuf because the membuf also has an l4_centaur child. The fix is to check that the parent has no more children like the one being deconfigured. Also make sure that deconfiguring l4_centaur does not deconfigure its parent membuf. Change-Id: Ic499092d0da926dcd3e0c08f5205e491e04f9680 CQ:SW451955 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70093 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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