| Commit message (Collapse) | Author | Age | Files | Lines |
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Previously the comment at the top of this xml file stated that a
MCC has 4 OMIs when in reality it only has 2.
Change-Id: I442beceefcec5ad3601d7b2ec96f89ab52096b46
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/89268
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
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Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com>
Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
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During swift bringup we realized that we had the MUX_SELECT wrong on
all of the OCMB/DIMM targets in our simics xml. Basically we were
OR'ing a 0x08 to the value that we should not have. The fix was to
add the OR'ing of the 0x08 to the code, and subtract 0x08 from what
we had set in the xml we use for simics. The net result was nothing
but this makes our XML more correct. For some reason this change
was not propgated to the dimms. This commit subtracts 0x08 from
the MUX_SELECT of the dimms in the simics xml for Axone.
Change-Id: I915d1f51d66bf0089346afa7f8c491de69bb1498
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/83205
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
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Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: William G Hoffa <wghoffa@us.ibm.com>
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Reviewed-by: Nicholas E Bofferding <bofferdn@us.ibm.com>
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- XML Additions for all targets on 2nd proc
Change-Id: Ib8a860e4679e08253076abbbade98f4ba172e81d
RTC: 208448
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/82685
Reviewed-by: Christian R Geddes <crgeddes@us.ibm.com>
Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Nicholas E Bofferding <bofferdn@us.ibm.com>
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During simics bringup we figured out that the mux selects needed to
be between 8-15. We learned during bringup this is because the real
0-7 select needs to be OR'ed with the enable bit for the model of
mux. This commit does the ORing correctly and subtracts 8 from all
of the muxSelects used in the simics xml so we match what the MRW
is doing.
Change-Id: I45faab455afdfc63ac05fc2637890f9d0137a444
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/81397
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
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Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Roland Veloz <rveloz@us.ibm.com>
Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
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After we parse the SPD to determine correct frequency settings we
need to check if the optimal settings found differ from the original
settings we booted with. This commit adds a check for OMI frequency
changes in addition to the existing nest frequency and mc sync mode
checks.
Change-Id: Icaf64eda225df3aab82a033866663e3103cef55f
RTC: 207596
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78739
Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M Crowell <dcrowell@us.ibm.com>
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While parsing the EEPROMs of the system as part of the EECACHE process
if we detect a part has been replaced, removed, or added then we must
call markTargetChanged to notify hwas to take appropriate actions.
This commit also introduces the new preloaded EECACHE section for simics.
Change-Id: I9f2a8a62d5c6f9a6c66a0c0c7ed5ed86f7d94aec
RTC: 211109
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78762
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
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Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Reviewed-by: Roland Veloz <rveloz@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Somewhere along the line we updated the OCBM's i2c information but never
updated the dimms. This resulted in the eeproms being cached twice.
Change-Id: Ia58d624c3711e22ad5eaaccc8aa39be2b6c23ca4
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78775
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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The dimm/ocmb i2c information should match up, especially for the
VPD_PRIMARY attribute. Also we had a problem where the settings we
had for the dimm target was getting targets that were not present
in the simics model showing up present to hostboot. By forcing targets
we no should not show up to have invalid devAddr fields set in the
attribute, we avoid having targets show up when they should not.
Change-Id: I3002e81d39ec78f3ba25c22ce9d29e718ee68df1
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78415
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
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Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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- Updated simics_AXONE.system.xml with the valid target
configuration that we should be using for NPUs in Axone.
- Updated target xml files as well
- Corrected 1 PG rule that no longer applies
- Also modified the OBUS_BRICK layout in simics_AXONE as well
Change-Id: I05c68be027cd4da39afabee04fefbb266b87c5fb
RTC: 208518
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76510
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: Glenn Miles <milesg@ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
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Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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This commit is an audit of the traces that have been added
in Axone. This commit should remove ~32,000 lines of traces from
hbTracMERG which were result from a few poorly placed trace statements.
Also in this commit a few xml attribute are fixed which were causing errant
traces.
Change-Id: I6ddcfa449aa94e1c661dcf08ec1482be1d5b4b14
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/77754
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
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Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Glenn Miles <milesg@ibm.com>
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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This commit moves the Explorer-specific OCMB_CHIP target into the
'generic' OCMB_CHIP target so that there is only one target. This
target will also be used for Gemini. Changes were also made to look
for Gemini vs Explorer where appropriate based on ATTR_CHIP_ID.
Change-Id: I91b79195bf997a6af4e2ae0a3326ed5a1c7887ec
RTC:205563
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/77220
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
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Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Glenn Miles <milesg@ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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Adds a new enumerationType called EEPROM_CONTENT_TYPE as well as a new
field to the EEPROM_VPD_PRIMARY_INFO and EEPROM_VPD_BACKUP_INFO called
eepromContentType. EEPROM_CONTENT_TYPE serves to define the constants
for the five types of eeprom content types; they are: RAW, DDIMM,
ISDIMM, IBM_FRUVPD, and IBM_MVPD.
There are five targetTypes that default eepromContentType to the
appropriate value for that targetType; they are: PROC, OCMB, NODE,
LCARD_DIMM, MCS. Due to the limitations of targeting, an enumeration type
can't be used with complexTypes. Instead, eepromContentType matches the
values of the five types defined by EEPROM_CONTENT_TYPE.
This commit is used to support Part and Serial Number lookups when
deciding EEPROM cache content updates.
Change-Id: Ie8f1e81ff7273c76178c5c621771d5b6c75903e9
RTC:203788
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76855
Reviewed-by: Glenn Miles <milesg@ibm.com>
Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
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Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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The XML for the RAM1 register was not being parsed correctly
resulting in too few registers being allocated in
uchip_regs.chip not defining all of the registers. This
latest build adds those registers manually until the parser
can be fixed. This build also sets the POR values for the
RAM1 registers.
Also changes OCMB I2C addresses to 0x40
Change-Id: Icd2df80874200741d82fc152cb4b8bdbc75c5bed
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76764
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Reviewed-by: Matthew Raybuck <matthew.raybuck@ibm.com>
Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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We had ocmbs0-7 pointing at port 0, when according to the simics model
these should be port 1. Also we have ocmb8 set incorrectly, according
to the simics model this should be port 0 but instead we had it set
to port 1. This commit addresses these issues.
Change-Id: I7eb0baeb5a7725f0da3452b121d07690bfb73cb0
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76900
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
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Reviewed-by: Glenn Miles <milesg@ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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As per the P9A IPL Flow document we must call p9a_omi_dccal in
istep 12.6 during axone IPLs after we have called p9a_omi_io_scominit.
Update XML to set approriate OMI_DL_GROUP_POS attribute settings on
OMIs. This was done using the mapping described in the description
of the FAPI attribute to map the CHIP_UNIT to this group pos.
Change-Id: Ib48967b0b830ddf43b0028b978fca19d6ad9be8f
RTC: 195554
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72971
Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
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Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Forgot to add FAPI_POS with original PMIC target commit.
New DIMMs will support 4 PMIC targets, so update
simics_AXONE based on that information.
Change-Id: I36b966ce7b57f0c1d7124893c5d487f34797b9d7
RTC: 206184
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76173
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Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: Glenn Miles <milesg@ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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PMIC is a voltage regulator for the DDIMM.
It supplies power to the OCMB and DIMM targets.
Change-Id: I10c1b03169f53b070f521ec9cd60cdbd15c4a268
RTC:206184
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75136
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
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Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Glenn Miles <milesg@ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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The simics model only has 9 valid ocmbs represented on the master
processor. ocmbs 0-7 are behind a 1-8 MUX and ocmb 8 is directly
connected. This leaves ocmbs 9-15 for us to fill out. The information
must be valid enough to allow the code to process the targets correctly,
but we must fake out some information for the the sake of the awkward
simics model. We have decided that for ocmbs 9-11 we will match
everything from ocmb8 except increment the devAddr of the I2C info
attributes A2,A4,A6, D2,D4,D6. For ocmbs 12-15 we have picked a new port
(2) and used the same dev addr increments. This slightly invalid data
allows the code to have the targets show up as PRESENT but not
FUNCTIONAL
Change-Id: I3aec520a04e89829554c277a4cf02e1981b7ed84
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75999
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
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Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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While setting up the virtual memory mapped IO to the OCMB chips we
make some assumptions that the OCMB MMIO spaces will be contiguous.
The p9a_omi_setup_bars HWP uses OMI_INBAND_BAR_BASE_ADDR_OFFSET to
set the scom registers that determine the physical offset mapped
to the IO. When setting up the Virtual addresses hostboot uses to
represent the physical mmio address, we must validate that the attribute
matches with what we calculated. While doing this we found that the
virtual address attribute was being calculated incorrectly. It was
not localizing the OCMB position relative to the MC which is required
when calculating the offset into the MC bar.
Change-Id: I0ebbcd38e19a238e2cc16791bb0595536788bb7f
RTC: 201493
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75631
Reviewed-by: Matthew Raybuck <matthew.raybuck@ibm.com>
Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Reviewed-by: Roland Veloz <rveloz@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Previously this attribute was defaulted to 2400 for all configs.
For axone , in order to make the VPD that is exists in the model
valid we must set this attribute to allow higher frequencies
Change-Id: I209ea750e05814dd601a69dfab571d2f0da980bc
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75782
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Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com>
Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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In the simics model we have 9 OCMBs per processor, 8 behind MC01 that
are behind an 1-to-8 MUX, and 1 behind MC23 that is directly attatched.
Our XML was not portraying this correctly as it was showing that the
directly attached OCMB was OCMB0, which according to our XML is behind
MC01. This commit makes it so OCMBs 0-7 (behind MC01) have i2c attributes
that say they are behind the mux. OCMB8 will be behind MC23 and will be
the directly attached OCMB.
Change-Id: I7ef0cba6021bccc07ca2ccfefa2e02c9ec68eba4
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75555
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Reviewed-by: Chen Du <duchen@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
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The eff_grouping code for axone is struggling to putting the 8 ddimms
we have behind MC01 in the current axone simics model into groups <8.
This change will allow all possible group sizes and allows the code
to group these into 1 big group of 8.
Change-Id: Ic9d48524f53883014ff57451b1265202d955ece4
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75227
Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com>
Reviewed-by: Matthew Raybuck <matthew.raybuck@ibm.com>
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Tested-by: Christian R. Geddes <crgeddes@us.ibm.com>
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REL_POS was not set and therefore was defaulted to 0xFF. This was
causing calculations done by the MSS code to be off.
Change-Id: I879761be5a6625775bc0dcb4c38f97477678e6b1
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75244
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com>
Reviewed-by: Matthew Raybuck <matthew.raybuck@ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
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The i2c controller info attribute for the I2C Mux target had the
port information set incorrectly. This commit addresses that and
adds a debug trace that was helpful in figuring out this issue
Change-Id: I34b5c920e8fe4f0f0ea68ce5aaf268095aab9886
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/74864
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Roland Veloz <rveloz@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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Without this change during istep 18 we hit errors trying to determine
correct configs. This attribute was getting defaulted to 0 which got multiplied
resulting the software telling us 0 procs were allowed. By setting this
to 1 the issue was resolved
Change-Id: I78ed0a82036f86daf8de02d14107de86ccbf2d7f
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/73151
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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This attribute was likely copied from Cumulus where single dimm
configurations we invalid. In Axone single dimm configurations should
be valid. I hit this during bringup when I had the simics scripts configured
in a way that was only making a single dimm detectable
Change-Id: I13908a18ba22a63fae74c68f2d43221dce0a07f1
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/73194
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Chen Du <duchen@us.ibm.com>
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Disabling a few testcases temporarily until Axone gets off
the ground.
Cleaned up some bad traces, etc in existing code.
Add CI support for AXONE config
Change-Id: I7a2140366e225971c91a50cec1f7e822e4847078
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72186
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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Currently in Axone simics we can boot up to exit_cache_contain
before failing.
Change-Id: I56ca91045c2645d69da5ba9cb18616db2a90706d
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72721
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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A new CONFIG variable has been created that will trigger the
istep dispatcher to start the CXX unit test execution at some
point during the boot rather than waiting until the end. This
is useful for quick targeted testing and also for early bringup
of new platforms.
CONFIG_EARLY_TESTCASES is the new flag, and it uses
ATTR_EARLY_TESTCASES_ISTEP to determine where in the boot to stop.
Changes were required in several testcases to either skip the
test completely (typically due to not having enough memory) or
to add additional logic to load new support libraries on demand.
The Axone platform has this flag enabled by default to execute
testcases at the end of istep 6.9 (host_gard).
Change-Id: I1da9479e2147d68102f44d60e064c3b79cc41bb6
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71693
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: Roland Veloz <rveloz@us.ibm.com>
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
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There was a bug where the i2c controller information had the wrong
port values for OCBM targets 2-8. Correct value for the port for
these targets is 0. In the current axone simics model OCMB 0 is on
port 1 and OCMBs 1-8 are behind a 8-1 mux on port 0. Port was correct
for OCMB 0 and 1 but incorrect for 2-8.
Change-Id: Id34a812e2f278d0bc90beb44ba26b0fec32d2087
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71700
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Roland Veloz <rveloz@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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This commit introduces a new EEPROM_CACHE deviceOp and registers
the OCMB_CHIP, PROC, and DIMM targets to it. This is part of the
larger effort to transition for a "VPD" cache to an "EEPROM" cache
in pnor. The deviceOp is currently called in hwasPlat's
platPresenceDetect if the target in question has a
ATTR_EEPROM_VPD_PRIMARY_INFO associated with it. The layout for the
new EECACHE section in pnor is defined in eepromCache_const.H.
Essentially it is a header that contains an array of record headers
that tell where in the EECACHE pnor section a given cached EEPROM
can be found. All EEPROM targets will be allocated space in the
EECACHE section but only present targets will have their cache
filled in.
RTC: 196805
Change-Id: I49c341c9784be04ddf0259bd444f06c9baf8c6f1
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70520
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Reviewed-by: Roland Veloz <rveloz@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Per IPL Flow doc for P9 Axone, p9a_ocmb_enable needs to be called
on all processors during istep 10.4
RTC: 195553
Change-Id: I50fa98959008cccfe0620c8bc6e62f33ee91c135
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71229
Reviewed-by: Roland Veloz <rveloz@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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- Expanded the i2cPresence API to take in the I2C MUX bus selector
and the I2C MUX path. This will facilitate setting the bus selector
within the i2cPresence function.
- Set the I2C MUX bus selector in the i2cPresence function via the
call to i2cAccessMux.
- Simplified the i2cAccessMux API. It only takes in what it really uses.
- Added several dump utility functions that are strictly there to
dump certain data structures on an as needed basis. Was useful
to have these utilities to see certain data structures but does
not slow down the run time because the user must explicitly call
them.
- The structures that can get dumped are TARGETING::EepromVpdPrimaryInfo,
eeprom_addr_t, TARGETING::FapiI2cControlInfo and I2C::misc_args_t.
Change-Id: I14943687a934bfb21bc5cf3db0540b7e629a6257
RTC:203596
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71011
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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Current axone simics model has this as the x75. This might change
but for now we will set it to be x75 in the hostboot xml so we
dont get error logs.
Change-Id: I7d86bb36cbb31fd4bae02a7e7f29bc3f385fd6d8
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70827
Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Reviewed-by: Hieu C. Nguyen <hieu.nguyen@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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-- Just removed all instances of I2C_MUX_INFO and replaced with
FAPI_I2C_CONTROL_INFO if not already there.
Change-Id: Ie161abb25ef75b632d6c429fb247ccbd04eb2135
RTC: 203024
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70022
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Up until this point in P9 systems this attribute has had the
maxMemorySizeKB = 0x80 (128 KB) and the chipCount = 0x02. While
this is partially true, hostboot should never access the 2nd 64 KB
chip. The MVPD is completely stored in the first 64 KB chip. This
commit intentionally does not fix previous system XMLs but it might
be worth investigating. MRW is still supplying the old 0x80, 0x02 values
for Nimbus/Cumuls system so it was decided to leave old values in our
sim xmls for those systems.
RTC: 196805
Change-Id: Ibec7412359b6cda24a255ec612a5774a7ed3ac30
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70259
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Reviewed-by: Roland Veloz <rveloz@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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This commit removes the ddimm.C file that had the deviceFramework
routing for OCMB presence detection and replaces it with a new file
in src/usr/i2c/i2cTargetPres.C that is more generic for any target
that has the FAPI_I2C_CONTROLLER_INFO attribute. The i2c_mux target
also now uses this same code for its presence detection.
As a result of this change the src/usr/i2c/mux_i2c.* files have
also been removed. When getting rid of the ddimm.C file I had to put
the IDEC device routing somewhere else so I moved it to the hwasPlat
code where the other IDEC device routes are registered.
RTC: 196805
Change-Id: I27e5e3e8d0fe107c3d44a450e20efa6f50fa0c5f
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69944
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Roland Veloz <rveloz@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Previously a hacked up copy of OCMB presence detection that always
returned that the OCMB was present. This commit will actually look up
the VPD to determine if the OCMB is present or not.
Change-Id: Id8c51587b9e5c63dfd68d2463f24aa419426d9ab
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69905
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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--- Added an I2C MUX target at engine 3, port 0, device address 0xE0
--- Added EEPROM_VPD_PRIMARY_INFO data to the DIMMs. This info also
includes the I2C MUX target details to get to the MUX.
EEPROM_VPD_PRIMARY_INFO fields:
* byteAddrOffset set to 0x00
* chipCount set to 0x01
* maxMemorySizeKB set to 0x4000 (4 KB)
* writeCycleTime set to 0x05 (5 ms)
* writePageSize set to 0x20
--- Updated the I2C_BUS_SPEED_ARRAY attribute for target sys0node0proc0.
Added speed 400 to array that corresponds to engine 3, port 0.
Change-Id: Ia1965803a12f08e816b19d9d9a6fe2dfe3a2df36
RTC: 202358
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69835
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Tested-by: Christian R. Geddes <crgeddes@us.ibm.com>
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Initial DIMM xmls was taken from cumulus where we skipped
dimms due to memory pair testing. In axone it makes more sense to
have use dimms 0-8 instead of 0,2,4,..14
Change-Id: I9d3c85e96415c0a7908c859697891da703ea8e9d
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69902
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com>
Reviewed-by: Roland Veloz <rveloz@us.ibm.com>
Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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This attribute defaults to 0xFFFF which causes errors if used in calculations
Change-Id: I0e7fc211ed1c8c78e00c57a3f0adb138fe1ffedc
RTC: 196805
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69573
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Roland Veloz <rveloz@us.ibm.com>
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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- Updates for new Simics infrastructure
- Finds Functional Master Proc
- Finds TPM
- Boots to istep6.9 before failing target verification
(more Axone FW changes needed)
Change-Id: Ib3f44008ed12202777c2edacea42d5cb20a4a7a3
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67206
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
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This is an untested version of the new MMIO device driver that
will give access to the OCMB. It will be tested once the Axone
model IPLs in Simics.
Change-Id: I4bc1d2f7306f1b238d1d65c24462ac4121266b11
RTC: 189447
RTC: 189220
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66941
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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In order to force Nest freq to be determined by 1st valid #V
bucket we must default the attr ASYNC_NEST_FREQ_MHZ to 0xFFFF.
This was changed as part of general axone simics bringup
Change-Id: Ifdf4c5514e12eac1a290868d807710759ef98edc
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69574
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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- Updated data structures gpioAddr_t, eeprom_addr_t, misc_args_t, nvdimm_addr_t
and tpm_info_t with I2C MUX data members. Also added constructors to these
structures to default there data members with the correct default info.
- Updated macros DEVICE_I2C_PARMS, DEVICE_I2C_ADDRESS and
DEVICE_I2C_ADDRESS_OFFSET to take the I2C MUX bus selector parameter and the
I2C MUX entity path.
- Added method i2cAccessMux to file i2c.H/.C that will setup the call for the
I2C MUX. Method i2cCommonOP calls i2cAccessMux which then calls i2cCommonOp
with appropriate parameters for the I2C MUX: i2cCommonOP -> i2cAccessMux
-> i2cCommonOP.
- Updated i2ctest.H with new I2C MUX params to get it to pass.
RTC:191352
Change-Id: I6a70860eb2286bbd23d6157d72351b8adfa21aac
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66651
Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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The hand-writen system xml for AXONE had incorrect values set for
various attributes which describe FSI_MASTER/ALTFSI_MASTER a chip's
master FSI device.
Change-Id: I7df5e1155d4bd6c280383483a0bb1e46c75d04ce
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68816
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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This commit puts in the plumbing to have xmltohb.pl look for
ATTR_OMIC_PARENT attributes on the OMI targets and with the value
of that attribute define a bi-directional relationship between the
given OMI target and its defined OMIC parent. Each target in the binary
will have pointers to its associated parent/child. When getChildren<OMI>
or getParent<OMIC> is called in the FAPI2 api for a OMIC or OMI target
respectively, then the Hostboot platform implementation of these
functions will route to the new getParentOmicTargetsByState and
getChildOmiTargetsByState functions that were defined to perform lookups
in the targeting binary for this relationship.
Change-Id: I8cd901864a700c9fe575dfa0916d5e78760a7b0c
RTC: 172969
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68541
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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There was some incorrect/missing information on the CAPP target
in the newly hand created simics Axone xml. The FAPI_POS attribute
for capp1 was set to 0, when it should be 1. Also the chiplet ID
was incorrect for capp1. The chiplet ID for capp1 in all p9 systems
should be 4.
Change-Id: I42392b2f7afd1827cdad15e6308750a055f8a859
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68504
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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There was an error in the hand-written simics xml for the Axone model.
Instead of using CHIPLET_ID = 0x08 for MC1 chiplet and its sub-chiplets
the XML had CHIPLET_ID = 0x07. This is incorrect and is fixed with this
commit.
Change-Id: I821aa175dd3b0beeb9124ffbc80dbbe045a35da0
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68487
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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- This is part of a series of commits that will build up
the full Simics Axone XML. This commit is adding all of
the PERVASIVE target type instances
Change-Id: I2df3b432d9e6b3018f097701588d514ccaa8adf9
RTC: 197037
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64253
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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