| Commit message (Collapse) | Author | Age | Files | Lines |
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Change-Id: I636dbfad6cc695e42e6de403e26a91634a4b370d
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/10715
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Remove all untagged fixme/todo comments
Adde new parm to error log constructor to avoid extra code in
common software error case
Update error callouts
Add strncpy
Change-Id: I8bd8f48193a96b79db91ed35c4fd485e6da38dba
RTC: 67921
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/7921
Tested-by: Jenkins Server
Reviewed-by: Michael Baiocchi <baiocchi@us.ibm.com>
Reviewed-by: Brian H. Horton <brianh@linux.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Along with some SBE Update improvements, this commit adds
additional code to re-IPL the system after an SBE Update has
taken place. NOTE: Full SBE Update code path to be
enabled with RTC 89503.
Change-Id: I6beaee026d3fc6aaa76bfc7ca387d6765754f0c3
RTC: 47033
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/6986
Tested-by: Jenkins Server
Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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The SecureROM::_cleanup() function was not putting all of the
memory reserved for the secure rom device back into the proper
state.
Change-Id: I9b11736d7e3cae8f5e21872ad740aef67ac4298e
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/5365
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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This change adds the basic structure needed to call and
implement a verifcation of a signed container via the
loaded/initliaized Secure ROM device.
Change-Id: Ieada4eb0b557fc556cd12647a698bbfa16aba278
RTC:64764
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/4958
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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* Start kernel in 1/4 cache mode per Secureboot.
* Copy Secureboot header for base image for later use.
* Blind-purge bottom half of cache.
* Add bottom of cache into memory maps for 1/2 cache mode.
RTC: 64762
Change-Id: I1b45f30a2d45c9709d4fd486cfe0ca2ce86b051c
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3773
Reviewed-by: Michael Baiocchi <baiocchi@us.ibm.com>
Tested-by: Jenkins Server
Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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