| Commit message (Collapse) | Author | Age | Files | Lines |
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Change-Id: I4148bc4c770b7c3c10fe25aa18d57d1a4301e5a9
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/11194
Tested-by: Jenkins Server
Reviewed-by: Christopher T. Phan <cphan@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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A function was added at the very end of the SBE Update procedure to
ensure that any processor continuing with the IPL has the same SBE
Image level as the Master Processor. Any processor that had an
error during the update process is also deconfigured since we can't
trust its SBE Image level.
Change-Id: Id6dd46ca71ad97ca9f0e6ba30110ea400102a3b4
RTC: 101539
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/10868
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Adds attribute support for MNFG_FLAG_FSP_UPDATE_SBE_IMAGE and
adds its use to Hostboot SBE Update code.
Change-Id: I742390f51e691d268e131127baaad5609f89406a
RTC: 97441
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/10768
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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This code improves how cores are selected in the case that the
p8_xip_customize() procedure can't fit certain cores into the
custom SBE image. The fix ensures that 'good' cores are always
used when possible.
Change-Id: Idf606dca9316879f5aae4c728b582de628a54667
RTC: 98673
Backport: release-fips810
CQ: SW253657
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/9842
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: I2e5dadc3b8b8280d8eaa5e7662e9ecbc4dda5d88
RTC: 96020
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/9211
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Michael Baiocchi <baiocchi@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: Ia7e6552570f2da28ec3742c20da70a64877214c2
RTC:97632
CMVC-Prereq:917712
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/9257
Tested-by: Jenkins Server
Reviewed-by: MIKE J. JONES <mjjones@us.ibm.com>
Reviewed-by: Donald E. Dahle <dedahle@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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This code will add in as many EXs as necessary for
p8_xip_customize() and will pass a mask with 0 cores into the
function if necessary.
Change-Id: Id355ff5440cfea7db3fb87964063e7c39305c346
CQ: SW246073
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/9246
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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SBE Update code looks for MODEL attribute on processor and skips
the update if it is Venice. To be re-enabled with Story 97441.
Change-Id: I42267d5e09cfb8a9e7c3644d06f63f5b68bc68f3
CQ: SW245477
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/8772
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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SBE Update code must verify it is actually running on simics when
looking for the special simics value in the SBE image.
Change-Id: Idce720c777ee727d4e71762db533004e9c5da9e0
RTC: 94883
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/8378
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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SBE Update code will check if system is in istep mode and that
there is a FSP present. If both are true, then SBE Update
will be skipped. Also, informational error logs are created for
each successfully updated SBE Seeprom.
Change-Id: Ibfd2209d85704c757fde95334b350c1e2b6282c3
RTC: 89503
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/8431
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Jenkins Server
Reviewed-by: Brian H. Horton <brianh@linux.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Re-enabling SBE Update code. Also added better trace for update
decisions and re-arranged 1 structure for ease of debugging.
Change-Id: I879a3a250b7622145a92e1b2aebaaa3075cba156
RTC:89503
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/8244
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Along with enabling hostboot SBE Updates, this commit also improves
the interaction with the p8_xip_customize() HW procedure.
Change-Id: Iea1eda7581cba8f9569594678f0cb0b9abb7c742
RTC: 89503
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/7806
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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These updates are required before enabling hostboot to do the
SBE Updates during the IPL.
Change-Id: I2b14c1a96940f06589a5712c2126bc51e2546835
RTC: 89503
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/7555
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Also added Hostboot Base image version header
Change-Id: I0fc878a48b9449e5d4875fd14525faefe01b1ace
RTC: 34764
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/7276
Tested-by: Jenkins Server
Reviewed-by: Brian H. Horton <brianh@linux.ibm.com>
Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Along with some SBE Update improvements, this commit adds
additional code to re-IPL the system after an SBE Update has
taken place. NOTE: Full SBE Update code path to be
enabled with RTC 89503.
Change-Id: I6beaee026d3fc6aaa76bfc7ca387d6765754f0c3
RTC: 47033
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/6986
Tested-by: Jenkins Server
Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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This initial commit will be used to create the new SBE
directories and files. It also supports the usr functions
to find and copy SBE PNOR images. NOTE: It will not enable
Updating SBE SEEPROMs in the IPL.
Change-Id: I3f545a134493c7595ce50fd885478bbe606de472
RTC: 47032
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/6311
Tested-by: Jenkins Server
Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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