| Commit message (Collapse) | Author | Age | Files | Lines |
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-SBE is tight on space and if ALL core data is applied
then ring override section doesn't fit. Since this is
debug only, apply ring overrides to the base and let
code winnow down the boot cores to fit constraints
Change-Id: Ic0338e94b65d0481c51aac1dfa42f1c95abc9a4c
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39496
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Also enable the use of the FSP specific pnor layout.
CMVC-prereq:1021911
Change-Id: If346c59537928d12af1dfbd085b2a492398cbf27
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39159
Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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This commit updates the HW Key Hash section of the HBBL partition
pulled from PNOR before the SBE Update customization process.
By default the HW Key Hash used to boot the system is used, but
inside a Secureboot Key Transition (SBKT) IPL the new HW Key Hash
will be used.
Change-Id: I5ad235784cca53d746a46f5154c35f77540d24ba
RTC: 167585
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38926
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Stephen M. Cprek <smcprek@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Reviewed-by: Marshall J. Wilks <mjwilks@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
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Change-Id: I92d1b9544168cfa8780d5be1a666fb3e748bf942
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38627
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
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This reverts commit a7bf050d4ddba121d7502939fc0c4ce517ef8e42.
Change-Id: I95ddfe544cc537fcc847990dc9f85eec8f2912a1
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39131
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Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I3817cbf8eb25bc83d538d9eb6ea4c5e801603f74
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38543
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
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Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I2704ad9a110a52fe0ff0e290fdd9205a42bbd050
RTC:159915
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38326
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Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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This commit adds an interface to read the HW Key Hash located in the HBBL
section of each Processor's two SBE Seeproms.
Change-Id: I906434269746c296c646f7b0594575c58b145294
RTC: 167585
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38465
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Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Reviewed-by: Stephen M. Cprek <smcprek@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Base SBE boot side for slave processor off SB keyword in MVPD rather
than off boot side used by master processor.
Change-Id: I3165d536f104c0d1f394de93a390bd0f722e4777
CQ: SW383676
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38152
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
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Reviewed-by: Richard J. Knight <rjknight@us.ibm.com>
Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Remove the temporary check in the slave processor handling that
skips SBE Update if Simics is running.
Change-Id: I25d831bf71c5e13821e28b45905a2a607ad08596
RTC:168193
Depends-on: Ic0bde9a4ff573eb7e7eba180ded7324677457c90
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36035
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Reviewed-by: Elizabeth K. Liner <eliner@us.ibm.com>
Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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The HBBL also contains the securerom code and hw keys' hash
for verification purposes. So looking for the end of the HBBL
code leaves out those sections
Change-Id: I73a1b5c50e3a5b3f642ca569b90e79dbe4c4ba1e
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35979
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Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Hit a criss-cross of merges and config variable changes that
exposed a little code bug
Change-Id: Ibcd246b2fe89e54cbc0c41841cae47a51934f682
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37128
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Prachi Gupta <pragupta@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Matthew A. Ploetz <maploetz@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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The HB Bootloader now owns the responsibility of selecting the
appropriate side of PNOR to use when loading the HBB image. There
is no longer a HBB pointer in the SBE image itself. This commit
removes the code that dealt with that support. There is also
some cleaning up of a few other related functions.
Change-Id: I35bfccb3590f81867d8222333cb4be66718828fa
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36358
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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- Original code was repeatedly allocating/freeing 256K chunks of
heap memory
- Other tasks in the background fragmented the allocations and
could lead to out of memory conditions on large core number
parts
- Fix is to allocation one large chunk up front and use that for
all operations
Change-Id: Ie6df7eb9ebce526d87480425e842f8d1be8d78d4
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36920
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
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Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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- Fixes issue in istep 7 where HB was attempting
to update the slave chip's SBE, as SBE update
expects SBE PSU interface to be active
Change-Id: Id90f1b0f23c668a153a7e2725e762c761ee3c490
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36792
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
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Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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After customizing the PNOR data is no longer needed but remains
resident in memory. This change forces the pages to be released
so that the memory is free for other allocations without needing
to castout or evict the SBE pages.
Change-Id: I7c7298cc279d110fcf188514fd04f9ed3e0a81e8
Signed-off-by: Robert Lippert <rlippert@google.com>
Signed-off-by: William A. Kennington III <wak@google.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36209
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Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Can be removed with updated p9_select_boot_master.C propagated to CMVC.
Change-Id: I8fbf416c804104e3c2da3bd308f2d19b25d7d19c
RTC:167179
CMVC-Prereq: 1015962
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35600
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Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Call sendPsuQuiesceSbe before doing the deviceWrite of the SBE SEEPROM
with the SBE image.
Change-Id: I6d3cec5b0430b8083acabc30bb7ff14ba5e1b56e
RTC:158899
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34994
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Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Long-term fix to get boot side before SBE is started
Code can attempt to get the boot side for an SBE before the SBE is
started and the SCOM can be read. In this case the boot side for the
master processor should be used. Second step of this fix is to
read the SCOM for the master processor target when finding the boot
side of the master processor SBE or a slave processor SBE that is not
started and read the SCOM for the slave processor target only after
its SBE is started. A new processor target attribute will be set
after the processor's SBE has been started.
Change-Id: I12f97435f8872e41f06dcff6120abe4c24a1bb22
CQ: SW378865
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35938
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Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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-Added the ability to notify the istep dispacher discontinue
executing isteps
-Added call to stopIpl() api in sbe update path
-Added internal graceful reboot request for SBE update and
reconfigure re-ipl usage
Change-Id: I5682992802b0f373df91378a38187d032bb3a0b4
CQ:SW361886
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27959
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Reviewed-by: Matthew A. Ploetz <maploetz@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28574
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
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- RINGOVD partition is optional, don't error out on it
- Default ATTR_SYSTEM_IPL_PHASE to HB IPL PHASE
Change-Id: Ia672617713aee9e35345c76aab0bba96bc999024
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35950
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Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
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Modify core count to be the minimum of what is desired and what is available.
Change-Id: I0859db40944571e084ec2c8aa338ccf1a4c909e6
CQ: SW378586
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35811
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Code can attempt to get the boot side for an SBE before the SBE is
started and the SCOM can be read. In this case the boot side for the
master processor should be used. First step of this fix is to remove
the #if logic around the block to select the master processor target.
Change-Id: Idb08165a3e2c9217adc17592ffb56b9434182acd
Depends-on: I8111a40c8aa53e1699b0381440584db3dd6c3fc6
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35730
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Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
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Change so that an error log and an unknown side value are returned
if the boot side cannot be determined by the function.
Change-Id: I7be3abfda9aeec46070270c5785f837680b25a70
RTC:166492
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35267
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Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Unset NO_SBE_UPDATES in fsprelease.config.
Create ATTR_SBE_UPDATE_DISABLE to allow disabling updates.
Change-Id: Ic57d4e7a28d3778f6959d7665052ac7e9c9f73c7
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35288
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Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Because we aren't using read thread-local storage for the FAPI
variables (opmode, piberrmask, current_err) we need to ensure
that we never have multiple HWPs running at the same time. The
external interface that we use in all cases is FAPI_INVOKE_HWP so
that is where a mutex is placed.
This change also uncovered a couple bugs in how we were executing
some non-fapi HWPs in the SBE update code so I fixed those as well.
Change-Id: Ie8817da62dd4e6bc9ed3ac2debf126f6d05c2b23
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34518
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Reviewed-by: Richard J. Knight <rjknight@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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While verifying SBE boot from both SEEPROM sides, several changes were
identified and a hack was created to fix a HWP bug.
1) Replace use of SBE::setNestFreqAttributes with use of
TARGETING::setFrequencyAttributes.
2) Update TARGETING::setFrequencyAttributes to not pass in i2cBusDiv,
but instead to calculate this value.
3) Update TARGETING::setFrequencyAttributes to find the PLL bucket for
the new nest frequency.
4) Add a call to TARGETING::setFrequencyAttributes in call_mss_freq.
5) Remove finding PLL bucket from call_host_voltage_config. It is not
required since TARGETING::setFrequencyAttributes is being called.
6) Remove SBE::setNestFreqAttributes and SBE::checkSeepromNestFreq from
sbe_update.C as they are not being used.
7) Remove various variables, fields, and parameters because they are
unneeded after work above.
8) Add hack to set SBE boot side indicator back to primary side before
doShutdown in sbe_update.C.
9) Add syncAllAttributesToFsp call before doShutdown in sbe_update.C.
10) Add attributes for the nest PLL frequency data.
Change-Id: I97ea6386eb583a71c0dbec70adb9977e749dbfd3
RTC:152404
CMVC-Prereq:1014451
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34735
Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Reviewed-by: Marshall J. Wilks <mjwilks@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Add a function to set the boot SEEPROM for the target processor based off
the setting for the master processor.
Change-Id: Ie39ca011952ea5cf10a8b752268116265cc4fabd
RTC:162326
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34022
Reviewed-by: Matt Derksen <v2cibmd@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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Change-Id: Ibe443c8c937387ffa817d22fa72365b216f42151
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33414
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Need to add the p9_ringId.mk to the makefile for the sbe module so
that p9_ringId arrays can be accessed by code in this module.
Change-Id: I078f7217a9a0f0a78fde64a82e1a5d2529e94eb4
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33731
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Matt Derksen <v2cibmd@us.ibm.com>
Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Set NO_SBE_UPDATE in fsprelease.config.
Patch eepromdd.C to make write cycle time a minimum of 10 msec.
Find .hbbl section before attempting to append new HBBL to SBE image and
delete it if it already exists.
Use malloc rather than stack space for ring section buffer.
Fix i_maxImgSize value passed to procCustomizeSbeImg.
Fix SBE_ECC_IMG_MAX_SIZE calculation to include pad bytes.
Change-Id: I632e17851830acb1b365abc92438b0356232487c
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32487
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Matt Derksen <v2cibmd@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Tested-by: William G. Hoffa <wghoffa@us.ibm.com>
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Enable use of ATTR_SBE_IMAGE_MINIMUM_VALID_ECS.
Change-Id: Ia5fa6b1ea68137f148ebfc789b19c10f2476fcc7
RTC:161050
CMVC-Prereq:1009913
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31267
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Matt Derksen <v2cibmd@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Remove logic to conditionally set Nest PLL Bucket ID to 3 if the value
received for it is 0.
Change-Id: I781071e74333ef8c96651c27dbd29a5dc6777a2c
RTC:161398
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30832
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: Matt Derksen <v2cibmd@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Stop using FIXED_RING_BUF_SIZE, but instead use MAX_RING_BUF_SIZE.
Change-Id: I84022645fcc9d43d5eb0c6a087cd2b6ffd671700
RTC:161050
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31269
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Richard J. Knight <rjknight@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
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The debug tools use the scratch regs for communication
purposes with the debug tools, however the initial values
of the scratch regs are used for boot. Save the initial
values away so the mbox scratch regs can be used for debug
tools
Change-Id: I372f7d23bc03cf0c88c845a18ebb1c9657c364c5
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30880
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: Prachi Gupta <pragupta@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Changed SCOM that is read to determine SBE boot side to 0x0050008
and mask for the bit to check in that SCOM to bit 17.
Change-Id: Ibec557edae338d54a0b61a2c49e746c76afa57b9
RTC:160466
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30812
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Matt Derksen <v2cibmd@us.ibm.com>
Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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The SBE boots the system into a specific mode for MC/Nest running
synchronously. Hostboot needs to detect the mode that we booted
in and set our live copy based on that since it may be out of
sync from what our attribute might say.
Change-Id: I4d7839eb4dd7e40fa045006abfdedc35b16f956c
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30811
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I529056bf1380238f5064f18b39bc09ec97e7a112
RTC: 157659
Depends-on: Idea9e3ae8d08052e960c00c225522bbe8da3ea5e
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29521
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Matt Derksen <v2cibmd@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Enable call of p9_xip_customize in FSP environment.
Change-Id: I0cbcd11cdf458ffb018e58a20e05d2ec3fd38058
RTC:160466
CMVC-Prereq: 1007275
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30559
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Matt Derksen <v2cibmd@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change bus speed array from 4x3 to 4x4 (engines x ports).
Remove code to "Default everything off except TPM until MRW is correct and
simics model is complete".
Also clean-up some TODO comments.
Remove temp return statements from SBE update and resolve sides functions.
Skip additional content types when processing eeproms.
Change-Id: I490585ca48113fc2e07fc4194201361d04e93f22
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30323
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: Iabfb44d0f4fc1901c549baa5212db2e2bcf7a210
RTC: 156833
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30172
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Prachi Gupta <pragupta@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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This story is for general clean-up after the SBE Update work.
It will be used to turn off unit test traces, make changes that
were deferred from prior reviews, finalize selection of best
cores and handling of cores for p9_xip_customize, and turn off
performUpdateActions() call in sbeupdatetest.
Change-Id: I04747bd3897d84a6b3c3c6c7791b28a0708842f9
RTC:161074
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29955
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change to the gen script to ignore entries with content type
PRIMARY_SBE_VPD_SPARE or REDUNDANT_SBE_VPD_SPARE when MRW generates
ZZ_hb.mrw.xml.
Temporarily completely disable the SBE update to avoid
assert for missing I2C_BUS_SPEED_ARRAY data.
Change-Id: Id3b1b1b7f739cb0abff3c9ae1511af06e035f1d2
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30200
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
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Finalize changes needed to correctly set MRW for SBE Update and SBE SEEPROMs.
Check for receiving 0 as the Nest PLL Bucket ID.
Change-Id: Ic6d47a8135ccc01f15d5d0d6a64736da31661090
RTC:161049
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29995
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: Idea9e3ae8d08052e960c00c225522bbe8da3ea5e
RTC:157890
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29505
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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5) Test case additions and changes plus clean up TODO for testsbe
Add testSetECCSize, testInjectRemoveECC, and testFindHBBLInPnor.
Update testFindSbeInPnor, loadSbeModule, and unloadSbeModule.
Change-Id: I338fd7dacaf318c4ea6fb73f5655e3507cd73db8
RTC:159849
Depends-on:If9788c3bb2b56fbbaf4f668a1e153da79ad1757f
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29126
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Reviewed-by: Matt Derksen <v2cibmd@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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4) Bootloader-related changes associated with Story 138226: Changes
for P9 SBE.
Change-Id: If9788c3bb2b56fbbaf4f668a1e153da79ad1757f
RTC: 139757
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28276
Reviewed-by: Matt Derksen <v2cibmd@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Loop to run xip_customize on the pnor image for each core must still be
implemented.
This commit also enables the call of p9_xip_customize only when not in
the FSP environment.
Change-Id: Iafc04e2ba05def7794315f9178b55dd2f2de35e4
RTC:158044
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28098
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: Matt Derksen <v2cibmd@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
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3) Clean up TODO's in isteps 08, 09, and 10
In istep08 enable resolveProcessorSbeSeeproms call from
call_host_slave_sbe_config.C and remove findSBEInPnor call and other
processing from call_proc_check_slave_sbe_seeprom_complete.C.
In istep09 remove updateProcessorSbeSeeproms call and nest frequency
processing from call_fabric_erepair.C.
In istep10 enable updateProcessorSbeSeeproms call from
call_host_slave_sbe_update.C and enable loop to set use of xscom
in call_proc_build_smp.C.
Change-Id: I79237f530738e3088d1b3aedafdc6ad1139d21a8
RTC: 156597
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/26801
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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-Modified script to enable passing back from the SBE
parameters for the collectFfdc fuction
-Added sample code for collectFfdc tags to proc_example_errors.xml
-Added sample collectFfdc function p9_collect_some_ffdc
-Fixed compile issue in fapi2_variable_buffer_test which was a result
of changes to the hwp_ffdc_classes generated by the script.
Change-Id: I6abbbc05ed38e368eb0ff586a22cc5aba824bad4
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27048
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Deepak Kodihalli <dkodihal@in.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27459
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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