summaryrefslogtreecommitdiffstats
path: root/src/usr/pnor
Commit message (Collapse)AuthorAgeFilesLines
* PNORDD Cleanup - sfcinit updates and perf improvementsAdam Muhle2013-02-271-61/+136
| | | | | | | | | | | | | | | | | | Cleaning up a number of things under this commit: -Changed to always assume FSP performed SFC Setup -Get Erase block size based on what FSP Building Block set it to -Re-ordered some switch to put most likely choice first -Converted some else/if statements to switch statements -Added some shutdown calls on error paths. RTC: 47066 Change-Id: I015bb90b67ead9ad34e2ea1827cc92f7966d3162 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3183 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* ERRL: Create Hostboot error log SRC/UD parser and deliver to FSP bldMike Jones2013-02-081-2/+2
| | | | | | | | | | | | | | A new script called genErrlParsers will scan the Hostboot code for error log tags and create a SRC parser for each component. The script will also scan the Hostboot code for plugin directories containing User Detail Data parsers and will create a makefile that is used by the FSP to build each component's SRC/UD parser. Change-Id: I7113f6cd8069447a1caaa199aff199b663d59072 RTC: 47518 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2975 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Turn InitService::doShutdown into a NO_RETURNPatrick Williams2013-02-041-2/+0
| | | | | | | | | | | | | | | | | | | | | There are a few places outside of initservice where Hostboot shutdown needs to be called. Currently the doShutdown returns so each of these places have a while(1); style loop. In the case of start_payload, their implementation of this loop was incorrect and causes us to take longer than desired to actually shutdown. I have changed doShutdown into a NO_RETURN function that keeps the correct loop done in a common way. See defect SW183911 for more background. Change-Id: I819eecadcddd2436f1c52571e48258316b43f38c Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3028 Tested-by: Jenkins Server Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Triggering Hostboot Shutdown when PNOR is badAdam Muhle2013-02-041-29/+40
| | | | | | | | | | | | | Updating the doShutdown path to support receiving a reason code as input. Then changing PNOR RP to issue a shutdown when problems are detected with the PNOR Partition table. RTC: 44146 Change-Id: Ib4111d0a91f53d90fa100422a1463539897598e6 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3024 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Update fake-pnor to utilize 4MB of L3 CacheAdam Muhle2013-01-241-6/+5
| | | | | | | | | | | | | | | | Updating the fake-pnor to utilize 4MB of L3 Cache since the SLW work has been moved to real memory. In the process I added the Centaur VPD partition, and added more space to the HBI partition. Since we have a little breathing room, I also devoted 16K to a GUARD partition. There is still 100k unallocated to allow for yet another emergency one-time fix the next time HBI partition gets filled up. Change-Id: If6d8783a34724971700f324d277c3fc7c1379d88 RTC: 44009 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2999 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Improve PNOR DD Micron NOR WorkaroundAdam Muhle2013-01-082-34/+32
| | | | | | | | | | | | | | | | | Improving the workaround implemented in Story 53201 to be more efficient. Changing to use the normal SFC polling to determine when the write/erase operations are complete and then reading the Micron Flag Status register once to keep the chip from getting into a bad state. This should reduce the traffic on the SPI bus. Change-Id: I315b165bcd3014a2c3121fd97594e73a2e6c1082 RTC: 61064 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2795 Tested-by: Jenkins Server Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Shifting PNOR Direct Read offset to 0xFC000000Adam Muhle2012-12-192-4/+3
| | | | | | | | | | | | | | There was a disconnect across 2 pieces of code regarding how PNOR was mapped. The PNOR Device driver and simics config were using 0xF4000000, but our MMIO calculations for the SBE engine were using 0xFC000000. Based on VBU results, we think 0xFC000000 is the more likely correct answer, so aligning everything on that. Change-Id: I0c2582e44993ef2710b4eaf0e9a3cf990544ef62 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2753 Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com> Tested-by: Jenkins Server
* Full support for 8MB and 4MB cache sizesAdam Muhle2012-12-152-0/+40
| | | | | | | | | | | | | | Updating activate_thread to check if we're using fakePNOR and if any of the L3 Cache is deconfigured. If all 8MB are available, it will make a call to extend Hostboot memory to all 8MB. Change-Id: Ib32c9aa02e643228382e2a72dcb780d2f78989fe RTC: 49137 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2683 Tested-by: Jenkins Server Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Reduce trace buffer sizes.Patrick Williams2012-12-141-1/+1
| | | | | | | Change-Id: I13a80f814fd13a30315320c0b0c7374f39c3ecc2 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2522 Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com> Tested-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Move components to slow-buffer as appropriatePatrick Williams2012-12-141-5/+5
| | | | | | | Change-Id: Ife675112b7522a03e1e44d838e7af8fdd1af5b56 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2521 Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com> Tested-by: A. Patrick Williams III <iawillia@us.ibm.com>
* PNOR DD Micron NOR supportAdam Muhle2012-12-072-36/+291
| | | | | | | | | | | | The current Micron parts require some special operations after a read or write operation, otherwise future operations won't work. Change-Id: I2d733da57cd0b05fa5a8ba962f87d7fabb3d5267 RTC: 53201 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2491 Tested-by: Jenkins Server Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Remove VPO specific PNOR TracesAdam Muhle2012-11-031-10/+0
| | | | | | | | | | | | | While slow, access to real PNOR works in VPO now so these debug traces aren't critical. Thus, I am removing them to clean things up. Change-Id: Iba0a4197ba4e2a4d50896e35776d346708d9a50a RTC: 45885 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2199 Reviewed-by: Terry J. Opie <opiet@us.ibm.com> Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* SW172921 - Bad PNOR chipid in SimicsDan Crowell2012-11-012-1/+6
| | | | | | | | | | | | | | For some reason the Simics model is returning a different chipid for the PNOR chip now than it used to. Talking to Adam we suspect that the last byte is junk data anyway so it is just old memory. The fix is to ignore the last byte since it isn't really part of the id anyway. Change-Id: Ie097224c312e5597668b6201eff698f91bfaa950 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2189 Tested-by: Jenkins Server Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Update Default PNOR layout to include all partitionsAdam Muhle2012-10-243-35/+57
| | | | | | | | | | | | | | | | | -Updated the default PNOR layout to include all partitions -PNOR Layout now matches PNOR Spec layout, but only single side -Updated PNORRP to support all partitions -Updated PNORDD to more efficiently track erases -Added 4-byte addressing workaround to combined.simics to workaround SW170513 for FSP PNOR access. -Disabled test image in VBU to save space since it is not used anyway Change-Id: Ifadd21829b78868a1f2d8b762420a24f256f7a7e RTC: 49033 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2091 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Memory Leak task_endBill Schwartz2012-10-122-49/+48
| | | | | | | | Change-Id: Idb7a2d8d72a55f644efd0b2548eca5df5d062e6d RTC: 47491 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2011 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Support code coverage in extended modules.Patrick Williams2012-10-091-7/+12
| | | | | | | | | | | | | | | | | - Reduce optimization (to -Os) to fit when doing coverage profile. - Remove errl storage area from base image. - Add GCC function attributes to sys library functions. RTC: 36933 Change-Id: Ic83011a2444ef5b735db0446a14a0af34187eebf Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1908 Tested-by: Jenkins Server Reviewed-by: Brian H. Horton <brianh@linux.ibm.com> Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Melissa J. Connell <missyc@us.ibm.com> Reviewed-by: Paul Nguyen <nguyenp@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Re-enable PNORDD fake-pnor test casesAdam Muhle2012-09-073-150/+324
| | | | | | | | | | | | | Setup fake-pnor related test cases to malloc memory and treat as fake-pnor. This allows testing fake-pnor without requiring a reserved chunk of L3 to use as fake-pnor space. Change-Id: I24d7176b8ae7ff57839b1f5349be86d7d239ee58 RTC: 44938 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1557 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Deliver new PNOR tooling to ODE sandboxAdam Muhle2012-08-163-29/+75
| | | | | | | | | | | | | | | | | | | | | | Updating pnor build process in the following ways: -Murano/Venice/Tuleta pnor images now build in ODE sandbox -They are built using the ffs tool -hbDistribute delivers necessary files to ODE to enable building in ODE sandbox. -Delivering ffs_hb.H to CMVC to enable commonality of FFS user data with Hardware Server -Disabled failing Scom test case assoicated with new bbuild. Opened Issue to track resolution. Note, VBU image is still built the old way. That will be updated next sprint. Change-Id: Ie4cdca053c3f4221e5ca051a68157159970dfce2 RTC: 35045 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1436 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* PNOR Updates for VPOAdam Muhle2012-08-083-150/+171
| | | | | | | | | | | | | | | | Added some additional traces for VPO and a new vpoMode flag to cover some special cases in VPO. I chose to not use the real mode flag to avoid adding complication to the real code. RTC: 42487 Change-Id: Ib4f20bc27abb57e9f92d4679b4249d48dc43f505 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1450 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Terry J. Opie <opiet@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Fix to proc_set_pore_bar to work in VPO.Mark Wenning2012-08-031-5/+2
| | | | | | | | | | Change-Id: I5c61f7b26f3bd637658b2a6a386767cc76e0692c Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1456 Reviewed-by: Van H. Lee <vanlee@us.ibm.com> Tested-by: Jenkins Server Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Implement proc_set_pore_bar HWPMark Wenning2012-07-301-2/+12
| | | | | | | | Change-Id: I95562f9c3bb85e3b283020f62beaf65752281167 RTC: 42150 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1393 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Change PNORDD test cases to use test section of PNORAdam Muhle2012-07-113-24/+132
| | | | | | | | | | | | | | | Updated the PNOR Device Driver test cases to use a specially created test section of PNOR. The test cases will only run if the TEST section exists. Disabled the fake-pnor related test cases as the test section offset does not exist in the fake-pnor address space. Opened a story to fix this later. Change-Id: I1b5fd4989ee775c14034430226d9ffe844995f96 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1335 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Unique PNOR Layout for VPO imagesAdam Muhle2012-07-092-13/+26
| | | | | | | | | | | | | -Unique PNOR layout for VPO to fit within fake-pnor -Larger image for simics configs which includes the base img. Change-Id: I884a99da51845c2f17fcb48be4afa7d272d0ffd5 RTC: 44290 Depends-on: I7294999d3619692aaab424dca1ae608a0a84fa81 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1281 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Update PNOR RP to parse FFS Partition TableAdam Muhle2012-07-096-310/+506
| | | | | | | | | | | | This function allows us to support varied PNOR layouts in Hostboot. Change-Id: I7294999d3619692aaab424dca1ae608a0a84fa81 RTC: 35057 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1274 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Switch to using PNOR in SimicsDean Sanner2012-06-261-5/+16
| | | | | | | | | | | | | Switch to use manual PNOR images in simics Provided method for VPO to override Change-Id: I18195b645053f1ce90b4322ae2e09b6b08844331 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1241 Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Jenkins Server
* Enable REAL PNOR DD test cases in the VENICE configurationAdam Muhle2012-06-261-32/+3
| | | | | | | | | Change-Id: I94c4d5d378f3c4f615e33af3bed6a04e4c55c145 RTC: 42625 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1203 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Preload PNOR VPD correctlyTerry J. Opie2012-06-181-22/+22
| | | | | | | | | | | | | | | - Handle Venice, Murano, Tuleta - Change SPD code to use VPD_REC_NUM attribute - Modify FAPI/HWPF tests to use present DIMM targets Change-Id: I2348a2da90ea85a966f3724f8b3694a0b8f03916 RTC: 40774 Depends-on: I7d1b41c9f9e87baa9d42b78bf4351e3b6d774cb5 RTC: 39133 Depends-on: Ia0f22c87f8bc3959324fa8347e191f2b47b4325c RTC: 35835 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/950 Tested-by: Jenkins Server Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* VPO Performance fixesDean Sanner2012-06-181-25/+29
| | | | | | | | | | | | | | | | Temporarily remove nanosleep calls in PNOR, FSI, Scom device drivers to enhance VPO performance. Cuts ddr_phy_reset from 17 hours to 17 min Also fixed race condition in hb-istep Change-Id: I0a60275066a9e14b564d0294c083eec8647b2ff7 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1206 Tested-by: Jenkins Server Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Mark W. Wenning <wenning@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Support for Real PNOR in PNOR DDAdam Muhle2012-06-113-426/+1096
| | | | | | | | | | | | Implemented support to access real PNOR. However, PNORDD will still use fake PNOR by default. Test cases to test the real pnor code. Change-Id: Ib05d00388831930655532339d3794d63da6b5b3a RTC: 35728 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1094 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Modify VPD modules to use real PNOR dataTerry J. Opie2012-06-083-40/+43
| | | | | | | | | | | | | | - MVPD and SPD - Move MVPD & SPD sections to sideless - Modify PNOR RP test to handle sideless data - Modify Base Scratch Space for PNOR tests Change-Id: Ia0f22c87f8bc3959324fa8347e191f2b47b4325c RTC: 35835 Depends-on: I9b907e795b7b56d3c09f13c376f86f1f2dc627ae Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/876 Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com> Tested-by: Jenkins Server
* Call the Sleep/Winkle build HWPMark Wenning2012-05-081-14/+15
| | | | | | | | | RTC: 39785 Change-Id: I0e07c0f2a7827ee33bc0488e993734157b1850e1 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/910 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Disable PNOR Flat Model testing.Adam Muhle2012-05-021-12/+0
| | | | | | | | | | | | | | Since no one is actually using the temporary "FLAT" PNOR model in simics, I told the simics team the could default to the 'REAL' pnor model from now on. This was causing a test case to fail, so removing it for now. Story 35728 will add support for REAL PNOR and corresponding test cases. Change-Id: Ifb976dea227b4e996fedd37fb762ae1c5411aad8 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/975 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Support targeting code commonalityNick Bofferding2012-04-243-3/+3
| | | | | | | | | | | | | | | - Moved common targeting code to own subtrees - Updated many components with header file changes - Implemented abstract pointer class - Implemented Hostboot specific support for targeting commonality - Changed attribute VMM base address to 4 GB (From 3 GB) - Removed tabs, fixed > 80 character lines Change-Id: Ie5a6956670bfa4f262f7691b4f0ce5a20ed289fe RTC: 35569 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/909 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Automating creation of PNOR image with TOC and Section data.Adam Muhle2012-04-046-45/+54
| | | | | | | | | | | | | | | | | Wrote buildpnor.pl which builds PNOR image based on pnorLayout.xml file and input binary files. Setup makefiles to create PNOR if input files change and to handle make clean. Updated PNORRP to support new section offsets and new MVPD and DIMM VPD sections. Also updated PNORDD to use 4 MB of L3 Cache as fake-PNOR. Change-Id: Ic40670a45a53211a2414570d7fe5632e19bd44ed RTC: 35043 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/819 Reviewed-by: Terry J. Opie <opiet@us.ibm.com> Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Refactor InitServiceMark Wenning2012-04-042-13/+29
| | | | | | | | | | | | | | | | Finish join() conversion, remove TaskArgs Cleanup Initservice Cleanup ExtInitService Cleanup IStepDisp Add SPLess Halt & Shutdown command. Implements code for Tasks 35508, 3855, 36929 and 38870 . RTC: 38196 Change-Id: I554655412b529ef6cd143fea361a39bd584d18b5 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/794 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Add support for MURANO simics configDan Crowell2012-03-211-0/+6
| | | | | | | | | | | Update bbuild to released 1209 driver (b0229a_1209.760) RTC: 35596 Change-Id: Ifeb06070ac61943982509e88df6a1ca27c5e0aea Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/717 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Just fixing a TRACF that I missed in my last commit.Dan Crowell2012-02-281-1/+1
| | | | | | | Change-Id: I06a23123108d5b8c631cd682d7cccfa1f7207701 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/701 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* RTC Story 36901 - Use LPC MemoryDan Crowell2012-02-283-156/+833
| | | | | | | | | | | | | | | | | | This includes a hack to allow access to our fake PNOR data via the ECCB scom registers. This hack will be removed once Simics provides a real ECCB model. Changes to INTR testcase were needed due to bugs exposed by the timing changes when enabling this new code. Note that the default operating mode will remain LPC_MEM because the current version of the ECCB model causes the IPL to take close to 10 minutes to complete. Change-Id: Icc236bffd52ba8214ec920f9a496adec138e54d9 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/692 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* RTC Story 34595Dan Crowell2012-02-165-239/+1111
| | | | | | | | | | | | | | | -Add first pass of LPC logic to PNOR driver -Add interfaces to handle future SPI changes -Remove support for MMRD/PMRW modes from driver and RP Code will still use our fake PNOR image in memory but it will exercise more of the full driver path by reading/writing in 32-bit chunks. Change-Id: I753c71926bd9e67d22ac06c3204a0daf8b2f222e Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/637 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Hostboot-aware errl tool part 1.Monte Copeland2012-02-022-2/+0
| | | | | | | Change-Id: Ibe49dc935206775de032d397b2800a7b83208283 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/630 Tested-by: Jenkins Server Reviewed-by: Monte K. Copeland <copelanm@us.ibm.com>
* Make Hostboot-Extended 1MB in size.Patrick Williams2012-02-012-19/+19
| | | | | | | | Change-Id: I2e59c8bab9d848a5ca0395e993fd405851a44d06 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/634 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* HWPF: Add support for memory HWPF attributesMike Jones2012-01-092-3/+3
| | | | | | | Change-Id: I945224b9d4acf25730b5c9c8bee384b6a3669104 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/588 Tested-by: Jenkins Server Reviewed-by: MIKE J. JONES <mjjones@us.ibm.com>
* Interrupt presenter implementationDoug Gilbert2012-01-052-4/+4
| | | | | | | | Change-Id: If6b499d819b71298b8a64e096e1eb83c639ad645 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/517 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Complete virtual memory write path during shutdown sequenceMatthew Barth2011-12-081-4/+6
| | | | | | | Change-Id: I93a6305b88539d8cf1b41cfc4cde713fd7c19494 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/522 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Errl commit with component IDMonte Copeland2011-11-022-3/+3
| | | | | | | | Change-Id: Ic8fcd3c69330878e8e7a75ba6ba9d3c60aca6251 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/482 Tested-by: Jenkins Server Reviewed-by: Mark W. Wenning <wenning@us.ibm.com> Reviewed-by: Monte K. Copeland <copelanm@us.ibm.com>
* Full permissions with no_access as defaultMissy Connell2011-10-271-0/+8
| | | | | | | | | MERGED changes.. only need Patrick and Mark to review extintsvctasks.H Change-Id: Iba5814e1b5913c6181a2be96df9682555fa2ab58 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/458 Tested-by: Jenkins Server Reviewed-by: Melissa J. Connell <missyc@us.ibm.com>
* Adding support for remote FSI accessesDan Crowell2011-10-272-2/+2
| | | | | | | | | | | | | | | | | RTC Story 3792 - Added 7 more Venice targets and 7 more Centaur targets to the simics_VENICE.system.xml to match the latest simics config Note: remove Centaurs are currently disabled due to SW107421 - Modified testcases to be more tolerant of system config differences - Changes to initialization flow to be more tolerant of missing chips - Expanded the size of the HB_DATA section of PNOR to hold the additional targets (up to 128KB space now, actual is 36KB) Change-Id: Ic92708ccb147fb18bf992ef3ac318a287d32fafe Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/445 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Pull FSI data from real attributes (Task 3909).Dan Crowell2011-10-141-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | There are a group of attributes defined for FSI now. -ATTR_FSI_MASTER_CHIP -ATTR_FSI_MASTER_TYPE -ATTR_FSI_MASTER_PORT -ATTR_FSI_SLAVE_CASCADE -ATTR_FSI_OPTION_FLAGS Also includes work for Story 3996. The attributes are now broken into 3 distinct pieces: - attribute_types.xml : defines hostboot attributes - target_types.xml : defines different types of targets - XXX.system.xml : system-specific information, equivalent to what we'll get from system workbook These are then used to generic system-specific binaries, currently for 3 platforms: - simics_SALERNO_targeting.bin - simics_VENICE_targeting.bin - vbu_targeting.bin Change-Id: I2bf920cc62cceb761ab44a07df433da44249d0e0 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/426 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Implement support for generating the PNOR targeting imageNick Bofferding2011-09-192-2/+2
| | | | | | | | | | | | | | | | | - Generate PNOR targeting image as part of the build process - Load it into SIMICS physical memory - Access image from targeting service at correct virtual address - Bridge fapi attributes to host boot attributes using direct macro - Support multidimensional arrays for simple attributes - Removed support for fake PNOR image Change-Id: I45d986d69397940a165c850d0db0fdeccd137d4d Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/341 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com> Reviewed-by: CAMVAN T. NGUYEN <ctnguyen@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
* Centralizing a few of the memory-related constants to avoid someDan Crowell2011-09-141-3/+3
| | | | | | | | | | | | redundancies and also to have a single place to update the memory map if needed. See Task 3507. Change-Id: I8f2d632983abe6d6798784e975cd93057018594b Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/330 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
OpenPOWER on IntegriCloud