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* Report pnor side booted up on A/B to OPALBill Schwartz2015-02-281-1/+2
| | | | | | | | | | | | | | | This story will use the getPnorInfo and getSideInfo interfaces to fill in devtree entries informing Opal about the existence, location, and state of PNOR sides that we know about. We will pass up a list of TOCs associated with the active side and the inactive side. RTC: 109703 Change-Id: I740b086a9e22a0bc167141e3565bf813e50d9a00 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/15727 Reviewed-by: PRACHI GUPTA <pragupta@us.ibm.com> Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* New interfaces to get FSI and PNOR info for Xstop codeDan Crowell2015-02-181-0/+33
| | | | | | | | | | | | | | | Added new external interfaces to retrieve information about the FSI topology and the PNOR characteristics in order to enable the checkstop analysis code that runs on the OCC. RTC: 108820 Change-Id: Ibbe9bca8eee4c8ac86006b1ad881bd8b2c3b8280 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/15726 Tested-by: Jenkins Server Reviewed-by: Zane Shelley <zshelle@us.ibm.com> Reviewed-by: William H. Schwartz <whs@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Fix spelling mistakes using codespell.Patrick Williams2015-01-151-2/+2
| | | | | | | | | | | | - See https://github.com/lucasdemarchi/codespell Change-Id: I03e102d1ebb9473b6226fa9b6edb684fa0218a2f Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/15031 Tested-by: Jenkins Server Reviewed-by: STEPHEN M. CPREK <smcprek@us.ibm.com> Reviewed-by: Zane Shelley <zshelle@us.ibm.com> Reviewed-by: Brian Silver <bsilver@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Enable writes to PNOR on AST systemsDan Crowell2014-10-311-4/+4
| | | | | | | | | | | | Unlock SIO after console setup Fix PP write length Change-Id: I3b5b9c589ac16b392a0df6f9d4355f8aa1701061 RTC: 97493 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/14028 Tested-by: Jenkins Server Reviewed-by: Michael Baiocchi <baiocchi@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Split out SFC logic and add support for AST2400Dan Crowell2014-10-141-1960/+221
| | | | | | | | | | | | | | | | Refactored the PNOR device driver to pull all SFC-specific code into a new set of classes. Any time a new type of serial flash controller (SFC) is introduced, a new subclass should be created to support it. Also added the full support for the AST2400 BMC that is being used on Palmetto. Change-Id: I9cdbf9b48bbf94615a39804920e170a3142ec386 Origin: Google Shared Technology RTC: 97493 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/13229 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Create LPC Device DriverDan Crowell2014-09-221-500/+33
| | | | | | | | | | | | | | | Split LPC function out from PNOR DD and incorporate Stradale changes Change-Id: I4162db1a9f52ba3c0c973438b7b70baeae00aee2 Origin: Google Shared Technology RTC: 97494 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/11198 Tested-by: Jenkins Server Reviewed-by: Michael Baiocchi <baiocchi@us.ibm.com> Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Enable Test to Validate Alt Master's LPC connection to PNORMike Baiocchi2014-09-081-91/+111
| | | | | | | | | | | | | | | | This commit adds a new test during istep 9.2 where all possible Alternative Master's will have their LPC connection to PNOR tested. The test will be done by creating a unique PnorDD class and reading out the PNOR's TOC. This commit also updates the PnorDD class to use a non-MASTER_PROCESSOR_CHIP_TARGET_SENTINEL target. Change-Id: I7c141b0527a6f4d0ec5a702e9961ce686dd66a48 Backport: release-fips820 RTC: 87871 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/11348 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Handle PNOR ErrorsMike Baiocchi2014-08-131-245/+1041
| | | | | | | | | | | | This code diagnoses additional PNOR errors and attempts to recover from them. It also contains improvements to FFDC. Change-Id: Ifb1e692a79a0d017e1c4807e0d0bcddbbcd04f6c Backport: release-fips820 RTC: 37744 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/11253 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Move pnordd mutex outside of do-loop for CONFIG fix.Brian Silver2014-07-011-2/+2
| | | | | | | | Change-Id: Iccbe2c1869cbd909a99c431801a57cb381d980e1 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/11899 Tested-by: Jenkins Server Reviewed-by: Brian Silver <bsilver@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Add PNOR support for AST2400 BMCDan Crowell2014-06-301-98/+19
| | | | | | | | | | | Changes from Palmetto board bringup to enable PNOR reads. Change-Id: I13ad550eb7103a27af9ee4cb774dd504cae240a7 RTC: 106881 Origin: Google Shared Technology Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/11544 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Add customer error descriptions to error log headers.Doug Gilbert2014-06-231-0/+7
| | | | | | | | | | Change-Id: Ibb2f1219b6f2ff27e9b09fea4d36c2616fb7ddf9 RTC: 110397 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/11079 Tested-by: Jenkins Server Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Change copyright prolog for all files to Apache.Patrick Williams2014-05-211-10/+10
| | | | | | | Change-Id: I5664587b4f889099290ef50d50fa9ce5e580e1eb Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/11167 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Fix PNOR extended reads and Micron workaroundDan Crowell2014-03-041-46/+151
| | | | | | | | | | | | | | | | | | | There are a few issues being addressed here: 1) Added a pollForComplete call in the Micron Flag Status code since it can take multiple cycles to complete. 2) Added workaround code for Micron bug when reading multi-word pieces of data, this should fix some bad data we've been getting for the extended chip id (which is used to enable the above code). 3) Added read of Serial Flash Discovery Parameters to FFDC so we can have a better idea of which revisions are failing. Change-Id: Icc983deaac72be3f380269ecc4e321e51ef6005d CQ: SW246000 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/8930 Tested-by: Jenkins Server Reviewed-by: Michael Baiocchi <baiocchi@us.ibm.com> Reviewed-by: STEPHEN M. CPREK <smcprek@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* PNORDD Improvement to handle LPC Slave ErrorsMike Baiocchi2014-03-021-31/+413
| | | | | | | | | | | | | | | This commit contains improvements to PNORRP and PNORDD error callouts. It also includes looking for errors in the LPC slave status register and specifc errors in the SFC status register. It also adds a FFDC function that dumps registers and adds them to the error log. Change-Id: I5fee0a65063999d15fb3d9bbd4ca64fcc409de4d RTC: 62718 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/8745 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Remove Disable Direct Access Cache Workaround from PNORDDMike Baiocchi2014-02-271-8/+0
| | | | | | | | | | | | | | This commit removes a workaround where hostboot was disabling direct access cache in PNOR Device Driver initialization because at one point FSP was not doing this. FSP is now doing this and the workaround is no longer necessary Change-Id: Ia3442c77ea169a6757d1ac6cdb9096784501165b RTC: 64398 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/9010 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Make PNOR writes work correctlyDan Crowell2014-01-141-8/+12
| | | | | | | | | | | 1) Fix VPO mode check 2) Increase SFC Op timeout Change-Id: I20cd91e174f25e5f1bd1d62a95c181d97d967c86 CQ: SW241085 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/8066 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Remove leftover fixme/todo and update error calloutsDan Crowell2014-01-101-10/+10
| | | | | | | | | | | | | | | | Remove all untagged fixme/todo comments Adde new parm to error log constructor to avoid extra code in common software error case Update error callouts Add strncpy Change-Id: I8bd8f48193a96b79db91ed35c4fd485e6da38dba RTC: 67921 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/7921 Tested-by: Jenkins Server Reviewed-by: Michael Baiocchi <baiocchi@us.ibm.com> Reviewed-by: Brian H. Horton <brianh@linux.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Add term flags to PNOR and INTR errorsDan Crowell2013-10-171-1/+1
| | | | | | | | | Change-Id: Ieb7a4d17e12610eb1dbd80875ddc287ca1f1ccae Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/6674 Tested-by: Jenkins Server Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: STEPHEN M. CPREK <smcprek@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Fix race conditions in initservice shutdown path.Patrick Williams2013-10-151-2/+2
| | | | | | | | | | Change-Id: I0da3c2050d5d64d20975031e093dd10978684e2b Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/6663 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Brian H. Horton <brianh@linux.ibm.com> Reviewed-by: Andrea Y. Ma <ayma@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* PNOR ECC SupportDan Crowell2013-10-111-3/+2
| | | | | | | | | | | | | | Adding ECC support to the PNOR Resource Provider as well as the makefiles that create the images. Also fixed a bug in the PNOR DD for writes across erase blocks. Change-Id: I31ff6817cd35728badcd23a48fa73e51727142b9 RTC: 66213 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/6203 Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com> Reviewed-by: Michael Baiocchi <baiocchi@us.ibm.com> Tested-by: Jenkins Server Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com>
* Fix PNOR write bugDan Crowell2013-09-201-10/+23
| | | | | | | | | | | | | There was a problem that at least broke some situations where the write crossed erase blocks. I also suspect it could affect other scenarios as well. Fix was verified with testcase changes in another commit. Change-Id: I6550a6fe9efe90a8336f24ba4551822c0c97071e Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/6276 Tested-by: Jenkins Server Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* BEAM fixes for various components.Patrick Williams2013-05-151-2/+2
| | | | | | | | | | | Change-Id: I900f33eefeeeaa35d981b93c1af0bec8ab4000c2 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/4424 Tested-by: Jenkins Server Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com> Reviewed-by: Mark W. Wenning <wenning@us.ibm.com> Reviewed-by: Brian H. Horton <brianh@linux.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* PNORDD Cleanup - sfcinit updates and perf improvementsAdam Muhle2013-02-271-61/+136
| | | | | | | | | | | | | | | | | | Cleaning up a number of things under this commit: -Changed to always assume FSP performed SFC Setup -Get Erase block size based on what FSP Building Block set it to -Re-ordered some switch to put most likely choice first -Converted some else/if statements to switch statements -Added some shutdown calls on error paths. RTC: 47066 Change-Id: I015bb90b67ead9ad34e2ea1827cc92f7966d3162 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3183 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Update fake-pnor to utilize 4MB of L3 CacheAdam Muhle2013-01-241-6/+5
| | | | | | | | | | | | | | | | Updating the fake-pnor to utilize 4MB of L3 Cache since the SLW work has been moved to real memory. In the process I added the Centaur VPD partition, and added more space to the HBI partition. Since we have a little breathing room, I also devoted 16K to a GUARD partition. There is still 100k unallocated to allow for yet another emergency one-time fix the next time HBI partition gets filled up. Change-Id: If6d8783a34724971700f324d277c3fc7c1379d88 RTC: 44009 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2999 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Improve PNOR DD Micron NOR WorkaroundAdam Muhle2013-01-081-29/+26
| | | | | | | | | | | | | | | | | Improving the workaround implemented in Story 53201 to be more efficient. Changing to use the normal SFC polling to determine when the write/erase operations are complete and then reading the Micron Flag Status register once to keep the chip from getting into a bad state. This should reduce the traffic on the SPI bus. Change-Id: I315b165bcd3014a2c3121fd97594e73a2e6c1082 RTC: 61064 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2795 Tested-by: Jenkins Server Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Shifting PNOR Direct Read offset to 0xFC000000Adam Muhle2012-12-191-2/+2
| | | | | | | | | | | | | | There was a disconnect across 2 pieces of code regarding how PNOR was mapped. The PNOR Device driver and simics config were using 0xF4000000, but our MMIO calculations for the SBE engine were using 0xFC000000. Based on VBU results, we think 0xFC000000 is the more likely correct answer, so aligning everything on that. Change-Id: I0c2582e44993ef2710b4eaf0e9a3cf990544ef62 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2753 Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com> Tested-by: Jenkins Server
* Full support for 8MB and 4MB cache sizesAdam Muhle2012-12-151-0/+29
| | | | | | | | | | | | | | Updating activate_thread to check if we're using fakePNOR and if any of the L3 Cache is deconfigured. If all 8MB are available, it will make a call to extend Hostboot memory to all 8MB. Change-Id: Ib32c9aa02e643228382e2a72dcb780d2f78989fe RTC: 49137 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2683 Tested-by: Jenkins Server Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* PNOR DD Micron NOR supportAdam Muhle2012-12-071-29/+254
| | | | | | | | | | | | The current Micron parts require some special operations after a read or write operation, otherwise future operations won't work. Change-Id: I2d733da57cd0b05fa5a8ba962f87d7fabb3d5267 RTC: 53201 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2491 Tested-by: Jenkins Server Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Remove VPO specific PNOR TracesAdam Muhle2012-11-031-10/+0
| | | | | | | | | | | | | While slow, access to real PNOR works in VPO now so these debug traces aren't critical. Thus, I am removing them to clean things up. Change-Id: Iba0a4197ba4e2a4d50896e35776d346708d9a50a RTC: 45885 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2199 Reviewed-by: Terry J. Opie <opiet@us.ibm.com> Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* SW172921 - Bad PNOR chipid in SimicsDan Crowell2012-11-011-0/+3
| | | | | | | | | | | | | | For some reason the Simics model is returning a different chipid for the PNOR chip now than it used to. Talking to Adam we suspect that the last byte is junk data anyway so it is just old memory. The fix is to ignore the last byte since it isn't really part of the id anyway. Change-Id: Ie097224c312e5597668b6201eff698f91bfaa950 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2189 Tested-by: Jenkins Server Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Update Default PNOR layout to include all partitionsAdam Muhle2012-10-241-16/+33
| | | | | | | | | | | | | | | | | -Updated the default PNOR layout to include all partitions -PNOR Layout now matches PNOR Spec layout, but only single side -Updated PNORRP to support all partitions -Updated PNORDD to more efficiently track erases -Added 4-byte addressing workaround to combined.simics to workaround SW170513 for FSP PNOR access. -Disabled test image in VBU to save space since it is not used anyway Change-Id: Ifadd21829b78868a1f2d8b762420a24f256f7a7e RTC: 49033 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2091 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Re-enable PNORDD fake-pnor test casesAdam Muhle2012-09-071-52/+99
| | | | | | | | | | | | | Setup fake-pnor related test cases to malloc memory and treat as fake-pnor. This allows testing fake-pnor without requiring a reserved chunk of L3 to use as fake-pnor space. Change-Id: I24d7176b8ae7ff57839b1f5349be86d7d239ee58 RTC: 44938 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1557 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* PNOR Updates for VPOAdam Muhle2012-08-081-147/+157
| | | | | | | | | | | | | | | | Added some additional traces for VPO and a new vpoMode flag to cover some special cases in VPO. I chose to not use the real mode flag to avoid adding complication to the real code. RTC: 42487 Change-Id: Ib4f20bc27abb57e9f92d4679b4249d48dc43f505 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1450 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Terry J. Opie <opiet@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Fix to proc_set_pore_bar to work in VPO.Mark Wenning2012-08-031-5/+2
| | | | | | | | | | Change-Id: I5c61f7b26f3bd637658b2a6a386767cc76e0692c Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1456 Reviewed-by: Van H. Lee <vanlee@us.ibm.com> Tested-by: Jenkins Server Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Implement proc_set_pore_bar HWPMark Wenning2012-07-301-2/+12
| | | | | | | | Change-Id: I95562f9c3bb85e3b283020f62beaf65752281167 RTC: 42150 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1393 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Update PNOR RP to parse FFS Partition TableAdam Muhle2012-07-091-48/+0
| | | | | | | | | | | | This function allows us to support varied PNOR layouts in Hostboot. Change-Id: I7294999d3619692aaab424dca1ae608a0a84fa81 RTC: 35057 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1274 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Switch to using PNOR in SimicsDean Sanner2012-06-261-5/+16
| | | | | | | | | | | | | Switch to use manual PNOR images in simics Provided method for VPO to override Change-Id: I18195b645053f1ce90b4322ae2e09b6b08844331 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1241 Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Jenkins Server
* Preload PNOR VPD correctlyTerry J. Opie2012-06-181-22/+22
| | | | | | | | | | | | | | | - Handle Venice, Murano, Tuleta - Change SPD code to use VPD_REC_NUM attribute - Modify FAPI/HWPF tests to use present DIMM targets Change-Id: I2348a2da90ea85a966f3724f8b3694a0b8f03916 RTC: 40774 Depends-on: I7d1b41c9f9e87baa9d42b78bf4351e3b6d774cb5 RTC: 39133 Depends-on: Ia0f22c87f8bc3959324fa8347e191f2b47b4325c RTC: 35835 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/950 Tested-by: Jenkins Server Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* VPO Performance fixesDean Sanner2012-06-181-25/+29
| | | | | | | | | | | | | | | | Temporarily remove nanosleep calls in PNOR, FSI, Scom device drivers to enhance VPO performance. Cuts ddr_phy_reset from 17 hours to 17 min Also fixed race condition in hb-istep Change-Id: I0a60275066a9e14b564d0294c083eec8647b2ff7 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1206 Tested-by: Jenkins Server Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Mark W. Wenning <wenning@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Support for Real PNOR in PNOR DDAdam Muhle2012-06-111-339/+789
| | | | | | | | | | | | Implemented support to access real PNOR. However, PNORDD will still use fake PNOR by default. Test cases to test the real pnor code. Change-Id: Ib05d00388831930655532339d3794d63da6b5b3a RTC: 35728 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1094 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Support targeting code commonalityNick Bofferding2012-04-241-1/+1
| | | | | | | | | | | | | | | - Moved common targeting code to own subtrees - Updated many components with header file changes - Implemented abstract pointer class - Implemented Hostboot specific support for targeting commonality - Changed attribute VMM base address to 4 GB (From 3 GB) - Removed tabs, fixed > 80 character lines Change-Id: Ie5a6956670bfa4f262f7691b4f0ce5a20ed289fe RTC: 35569 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/909 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Automating creation of PNOR image with TOC and Section data.Adam Muhle2012-04-041-2/+2
| | | | | | | | | | | | | | | | | Wrote buildpnor.pl which builds PNOR image based on pnorLayout.xml file and input binary files. Setup makefiles to create PNOR if input files change and to handle make clean. Updated PNORRP to support new section offsets and new MVPD and DIMM VPD sections. Also updated PNORDD to use 4 MB of L3 Cache as fake-PNOR. Change-Id: Ic40670a45a53211a2414570d7fe5632e19bd44ed RTC: 35043 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/819 Reviewed-by: Terry J. Opie <opiet@us.ibm.com> Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Just fixing a TRACF that I missed in my last commit.Dan Crowell2012-02-281-1/+1
| | | | | | | Change-Id: I06a23123108d5b8c631cd682d7cccfa1f7207701 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/701 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* RTC Story 36901 - Use LPC MemoryDan Crowell2012-02-281-128/+238
| | | | | | | | | | | | | | | | | | This includes a hack to allow access to our fake PNOR data via the ECCB scom registers. This hack will be removed once Simics provides a real ECCB model. Changes to INTR testcase were needed due to bugs exposed by the timing changes when enabling this new code. Note that the default operating mode will remain LPC_MEM because the current version of the ECCB model causes the IPL to take close to 10 minutes to complete. Change-Id: Icc236bffd52ba8214ec920f9a496adec138e54d9 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/692 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* RTC Story 34595Dan Crowell2012-02-161-92/+664
| | | | | | | | | | | | | | | -Add first pass of LPC logic to PNOR driver -Add interfaces to handle future SPI changes -Remove support for MMRD/PMRW modes from driver and RP Code will still use our fake PNOR image in memory but it will exercise more of the full driver path by reading/writing in 32-bit chunks. Change-Id: I753c71926bd9e67d22ac06c3204a0daf8b2f222e Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/637 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add copyright headers to all source files.Patrick Williams2011-08-241-0/+22
| | | | | | | Change-Id: I205f2409e56032cfc0aaf01d7e26d357f0b86373 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/277 Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com> Tested-by: Jenkins Server
* Move fakePNOR to 5MB, copy fakeext image to sandbox, load fakeext/TOC into ↵Adam Muhle2011-08-151-8/+21
| | | | | | | | | | phys_mem Change-Id: Ie9243f22f7afbfd2d3112fa17fe74999467d2dd6 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/251 Tested-by: Jenkins Server Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Adding fake PNOR Device Driver SupportAdam Muhle2011-08-031-0/+301
Change-Id: Ic434159183bc4dd91c8ba588730cda7e0766c6c0 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/223 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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