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* Skip establish ex chiplet step (15.3) during Axone for nowChristian Geddes2019-03-171-0/+2
| | | | | | | | | | | | | | | | For some reason when we set the multi-cast groups it breaks some multi-cast registers in simics that PRD uses after isteps. For now just skip this step so we can continue with the IPL. Change-Id: I2511ecb35ab32dae1d9a334964bc88317de74ef0 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/73149 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Support UCD discoveryNick Bofferding2019-03-151-8/+38
| | | | | | | | | | | | | | | | | | - Added new attribute to indicate if target should be assumed present - Added that attribute to SP/BMC/UCD targets - Check for assumed present UCDs in discover targets - Iterate through every UCD for data flash update RTC: 201991 Change-Id: Ia535a58ea0355582621a23d3c1b50b2417ad362f Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/73047 Reviewed-by: Matthew Raybuck <matthew.raybuck@ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add callouts for NVDIMM errorsCorey Swenson2019-03-113-39/+55
| | | | | | | | | | | | | | | | | | - Add part callout for NVDIMM controller - Add part callout for Backup Power Module - Call new procedure for NVDIMM errors Change-Id: I33d14b8e4220ced3c632c8174eaed5faca4f088d RTC:199645 CMVC-Prereq:1077602 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71977 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: TSUNG K. YEUNG <tyeung@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Skip enabling PM complex (start_stop_engine HWP) in Axone simicsChristian Geddes2019-03-111-1/+6
| | | | | | | | | | | | | | | | For now, until the OCC / PM complex gets straighted out in simics we will just skip enabling the PM complex in Axone. We should be able to continue to boot even while skipping this step. Change-Id: Ic38c1d46922767c6a9efa14e26932233afacc0d7 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/73033 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Run memory training in parallel across centaursGlenn Miles2019-03-112-66/+148
| | | | | | | | | | | | | | | | | | | -Uses a thread pool to do memory training for multiple (up to 4) centaurs at a time. -Also fixes mdiasm.C to set the thread pool count before creating a thread pool instead of using whatever was set before it. Change-Id: I7331bfcd0e1e85af1b825e8ac4e0d1d76924014a RTC: 71239 CQ: SW454787 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71614 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Create runtime mss libraryDan Crowell2019-03-082-1/+105
| | | | | | | | | | | | | | | Creating a runtime library to hold a subset of the memory HWP code that is required for runtime functions (mainly PRD). Change-Id: I7456a5309d823b652261239a27e4a45fc5082a07 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72653 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Add p9a_omi_training_check hwp call to istep 12.9Christian Geddes2019-03-082-2/+43
| | | | | | | | | | | | | | | | | For the Axone IPL flow we need to check that omi training has completed. We do during the establisted istep 12.9 which we have set aside for post-memory interface training steps. Change-Id: Ibf43b1b69977ace1e3ca7e9e2c96167958a86e04 RTC: 195554 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72440 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* UCD Flash Update: Support I2C SMBUS operations for UCD flash updateNick Bofferding2019-03-084-2/+111
| | | | | | | | | | | | | | | | | - Adds I2C SMBUS operations for UCD flash update - Creates UCD component ID + trace name - Creates stub for UCD flash update entry point Change-Id: Id75cdd137b5a4924998c04bdbdce9218610a4906 RTC: 201992 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72229 Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Matthew Raybuck <matthew.raybuck@ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Adds mcbist empty filesAlvin Wang2019-03-071-0/+1
| | | | | | | | | | | | | | Change-Id: I9b2df15d131f63c1c2881ddda037cbaec3827a6d Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70728 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72227 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Force reboot without visible errors for core wakeup failureDan Crowell2019-03-061-9/+34
| | | | | | | | | | | | | | | | The intermittent core wakeup failure continues to plague us with no solution in sight. Since the error is extremely rare (less than 1% of boots) we have decided to force a manual reboot and not log any visible errors to the customer. Change-Id: Ic30f6330431bd2c8ce75075befc2c36d278d8152 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71319 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72921 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Base HWP mirroring control on HB policyDean Sanner2019-03-061-1/+20
| | | | | | | | | | | | | | | | | | | PHYP can't support mixed mirroring/non mirroed memory, so MRW mirroring needs to be on/off. HB already has this info in a TARGETING ATTR (but not FAPI) and they don't match meaning one for one. Thus make ATTR writable and replicate FW setting to HWP setting Change-Id: I899272d338947f4c41f93c1ece88028053ce9d5f CQ:SW438826 CQ:SW459005 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64580 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Compile and add calls to exp_scominit in istep 13.8Christian Geddes2019-03-062-2/+57
| | | | | | | | | | | | | | | | Since this code is ready and seemingly passing in axone simics okay we will pull it in to cross another item off the list. Change-Id: Id02b1fae825d5e601312251f75af21120f9fa2ba RTC: 195556 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72723 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add SW callout if invalid proc model in call_mss_scrubCaleb Palmer2019-03-041-1/+2
| | | | | | | | | | | Change-Id: Idbdda21aac99a73a38a6af0154f526a72e0298c4 RTC: 205441 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72728 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
* Use NVDIMM lids for updateMatt Derksen2019-03-011-13/+3
| | | | | | | | | | | | | | | | | This will enable grabbing NVDIMM images from lids. Change-Id: I7b8da696dd629ba41834a98e9e2cc1b9c0d872b4 CMVC-Prereq: 1075393 RTC: 201197 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71045 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Move nvdimm_update call to istep 21.1Matt Derksen2019-03-016-17/+17
| | | | | | | | | | | | | | | | | istep20 is not called on FSP-based systems, so the update call needed to be moved to 21.1. This was selected because it requires lids. Change-Id: I2378eb1629e982913a3abe8b652b436edd692439 RTC: 201197 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71859 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Initialize and test alt-master PNOR access in all bootsBill Hoffa2019-03-012-18/+56
| | | | | | | | | | | | | | | | | | - Update to istep 10 (call_host_slave_sbe_update) to validate the alternate master pnor chip in all boots (no-op for systems with only one pnor chip) - Updates to pnor callout logic to callout as a PNOR part for several of the error paths Change-Id: I9218f9a14496444288ea7985e1fb080c25f7f201 RTC: 200449 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71489 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Reset Engine E to handle NVDIMMsDan Crowell2019-03-011-1/+80
| | | | | | | | | | | | | | | | | Force a reset of Engine E during MPIPL if we have NVDIMMs present. This is required to clear out any latent runtime usage that may still be laying around (specifically an active i2c interrupt). CQ: SW457992 Change-Id: Ie5191fd71c07b903af482e2eb57295ab91f2a6f2 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72370 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Framework for NVDIMM updateMatt Derksen2019-02-287-1/+959
| | | | | | | | | | | | | | | | | This includes framework to update the firmware running on the NV controller. The controller requires 12V power to update, so this function in inside hostboot. Change-Id: I0733d83ff6ba2fc3f026d49c72784b1295bd3eed RTC:201197 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69879 Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* HB:Cme fir attribute reset fixPrasad Bg Ranganath2019-02-222-4/+15
| | | | | | | | | | | | CQ:SW455727 Change-Id: I854779403ab138f193ad7fc3ff188b4e7d48388e Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72122 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add omi setup/training calls to istep 12Christian Geddes2019-02-203-8/+129
| | | | | | | | | | | | | | | | | Recently we have imported some of the HWPs for omi training. This commit adds calls to our ISTEP code to make these omi HWPs get called during istep 12. This is done according to P9A IPL Flow doc. Steps added : exp_omi_setup ( 12.7 ) exp_omi_train ( 12.8 ) p9a_omi_train ( 12.8 ) Change-Id: Ia6ba21beb7348945cd93719dc65966f6af1887ab RTC: 195554 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71988 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Update simics build and pull in Axone binary to pnor generationChristian Geddes2019-02-202-4/+9
| | | | | | | | | | | | | | | | | | | | | | Previously we were using some CUMULUS binaries as placeholders until Axone versions were available. We now use the Axone version of the SBE and HW ref images. Also for MEMD we will now just fill it in with zeroed out ECC (all FF's w/ 0 for ECC bit). No plans to use that MEMD now but setting it aside for DDIMM config overwrites. When we pulled in the new SBE image we hit issues with the VPD being used not having the correct sizes. MVPD for Axone is not complete yet so until that gets resolved we will disable sbe updates for Axone. RTC: 197497 Change-Id: I470f44d297179556d7c2eb7b210c91a2cd38f23c Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72090 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Enable mss_scrub on MPIPL if NVDIMM is configuredTsung Yeung2019-02-191-25/+87
| | | | | | | | | | | | | | | | NVDIMM restore blows away the scrub settings so it needs to be reinitialized during MPIPL Change-Id: I67f74c71e98b8907351eb7477bf197a941aefb8d Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71786 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Caleb N. Palmer <cnpalmer@us.ibm.com> Reviewed-by: TSUNG K. YEUNG <tyeung@us.ibm.com> Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Support reading UCD flash update LIDsNick Bofferding2019-02-185-2/+166
| | | | | | | | | | | | | | | | | | | - Added support to read a single LID container and securely verify it - Added new compile flag CONFIG_UCD_FLASH_UPDATES to enable/disable future TI UCD9090/UCD90120A flash updates - Created shell function to hold the UCD flash update logic Change-Id: I94f3e43558af5d7951febdf6ff0685c120d2db0e RTC: 201992 CMVC-Prereq: 1076388 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71945 Reviewed-by: Marshall J. Wilks <mjwilks@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Update istep_mss modules makefile to generate mss accessorsChristian Geddes2019-02-161-2/+70
| | | | | | | | | | | | | | | | | | Recently in hostboot we have pulled in a script from the EKB that will parse various memory related XML files and generated header files that the memory HWPs use to access various attributes. This commit will add calls to the makefile to make sure that these headers get generated during the build. Change-Id: I071f32553fc9f8e5cdc3645b18f1ca7870cb80ad Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71870 Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Use proper top-level include for fapi2 targetDan Crowell2019-02-156-12/+12
| | | | | | | | | | | | | | | | | | There is a specific order of #include for fapi2 header files. The generic name (target.H) is the only one that should be used by application code. That header will include the fapi2-specific header (fapi2_target.H) and the plat-specific (plat_target.H) in the proper order. Change-Id: I7e7c3429bfccbc7e1e675a8716fc127695cad15a Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71539 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Brian J. Stegmiller <bjs@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add call to exp_check_for_ready to istep 10.4Christian Geddes2019-02-152-13/+62
| | | | | | | | | | | | | | | | | | As per P9 Axone IPL flow doc, this HWP needs to be called on every functional OCMB targets. This is called after the p9a_ocmb_enable hwp is called in this istep. Change-Id: I5bab233545769f396ba35b6d61c0733a9afd9087 RTC: 195553 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71787 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Memory Controller Axone initfiles - initialAdam Hale2019-02-131-1/+4
| | | | | | | | | | | | | Change-Id: I6255f1e3aac26bc20b9331e58c445939b19cc17c Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69199 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: SHELTON LEUNG <sleung@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69202 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
* Disable NVDIMM Trigger Before Draminit and Deassert DDR_RESETn During MPIPLTsung Yeung2019-02-126-376/+848
| | | | | | | | | | | | | | | | | | | | - Per the JEDEC spec, DDR_RESETn is masked from the DRAM when the NVDIMM is armed. This could cause the training to fail if the trigger is not disabled before training. Two scenarios where this can happen are warm reboot and cold boot before the backup power module can deplete the charge - Deassert DDR_RESETn in MPIPL before triggering the restore. - Fix the config flag to enable NVDIMM code Change-Id: I9d25c2f653fc54d379f0dbab49218f5b59a407a0 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70035 Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Skip NPU scominit until ARTMISS register gets updatedChristian Geddes2019-02-111-1/+5
| | | | | | | | | | | | | | | | This ARTMISS register that gets updated during npu_scominit changed for axone. If we run this step we take errors so we will skip it in the Axone flow till we get some updates. Change-Id: I4f1607ab2147692eef864ce0bf3ee73c43ba8bb3 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71547 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add call to p9a_ocmb_enable to istep 10.4Christian Geddes2019-02-112-5/+38
| | | | | | | | | | | | | | | | Per IPL Flow doc for P9 Axone, p9a_ocmb_enable needs to be called on all processors during istep 10.4 RTC: 195553 Change-Id: I50fa98959008cccfe0620c8bc6e62f33ee91c135 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71229 Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Skip dmi_io_dccal in AxoneChristian Geddes2019-02-051-55/+64
| | | | | | | | | | | | | | | | | | Previously this HWP wrapper relied on that fact that Nimbus did not have any MC targets so this was only be ran on Cumulus systems. However, with the introduction of Axone , which also has MC targets, we must explictly only call this HWP on processors of model type CUMULUS Change-Id: I39610440c1c165113985e1542f78d9591316c8b2 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71208 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add temporary Axone simics workarounds to progress IPLChristian Geddes2019-02-051-1/+5
| | | | | | | | | | | | | | | | | | | | Currently there is no VRM hooked up to the other side of the AVSbus in simics. The simics team is working on this but for now we need to skip the istep that calls setup evid to set voltages. This can be removed when Simics gets this working. Also for now we are will skip starting checkstop handling early on in the IPL because the OCC model is not finished. This also can be changed when the model starts working. Change-Id: Ia0df49fedae97acceefe07e3f3c903bbe6aac83d Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71097 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Make MCS acker workaround changes permanentCorey Swenson2019-02-044-107/+11
| | | | | | | | | | | | | | | | | Workaround moved the p9_revert_sbe_mcs_setup HWP from istep06 to istep14. Remove call_host_revert_sbe_mcs_setup.C from istep06 and remove workaround comments in istep14. Change-Id: I93c70364b7dde013bf003cf1920535ba78b9a58b RTC:184860 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70792 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Do not gard cores on the initial core wakeup failureDan Crowell2019-01-291-5/+92
| | | | | | | | | | | | | | | | | | | | | | | | | | | We have seen rare (but non-zero) errors during slave core wakeup where we never see the new core reporting in. Currently this will result in a visible log and a core gard. However, there is currently no indication this failure is actually due to bad hardware. As a workaround, this commit adds an indicator that keeps track of if a core has failed wakeup previously. The first time we encounter the error there will be a visible log with a FW callout and no deconfig or gard of the core. That will trigger a boot failure and a reboot. If we don't fail on the next boot (which is expected), the counter will be cleared. If we do fail again there will be a visible log (with a new SRC) that calls out the core as the primary cause, plus does a deconfig+gard. Change-Id: I3a25537cf9c9c8e0b679519b67e9ae4e3492736d Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70992 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add retry to slave core wakeup pathDan Crowell2019-01-251-1/+16
| | | | | | | | | | | | | | | | | | | | We are still seeing some very intermittent errors in the slave core wakeup path. It still seems like we may have a timing issue. Until we figure out exactly what is going on, I am adding a retry mechanism that should get the core to report in correctly. The retry is done by issuing an additional doorbell message to the core that didn't report in. Change-Id: Ib87e5d58e079674d1eebb44c10d0252a35ea0519 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70761 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Inform PHYP of NVDIMM protection by OCCMatt Derksen2019-01-246-194/+469
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The OCC is responsible for detecting the EPOW signal and triggering the save operation on the NVDIMM. Therefore, if the OCC is not running we are unprotected from a poweroff event. PHYP needs to inform the LPARs using the NV (non-volatile) memory of this state so they can behave accordingly. HBRT is responsible for telling PHYP when we get into this state. There are two ways we can detect this state: a) HBRT explicitly puts the PM complex into reset b) PRD detects a specific FIR bit The message should include this data: - what state we are in (protected or unprotected) - which processor is affected Work for this story will include: - Definition of the new message - Creating a utility function to send the message - Calling utility function to send 'unprotected' message inside of all pm reset paths at runtime Change-Id: Ib015d001d47883a247faedabedb0705ba0f1b215 RTC:201181 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68870 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: TSUNG K. YEUNG <tyeung@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Change to DELAYED_DECONFIG for HX_KEYWORD errorsMatt Derksen2019-01-241-2/+3
| | | | | | | | | | | | | | | | Need to allow hwsv to create a dummy deconfigure record or the system will get stuck in an infinite reconfig loop. Change-Id: I2eb6a30f75bf92a42f829ba58dd9ee833f88edf5 CQ:SW453631 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70659 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Move NVDIMM operations under NVDIMM modulesMatt Derksen2019-01-2114-10/+2344
| | | | | | | | | | | | | | | Makes it easier to find and include NVDIMM operations. Also makes it easier to exclude from non-nvdimm supported systems. Change-Id: I870c2246e1bb9201e6e8032f1868e6e4e6a2b91a Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70489 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Follow-up Changes on SMF NVRAM End-To-EndIlya Smirnov2019-01-161-8/+8
| | | | | | | | | | | | | | | Some minor changes to SMF NVRAM end-to-end commit that were requested in review but didn't make it into the original commit. Change-Id: I2eef8ef236dd67e6dd14568a270b6f77b3741c5b Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70445 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Create an LRDIMM_CAPABLE HB ConfigIlya Smirnov2019-01-151-0/+4
| | | | | | | | | | | Change-Id: Iceff9589936332d5ae0ee14e5fb2a4bb38cc5649 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70462 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Generate error when pnor is not accessed via ipmiCorey Swenson2019-01-141-1/+62
| | | | | | | | | Change-Id: Ia44001c45dbe5a0f4f51202136d2649bb365d73f Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69585 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* SMF: NVRAM Reading and Mem Distribution end-to-end ChangesIlya Smirnov2019-01-101-1/+39
| | | | | | | | | | | | | | | | | This commit introduces the changes to read out the SMF secure memory amount value from NVRAM and to distribute the secure memory amount based on the value read. strtou64 was copied from runtime code to convert the value read from NVRAM (as a string) to uint64_t. Change-Id: I83e41f0aaff9b4035d20a517cf866f348acedd59 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69728 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Move NVDIMM Erase and Arm to RuntimeTsung Yeung2019-01-097-129/+140
| | | | | | | | | | | -Move erase and arm to after OCC has started -Address several TODOs in I2d68123ceb0b8e7a33b54f9acad0968670a67ea9 -Combine arm and erase into an atomic operation with ATOMIC_SAVE_AND_ERASE Change-Id: Iad06f6fe7128df3defc4ded57b0151f9c4b9d15e Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68197 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Support version 2 of PEC_PCIE_HX_KEYWORD_DATAMatt Derksen2019-01-091-18/+12
| | | | | | | | | | | | | | | | | Some old hardware incorrectly filled in version 1 of the HX_KEYWORD. This new version was created so old hardware will not stop system IPL. New cards will be updated to this new version, so they will support PCIE bifurcation. Change-Id: Ie2b9dee66d1905a39d6f2b734e50b070f63e819d CQ:SW453106 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70156 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Disable HX keyword bifurcationMatt Derksen2019-01-051-1/+7
| | | | | | | | | | | | | | Invalid HX Keyword data, 01029090, seen throughout the lab systems. Need to disable using this keyword until we come up with a workaround this bad data. Change-Id: I0a3350e5e10380ac00d36bc057d6d0ad65ff4eeb Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70095 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Inband MMIO access to OCMBRick Ward2018-12-131-1/+19
| | | | | | | | | | | | | | | | | | This is an untested version of the new MMIO device driver that will give access to the OCMB. It will be tested once the Axone model IPLs in Simics. Change-Id: I4bc1d2f7306f1b238d1d65c24462ac4121266b11 RTC: 189447 RTC: 189220 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66941 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Enable PCIe slot bifurcation using HX keywordRichard J. Knight2018-12-072-36/+343
| | | | | | | | | | | | | | | | | | | | | | | | -Update the PCIe config code to check the contents of the HX keyword attribute when determining the lane configuration. The HX keyword was defined to describe the lane configuration for a specific PCIe slot. It is generally stored in the VPD data of a PCIe card where it is read by the FSP. If the HX keyword data is populated, the FSP will then update the PEC_PCIE_HX_KEYWORD_DATA attribute for the PCIe slot the card is installed in. Once hostboot reads the HX keyword it will determine the correct lane configuration and adjust the IOP configuration attributes for the hardware procedure, p9_pcie_scominit, to consume. Change-Id: I10b1fcc84aacf3caf835e3cc9fffd1350cd30935 RTC:189286 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/59113 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* SMF: Temporary Put HOMER In Non-Secure MemoryIlya Smirnov2018-12-061-1/+1
| | | | | | | | | | | | | | | | | | | Skiboot is having difficulties reading OCC Common area from secure memory. This commit puts HOMER memory back in non-secure area (at all times) for the time being while the skiboot team figures out what's wrong. Change-Id: Ieda0fbb22a851cc8a5e66cf9c02c1932b29de99f Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69416 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matthew Raybuck <mraybuc@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Mask off OBUS FIRs during MPIPLDan Crowell2018-11-271-1/+19
| | | | | | | | | | | | | | | | | The OBUS FIRs are masked during step10 in a regular boot. Since that step isn't run on MIPL the mask wasn't happening. This leaves us exposed to PRD asserts if one of them goes live. Change-Id: Iaa30b30645d0dc2ce1740b7da3bcf6a12c483a38 CQ: SW450867 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68524 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Progress code tweaksDan Crowell2018-11-271-0/+4
| | | | | | | | | | | | | | | | | | | Added additional calls to poke the watchdog during draminit training advanced in anticipation of FSP using the progress codes as a finer granularity timeout mechanism. Started rolling the internalStep nibble of our CFAM reg istep counter as a way to show internal progress in long-running steps Change-Id: I7a3bd08d9ab71b020a05b7476b3e31f8c81c4f86 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68393 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
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