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* Add check for minimum hardware in proc_exit_cache_containedRoland Veloz2017-06-091-5/+31
| | | | | | | | | | | | | RTC:123500 Change-Id: Iae026349cff1842c37e568059c2565cf98e14aff Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41400 Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: ILYA SMIRNOV <ismirno@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Always collect dump data during MPIPLscrgeddes2017-05-111-18/+1
| | | | | | | | | | | | | | We can always collect dumps during MPIPL so we can remove this check Change-Id: Ie35109ac3c9019502350c9c318c6190430d07c4b Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40274 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Terminate IPL if no memory configured behind master procDan Crowell2017-04-211-24/+54
| | | | | | | | | | | | | | | | | | Firmware doesn't currently support booting in a configuration where there is no functional memory behind the master processor (proc0). Added an explicit check to the 'minimum hardware' logic to account for this to avoid confusing CRESP errors when this scenario shows up. Change-Id: Ia9c1e1d1cb135efb58a52edfccffe66174f57a2c CQ: SW384402 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39048 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Stephen M. Cprek <smcprek@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add mss unmask and FIFO reset calls to step codeZane Shelley2017-03-301-43/+93
| | | | | | | | | | | Change-Id: I9991d25ce0d33e0608970736f84c4816e3d274fe Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38644 Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Reviewed-by: Benjamin J. Weisenbeck <bweisenb@us.ibm.com> Reviewed-by: Caleb N. Palmer <cnpalmer@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
* Add pos API to be shared among controllers, move generic files to utilsAndre Marin2017-03-151-1/+1
| | | | | | | | | | | | | | | | Change-Id: I7daedddf83c6a34f28417c97a28e78d88ec5c9af Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37562 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Brian R. Silver <bsilver@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: LUCAS W. MULKEY <lwmulkey@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37630 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Support DRTM RIT protectionNick Bofferding2017-03-031-1/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Added mailbox scratch register 7 definition - Added DRTM functions - Added set/clear security switch register functions - Added additional security switch bit definitions - Added secureboot extended library to host DRTM functions - Inhibited TPM start command in DRTM flow - Added new config options for DRTM and DRTM RIT protection - Added new DRTM attribute to indicate if DRTM is active - Added new DRTM attribute to hold DRTM payload address - Added new DRTM attribute to initiate DRTM in lieu of loading payload - Updated target service init to determine DRTM settings - Updated host start payload step to initiate DRTM if conditions are met - Updated host MPIPL service to verify DRTM payload and clean up DRTM HW state - Updated host gard step to verify DRTM HW state - Rerouted PCR extensions to PCR 17 in DRTM boot - Use locality 2 for all PCR extensions in DRTM boot - Inhibit extension logging (for now) in DRTM boot - Only extend seperator to PCR 17 in DRTM boot Change-Id: Id52c36c3a64ca002571396d605caa308d9dc0199 RTC: 157140 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35633 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Stephen M. Cprek <smcprek@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Timothy R. Block <block@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Move IOVALID set to host_proc_pcie_scominitMatt Ploetz2017-02-161-98/+0
| | | | | | | | | | | | RTC:167302 Change-Id: Ie8bc04f0643cf196edd17d4cb7575236a9c3fd51 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35055 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Add c_str generic API and update makefilesAndre Marin2017-02-101-0/+1
| | | | | | | | | | | | | | | Change-Id: I95e3b9013d3ab0c352d3614c12ee4ef0d26965d0 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35924 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Brian R. Silver <bsilver@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35952 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Enable mss_throttle_synccrgeddes2017-01-172-27/+24
| | | | | | | | | | | | | | For some reason this HWP was commented out, after speaking with Joe McGill he confirmed that they are running this on cronus for nimbus so we need to have it enabled Change-Id: If52fad2b6c73f77873494165bbc85704dadf5b71 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34887 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Setup more PCIE ATTR during computeProcPcieConfigAttrsDean Sanner2017-01-141-49/+57
| | | | | | | | | | | | | - Setup PROC_PCIE_REFCLOCK_ENABLE and PROC_PCIE_PCS_SYSTEM_CNTL - Update missing PCIE attribute settings in XML Change-Id: Iac6e74812e6875ad4513cba0eff0c2d664a81241 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34543 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Fill in ATTR_PROC_PCIE_IOVALID_ENABLE based on functional PHBsMatt Derksen2016-12-131-2/+94
| | | | | | | | | | | Change-Id: I26d81859b3a214d580cab97ca76d7fa7d93cdbd6 CQ: SW371816 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33336 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fixing a bunch of orphaned TODO commentsDan Crowell2016-11-072-6/+1
| | | | | | | | | | Change-Id: Ia7c4dfcc947bebfc26952a9788ef0443372c9c23 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32203 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <v2cibmd@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Integrate p9_mpipl_chip_cleanup HWP for P9crgeddes2016-10-302-34/+9
| | | | | | | | | | | | | | | Although the procedure is turned on at this point we are not able to test if it works because we are not this far in MPIPL HB development yet. Change-Id: I8e61e69d928f69900c53021f0683db21eeb46562 RTC: 157653 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31904 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Reviewed-by: Matt Derksen <v2cibmd@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* MDIA: Reenable Memory DiagnosticsCaleb Palmer2016-10-211-5/+0
| | | | | | | | | | | Change-Id: I91b732ae590bfb8e34a8a91b6bdae22a9395074f RTC: 151755 CMVC-Prereq: 1009085 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31629 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Remove unnecessary include path to error_info directory in istep14Prachi Gupta2016-10-121-1/+0
| | | | | | | | | Change-Id: Ifbd89eff440a9f0afecc6cfba45c890a1628fdc8 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30325 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Elizabeth K. Liner <eliner@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Disable memdiagsDan Crowell2016-10-091-2/+7
| | | | | | | | Change-Id: If541c63fb0a7035832cfb9a617fa64da1ade6de6 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30930 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Remove Memory expansion and TOD hack from call_proc_exit_cache_containedcrgeddes2016-09-071-108/+25
| | | | | | | | | | | | | | | | | | There are actions going into fips that trigger memory expansion correctly. This commit removes the previous hacks so we know that the memory expansion is working properly. NOTE that exit_cache_contained is still trigged by a SIMICS only register. This is due to issues with how actions are executed. Change-Id: I71fec05def230a61996b05c647101518dafb3573 RTC: 158417 CMVC-Prereq: 1004693 CMVC-Prereq: 1005024 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29033 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* L2 HWP -- p9_setup_barsJoe McGill2016-08-252-17/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | p9_setup_bars initial relase -- program FSP/PSI/NPU BARs & configure MCD nest_attributes proc_setup_bars_attributes adjust scope of BAR base address attributes from chip->system change to reflect offset from base of chip address range, rather than absolute address p9_fbc_utils modify p9_fbc_utils_get_chip_base_address() to output base of each on chip region, consider policy affecting placement of mirrrored memory p9_mss_eff_grouping p9_sbe_load_bootloader p9_sbe_mcs_setup adapt to p9_fbc_utils_get_chip_base_address() changes p9_sbe_scominit adapt to p9_fbc_utils_get_chip_base_address() / attribute scope changes add placeholder for FIR register initialization p9_pcie_config adapt to p9_fbc_utils_get_chip_base_address() / attribute scope changes skip programming of INT resources Change-Id: I62e1766fbe8366168cc3f1b9b43c64f48659aec0 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27841 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Peng Fei Gou <shgoupf@cn.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27850 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Create ekb mirror libmss.so for istepsLateef Quraishi2016-08-081-9/+0
| | | | | | | | | | | | makefile compiles all files under sub-direcotries and creates the library. isteps 07, 13 & 14 are including it Change-Id: I6171b9a1416c1b6ceab6d4e658cd37097d1bd70a RTC: 157095 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27798 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* MDIA: Fix getMdiaTargetType bugCaleb Palmer2016-07-181-7/+6
| | | | | | | | | | Change-Id: Ie5002720315b7166063086adaaee034310f0f3b8 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/26635 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Reviewed-by: Benjamin J. Weisenbeck <bweisenb@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Enabled proc_pcie_config HWP call in istep 14crgeddes2016-06-221-1/+1
| | | | | | | | | | | | | This was disabled because it required new scom addresses. The current hack to pull in the latest scomdef in the simics workaround script fixes it until our backing build is updated. Change-Id: Ia5b544b80d2bf0c657637462f4be28fee1d079a4 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/26060 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* MDIA: Add memdiags hwp to hostboot compileCaleb Palmer2016-06-091-0/+9
| | | | | | | | | | Change-Id: If161cc718481fa6ff8ec44f6ed8363fe8a4df97d Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25529 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add P9 vpo build config, config compile and extra traces for debugPrachi Gupta2016-06-061-1/+2
| | | | | | | | | | | Change-Id: Id377c921327940cc7b720e601dada4af2068d94e Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22177 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Move p9_ringId.H from chips/p9/utils to chips/p9/utils/imageProcsPrachi Gupta2016-06-021-0/+1
| | | | | | | | | | | | to sync with ekb and use the latest copy RTC:154163 Change-Id: I1a6ffccd8358f2e385802b5aeccf10a0e4d9c05d Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25174 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Hostboot IPL Flow v0.95 UpdatesAndrew Geissler2016-05-313-60/+11
| | | | | | | | | | | | Change-Id: Idb12755e59948c260124b07fe20a31396f7f41fe RTC: 155066 CMVC-Coreq:995561 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25117 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: RAJESWARAN THILLAIGOVINDAN <rajeswgo@in.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Enable the hwp p9_mss_setup_barsAndres Lugo-Reyes2016-05-242-7/+9
| | | | | | | | | | | Change-Id: I17f18ca185e947748c20c92c33230f82199503cd RTC:134082 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24555 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins Server Reviewed-by: Matt Derksen <v2cibmd@us.ibm.com> Tested-by: FSP CI Jenkins Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* L2 HWPs - enable p9_htm_setup.CAndres Lugo-Reyes2016-05-182-6/+6
| | | | | | | | | | Change-Id: I90187b4f92675c00fba3e8deefe749d368231e5a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24619 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Run TOD workaround for multi-chipAndrew Geissler2016-05-161-26/+39
| | | | | | | | | | | | | Story 134082 will remove this workaround code. For now it's needed to make PHYP happy on our 2 chip model. Change-Id: I77bac0fb020e4ac94cc5b2639cdf2be8014e6a95 RTC: 153656 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24316 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Manish K. Chowdhary <manichow@in.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Istep 14 Infrastructure and memory attribute additioncrgeddes2016-05-069-202/+243
| | | | | | | | | | | | | | | This commit turns on a lot of functionality for istep 14. In addition it updates HB's attributes with the new memory fapi attributes after this commit memory_mcs_attributes.xml , memory_spd_attributes.xml , and p9_htm_setup_attributes.xml can be mirrored from the ekb. RTC: 134082 Change-Id: If09e3089eef110517002abcd78d4c6368aa0a8e7 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24001 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* PRD: update call_mss_memdiagCaleb Palmer2016-05-021-21/+60
| | | | | | | | | | | | | | Change-Id: I17c4b8ca56e739622ea7e53a84a956f620432eeb RTC: 145354 Depends-on: I9e76c07849331bf1402aeeddd32fdf1dcc26eafc Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23360 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Benjamin J. Weisenbeck <bweisenb@us.ibm.com> Reviewed-by: Brian J. Stegmiller <bjs@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* P9 PSIHB Base Interrupt SupportBill Hoffa2016-03-301-6/+7
| | | | | | | | | | | | | | | | | | | This change includes the following: - Kernel Updates to handle hypervisor interrupt vector - Interrupt Resource Provider changes to setup and handle LSI Based interrupts - Kernel updates to handle modified interrupt flow for LSI Based interrupts - Attribute updates for Scom BAR Registers Change-Id: If63f246a0090ab8c81c3fa8ac3ab6871a0af2e31 RTC:137561 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/20692 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Support association between pervasive targets and other unit targetsNick Bofferding2016-03-231-1/+2
| | | | | | | | | | | | | | | | | | | | | | - Updated attribute compiler to link targets based on pervasive association - Updated attribute compiler to support virtual attributes - Added virtual attribute describing a unit's pervasive association - Updated Nimbus system XML with pervasive/unit associations - Fixed various errors compiling with debug trace enabled - Updated FSP attribute generator to create perv/unit links - Fixed FSP bad path character in attribute generator - Fixed PHB chip unit numbering in attribute generator - Replaced some NVBUS references with NV RTC: 148577 CMVC-Prereq: 988338 Change-Id: I6f3c4aa806e465dd9f09859c4911ff70db782a4f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21943 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Update constants and comments for P9 PIR formatDan Crowell2016-02-291-4/+4
| | | | | | | | | | | | | | | Implemented a set of macros and constants that can be used everywhere to translate a PIR into its component parts and pull out individual pieces of data from a complete PIR. Also added and updated the references to the old ATTR_FABRIC_NODE_ID with ATTR_FABRIC_GROUP_ID. Change-Id: If9735f53940e5849a648729e4bf8ca0cfbb09f6e RTC: 88055 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/706 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Hack in Simple TOD init for P9 and setup PSI BARsDean Sanner2016-02-191-0/+71
| | | | | | | | | Change-Id: Idcbcac016ec0a72d5d77106db0ac089285640633 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22894 Tested-by: Jenkins Server Reviewed-by: WILLIAM G. HOFFA <wghoffa@us.ibm.com> Reviewed-by: Elizabeth Liner <eliner@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* P9 - Fake trigger for memory expansionMarty Gloff2015-12-111-2/+66
| | | | | | | | | | | | | | Read attributes for the memory base and size Invoke Simics action to create mainstore Invoke Simics action to exit cache contained mode and unmap L3 cache Change-Id: Ic8aeb7e768b4e4a0b487c1a22b069c91dfe3d674 RTC:132577 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22277 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Christian Geddes <crgeddes@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* P9 Isteps: Created directory structure for istep 14 wrappersPrachi Gupta2015-12-1110-0/+1439
Change-Id: Idad8c430afef013a91e0c206d4fff80fc45053c0 RTC:137652 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21501 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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