| Commit message (Collapse) | Author | Age | Files | Lines |
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We should only call memdiags on the Explorer ocmb chips because
it will fail if we attempt to call it on the Gemini chips. Gemini
chips will boot fine without this step being called.
Change-Id: I50645db29b17d4dc93de9c1e5f7b419e5dea6f0d
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/86159
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Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com>
Reviewed-by: Nicholas E Bofferding <bofferdn@us.ibm.com>
Reviewed-by: Roland Veloz <rveloz@us.ibm.com>
Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
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There are some delays in getting the attention driven memory diagnostics
code up and running. In the mean time we will use the memory diagnostics
HWP that cronus uses. This will allow us to init the system without any
bootscripts. Eventually, after we get the correct fir settings, we will
enable PRD's version of memory diagnostics and remove the cronus version.
Change-Id: I6b9b5ff8f32983487a7b811a82a515d9da9502d9
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/85863
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Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Reviewed-by: Nicholas E Bofferding <bofferdn@us.ibm.com>
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Change-Id: Ibf52a563c7d8ce3e1cc97d07f3801b3bca58eddd
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70247
Dev-Ready: Alvin Wang <wangat@tw.ibm.com>
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Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75146
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: Iecaaf2846ef8be48fcbd00766d78cb3eb32c5bdf
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/74971
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Reviewed-by: Paul Greenwood <paul.greenwood@ibm.com>
Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
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Change-Id: I1129f5fadb3fd73bf426c888fadbf8e33f615194
RTC:190805
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/58947
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Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I113080eaa733cd9fa26079a5afa1eefda6b3bce6
CQ:SW414606
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55920
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CI-Ready: Zane C. Shelley <zshelle@us.ibm.com>
Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
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Change-Id: I24092ef382fc56b7d3e0aa90a2699ff6cf42d8e7
RTC:180894
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48703
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Reviewed-by: Prachi Gupta <pragupta@us.ibm.com>
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Change-Id: Ib46170dd9f2bd4b133940466c007b20980ef6c44
CQ:SW405858
CQ:HW433016
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50640
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Reviewed-by: LENNARD G. STREAT <lstreat@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
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- mss_memdiags: run the host attn and CHIFIR workaround on all
dmi instances instead of just the proc
- mss_power_cleanup: pass only functional Centaurs/MBAs to
p9_mss_power_cleanup HWP
Change-Id: Ie0a37efd6c5edc8eb700703ee73868d53bb95890
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50367
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Reviewed-by: Richard J. Knight <rjknight@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
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Currently, HWPs are not enabling host attentions, which
causes a long hang in mss_memdiags and do not correctly
mask out the CHIFIR bits. This commit runs the two scoms
to do that before calling mss_memdiags. The real fix will
come in form of a HWP fix via SW405858
Change-Id: I9159e4d757174002b213068c487623c45be9bf75
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49949
Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com>
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Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
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- targeting: skip over ATTR_BAD_DQ_BITMAP during fapi attriubte dump
as it is not looked up correctly for cumulus.
Need to add it back in future.
- istep changes:
- remove p9_throttle_sync from istep 13, it is already getting
called in istep 14
- add support for memdiags on cumulus
- centaur pibrc errors: mask out PROTECTION_BIT for centaur scoms as it is
irrelevant for centaurs
- configureHbrtHypIds: correctly setup DMI information
Change-Id: Ifeaca2f58e16b7ecac9e1329409b98bc6a2f38e7
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49382
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Reviewed-by: Thomas R. Sand <trsand@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
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Change-Id: Ibc62f59635db28e50197139276b9b4c6b59ccc3e
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44768
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First part of the IPL Time Checkstop Analysis story.
The OCC image gets loaded from the PNOR directly into
SRAM in istep 6.11. The OCC is reset in step 21.1
and the image is reloaded to HOMER.
Change-Id: I73ce96b81b311d7ae54356c64aeec816d52fafbb
RTC:155065
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Not all compile errors have been resolved because occCheckstop.C is not
getting built at this time. This config will not be enabled as default
until after the IPL support is complete.
Change-Id: I9b2892c9bcae1929de2c871a71174a2f27d88d76
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Change-Id: I9991d25ce0d33e0608970736f84c4816e3d274fe
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38644
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
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Change-Id: I91b732ae590bfb8e34a8a91b6bdae22a9395074f
RTC: 151755
CMVC-Prereq: 1009085
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Change-Id: If541c63fb0a7035832cfb9a617fa64da1ade6de6
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Change-Id: Ie5002720315b7166063086adaaee034310f0f3b8
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Change-Id: Idb12755e59948c260124b07fe20a31396f7f41fe
RTC: 155066
CMVC-Coreq:995561
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25117
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Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
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Change-Id: I17c4b8ca56e739622ea7e53a84a956f620432eeb
RTC: 145354
Depends-on: I9e76c07849331bf1402aeeddd32fdf1dcc26eafc
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23360
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Change-Id: Idad8c430afef013a91e0c206d4fff80fc45053c0
RTC:137652
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21501
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Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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